X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=bfd%2Farchures.c;h=a00c71265324c39169d33e2e17c1490f82a08f93;hb=233cc9c13af8e8182d0ce5b306526b59f5b11f37;hp=7ff1e82577a12032f4ca5ce7ae3eabae0f5cc66a;hpb=8699fc3e88de47be12401fd366fbe1ee0c4294c7;p=deliverable%2Fbinutils-gdb.git

diff --git a/bfd/archures.c b/bfd/archures.c
index 7ff1e82577..a00c712653 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -137,13 +137,29 @@ DESCRIPTION
 .#define bfd_mach_sparc_v9a		8 {* with ultrasparc add'ns.  *}
 .#define bfd_mach_sparc_v8plusb		9 {* with cheetah add'ns.  *}
 .#define bfd_mach_sparc_v9b		10 {* with cheetah add'ns.  *}
+.#define bfd_mach_sparc_v8plusc		11 {* with UA2005 and T1 add'ns.  *}
+.#define bfd_mach_sparc_v9c		12 {* with UA2005 and T1 add'ns.  *}
+.#define bfd_mach_sparc_v8plusd		13 {* with UA2007 and T3 add'ns.  *}
+.#define bfd_mach_sparc_v9d		14 {* with UA2007 and T3 add'ns.  *}
+.#define bfd_mach_sparc_v8pluse		15 {* with OSA2001 and T4 add'ns (no IMA).  *}
+.#define bfd_mach_sparc_v9e		16 {* with OSA2001 and T4 add'ns (no IMA).  *}
+.#define bfd_mach_sparc_v8plusv		17 {* with OSA2011 and T4 and IMA and FJMAU add'ns.  *}
+.#define bfd_mach_sparc_v9v		18 {* with OSA2011 and T4 and IMA and FJMAU add'ns.  *}
+.#define bfd_mach_sparc_v8plusm		19 {* with OSA2015 and M7 add'ns.  *}
+.#define bfd_mach_sparc_v9m		20 {* with OSA2015 and M7 add'ns.  *}
 .{* Nonzero if MACH has the v9 instruction set.  *}
 .#define bfd_mach_sparc_v9_p(mach) \
-.  ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
+.  ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m \
 .   && (mach) != bfd_mach_sparc_sparclite_le)
 .{* Nonzero if MACH is a 64 bit sparc architecture.  *}
 .#define bfd_mach_sparc_64bit_p(mach) \
-.  ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
+.  ((mach) >= bfd_mach_sparc_v9 \
+.   && (mach) != bfd_mach_sparc_v8plusb \
+.   && (mach) != bfd_mach_sparc_v8plusc \
+.   && (mach) != bfd_mach_sparc_v8plusd \
+.   && (mach) != bfd_mach_sparc_v8pluse \
+.   && (mach) != bfd_mach_sparc_v8plusv \
+.   && (mach) != bfd_mach_sparc_v8plusm)
 .  bfd_arch_spu,       {* PowerPC SPU *}
 .#define bfd_mach_spu		256
 .  bfd_arch_mips,      {* MIPS Rxxxx *}