X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=bfd%2Fbfd-in2.h;h=4a777ed825cc4105f5e0e7c5d20c0345f2bf75ae;hb=66eb6687c96edd3c969bd644574c649fd0be23cd;hp=3cf72f3c8b0f1e82f8a0e6ed2ae3cefc1944abe4;hpb=9bf46c0040a6ddd72e264d2dffbb839f87d33b41;p=deliverable%2Fbinutils-gdb.git diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 3cf72f3c8b..4a777ed825 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -8,7 +8,8 @@ /* Main header file for the bfd library -- portable access to object files. Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Free Software Foundation, Inc. Contributed by Cygnus Support. @@ -382,6 +383,8 @@ struct bfd_hash_table struct bfd_hash_entry **table; /* The number of slots in the hash table. */ unsigned int size; + /* The size of elements. */ + unsigned int entsize; /* A function used to create new elements in the hash table. The first entry is itself a pointer to an element. When this function is first invoked, this pointer will be NULL. However, @@ -401,7 +404,8 @@ extern bfd_boolean bfd_hash_table_init (struct bfd_hash_table *, struct bfd_hash_entry *(*) (struct bfd_hash_entry *, struct bfd_hash_table *, - const char *)); + const char *), + unsigned int); /* Initialize a hash table specifying a size. */ extern bfd_boolean bfd_hash_table_init_n @@ -409,7 +413,7 @@ extern bfd_boolean bfd_hash_table_init_n struct bfd_hash_entry *(*) (struct bfd_hash_entry *, struct bfd_hash_table *, const char *), - unsigned int size); + unsigned int, unsigned int); /* Free up a hash table. */ extern void bfd_hash_table_free @@ -713,6 +717,10 @@ extern struct bfd_section *_bfd_elf_tls_setup extern void _bfd_fix_excluded_sec_syms (bfd *, struct bfd_link_info *); +extern unsigned bfd_m68k_mach_to_features (int); + +extern int bfd_m68k_features_to_mach (unsigned); + extern bfd_boolean bfd_m68k_elf32_create_embedded_relocs (bfd *, struct bfd_link_info *, struct bfd_section *, struct bfd_section *, char **); @@ -1669,16 +1677,22 @@ enum bfd_architecture #define bfd_mach_m68040 6 #define bfd_mach_m68060 7 #define bfd_mach_cpu32 8 -#define bfd_mach_mcf5200 9 -#define bfd_mach_mcf5206e 10 -#define bfd_mach_mcf5307 11 -#define bfd_mach_mcf5407 12 -#define bfd_mach_mcf528x 13 -#define bfd_mach_mcfv4e 14 -#define bfd_mach_mcf521x 15 -#define bfd_mach_mcf5249 16 -#define bfd_mach_mcf547x 17 -#define bfd_mach_mcf548x 18 +#define bfd_mach_mcf_isa_a_nodiv 9 +#define bfd_mach_mcf_isa_a 10 +#define bfd_mach_mcf_isa_a_mac 11 +#define bfd_mach_mcf_isa_a_emac 12 +#define bfd_mach_mcf_isa_aplus 13 +#define bfd_mach_mcf_isa_aplus_mac 14 +#define bfd_mach_mcf_isa_aplus_emac 15 +#define bfd_mach_mcf_isa_b_nousp 16 +#define bfd_mach_mcf_isa_b_nousp_mac 17 +#define bfd_mach_mcf_isa_b_nousp_emac 18 +#define bfd_mach_mcf_isa_b 19 +#define bfd_mach_mcf_isa_b_mac 20 +#define bfd_mach_mcf_isa_b_emac 21 +#define bfd_mach_mcf_isa_b_float 22 +#define bfd_mach_mcf_isa_b_float_mac 23 +#define bfd_mach_mcf_isa_b_float_emac 24 bfd_arch_vax, /* DEC Vax */ bfd_arch_i960, /* Intel 960 */ /* The order of the following is important. @@ -1941,7 +1955,7 @@ enum bfd_architecture #define bfd_mach_msp13 13 #define bfd_mach_msp14 14 #define bfd_mach_msp15 15 -#define bfd_mach_msp16 16 +#define bfd_mach_msp16 16 #define bfd_mach_msp21 21 #define bfd_mach_msp31 31 #define bfd_mach_msp32 32 @@ -1950,6 +1964,10 @@ enum bfd_architecture #define bfd_mach_msp42 42 #define bfd_mach_msp43 43 #define bfd_mach_msp44 44 + bfd_arch_xc16x, /* Infineon's XC16X Series. */ +#define bfd_mach_xc16x 1 +#define bfd_mach_xc16xl 2 +#define bfd_mach_xc16xs 3 bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ #define bfd_mach_xtensa 1 bfd_arch_maxq, /* Dallas MAXQ 10/20 */ @@ -2661,6 +2679,9 @@ in the instruction. */ BFD_RELOC_386_TLS_DTPMOD32, BFD_RELOC_386_TLS_DTPOFF32, BFD_RELOC_386_TLS_TPOFF32, + BFD_RELOC_386_TLS_GOTDESC, + BFD_RELOC_386_TLS_DESC_CALL, + BFD_RELOC_386_TLS_DESC, /* x86-64/elf relocations */ BFD_RELOC_X86_64_GOT32, @@ -2681,6 +2702,9 @@ in the instruction. */ BFD_RELOC_X86_64_TPOFF32, BFD_RELOC_X86_64_GOTOFF64, BFD_RELOC_X86_64_GOTPC32, + BFD_RELOC_X86_64_GOTPC32_TLSDESC, + BFD_RELOC_X86_64_TLSDESC_CALL, + BFD_RELOC_X86_64_TLSDESC, /* ns32k relocations */ BFD_RELOC_NS32K_IMM_8, @@ -3196,6 +3220,9 @@ of the container. */ /* Renesas M16C/M32C Relocations. */ BFD_RELOC_M32C_HI8, + BFD_RELOC_M32C_RL_JUMP, + BFD_RELOC_M32C_RL_1ADDR, + BFD_RELOC_M32C_RL_2ADDR, /* Renesas M32R (formerly Mitsubishi M32R) relocs. This is a 24 bit absolute address. */ @@ -3460,6 +3487,10 @@ of data memory address) into 8 bit immediate value of LDI insn. */ of program memory address) into 8 bit immediate value of LDI insn. */ BFD_RELOC_AVR_HH8_LDI, +/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit +of 32 bit value) into 8 bit immediate value of LDI insn. */ + BFD_RELOC_AVR_MS8_LDI, + /* This is a 16 bit reloc for the AVR that stores negated 8 bit value (usually data memory address) into 8 bit immediate value of SUBI insn. */ BFD_RELOC_AVR_LO8_LDI_NEG, @@ -3474,6 +3505,10 @@ SUBI insn. */ of LDI or SUBI insn. */ BFD_RELOC_AVR_HH8_LDI_NEG, +/* This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb +of 32 bit value) into 8 bit immediate value of LDI insn. */ + BFD_RELOC_AVR_MS8_LDI_NEG, + /* This is a 16 bit reloc for the AVR that stores 8 bit value (usually command address) into 8 bit immediate value of LDI insn. */ BFD_RELOC_AVR_LO8_LDI_PM, @@ -3959,6 +3994,12 @@ This is the 5 bits of a value. */ BFD_RELOC_XSTORMY16_24, BFD_RELOC_XSTORMY16_FPTR16, +/* Infineon Relocations. */ + BFD_RELOC_XC16X_PAG, + BFD_RELOC_XC16X_POF, + BFD_RELOC_XC16X_SEG, + BFD_RELOC_XC16X_SOF, + /* Relocations used by VAX ELF. */ BFD_RELOC_VAX_GLOB_DAT, BFD_RELOC_VAX_JMP_SLOT, @@ -4064,14 +4105,14 @@ replaced by BFD_RELOC_XTENSA_SLOT0_OP. */ BFD_RELOC_XTENSA_OP1, BFD_RELOC_XTENSA_OP2, -/* Xtensa relocation to mark that the assembler expanded the +/* Xtensa relocation to mark that the assembler expanded the instructions from an original target. The expansion size is encoded in the reloc size. */ BFD_RELOC_XTENSA_ASM_EXPAND, -/* Xtensa relocation to mark that the linker should simplify -assembler-expanded instructions. This is commonly used -internally by the linker after analysis of a +/* Xtensa relocation to mark that the linker should simplify +assembler-expanded instructions. This is commonly used +internally by the linker after analysis of a BFD_RELOC_XTENSA_ASM_EXPAND. */ BFD_RELOC_XTENSA_ASM_SIMPLIFY,