X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=bfd%2Fcpu-d10v.c;h=7bc208e26202578ade729ca4e6cb3fa9c9b881bc;hb=493443a47f514251f12e08223b2c56f0fed69015;hp=77ca6ff4974b787d0b80c8655916d2559850454b;hpb=3db64b009284dda3a1ce10a91beb1297475e60a7;p=deliverable%2Fbinutils-gdb.git

diff --git a/bfd/cpu-d10v.c b/bfd/cpu-d10v.c
index 77ca6ff497..7bc208e262 100644
--- a/bfd/cpu-d10v.c
+++ b/bfd/cpu-d10v.c
@@ -1,5 +1,5 @@
 /* BFD support for the D10V processor
-   Copyright 1996, 1999, 2000, 2002, 2005, 2007
+   Copyright 1996, 1999, 2000, 2002, 2005, 2007, 2010
    Free Software Foundation, Inc.
    Contributed by Martin Hunt (hunt@cygnus.com).
 
@@ -7,7 +7,7 @@
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
+   the Free Software Foundation; either version 3 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
@@ -27,7 +27,7 @@
 static const bfd_arch_info_type d10v_ts3_info =
 {
   16,	/* 16 bits in a word.  */
-  16,	/* 16 bits in an address.  */
+  18,	/* really 16 bits in an address, but code has 18 bit range.  */
   8,	/* 8 bits in a byte.  */
   bfd_arch_d10v,
   bfd_mach_d10v_ts3,
@@ -37,37 +37,40 @@ static const bfd_arch_info_type d10v_ts3_info =
   FALSE,
   bfd_default_compatible,
   bfd_default_scan,
+  bfd_arch_default_fill,
   0,
 };
 
 static const bfd_arch_info_type d10v_ts2_info =
 {
-  16,	/* 16 bits in a word.  */
-  16,	/* 16 bits in an address.  */
-  8,	/* 8 bits in a byte.  */
+  16,
+  18,
+  8,
   bfd_arch_d10v,
   bfd_mach_d10v_ts2,
   "d10v",
   "d10v:ts2",
-  4, 	/* Section alignment power.  */
+  4,
   FALSE,
   bfd_default_compatible,
   bfd_default_scan,
+  bfd_arch_default_fill,
   & d10v_ts3_info,
 };
 
 const bfd_arch_info_type bfd_d10v_arch =
 {
-  16,	/* 16 bits in a word.  */
-  16,	/* 16 bits in an address.  */
-  8,	/* 8 bits in a byte.  */
+  16,
+  18,
+  8,
   bfd_arch_d10v,
   bfd_mach_d10v,
   "d10v",
   "d10v",
-  4, 	/* Section alignment power.  */
+  4,
   TRUE,
   bfd_default_compatible,
   bfd_default_scan,
+  bfd_arch_default_fill,
   & d10v_ts2_info,
 };