X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=bfd%2Felfxx-mips.c;h=ffc524fc0d4953292ba8474ad052dee39dc7ebd7;hb=46a2d504dd875caf60f9be191a55c9ff676bcd5c;hp=e502f73c797b46216909976d854c34766599fe47;hpb=23ba6f1807299311717df4d48b5f68d534ab6c47;p=deliverable%2Fbinutils-gdb.git diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index e502f73c79..ffc524fc0d 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -1578,19 +1578,23 @@ mips_elf_create_stub_symbol (struct bfd_link_info *info, const char *prefix, asection *s, bfd_vma value, bfd_vma size) { + bfd_boolean micromips_p = ELF_ST_IS_MICROMIPS (h->root.other); struct bfd_link_hash_entry *bh; struct elf_link_hash_entry *elfh; - const char *name; + char *name; + bfd_boolean res; - if (ELF_ST_IS_MICROMIPS (h->root.other)) + if (micromips_p) value |= 1; /* Create a new symbol. */ - name = ACONCAT ((prefix, h->root.root.root.string, NULL)); + name = concat (prefix, h->root.root.root.string, NULL); bh = NULL; - if (!_bfd_generic_link_add_one_symbol (info, s->owner, name, - BSF_LOCAL, s, value, NULL, - TRUE, FALSE, &bh)) + res = _bfd_generic_link_add_one_symbol (info, s->owner, name, + BSF_LOCAL, s, value, NULL, + TRUE, FALSE, &bh); + free (name); + if (! res) return FALSE; /* Make it a local function. */ @@ -1598,6 +1602,8 @@ mips_elf_create_stub_symbol (struct bfd_link_info *info, elfh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); elfh->size = size; elfh->forced_local = 1; + if (micromips_p) + elfh->other = ELF_ST_SET_MICROMIPS (elfh->other); return TRUE; } @@ -1612,9 +1618,10 @@ mips_elf_create_shadow_symbol (struct bfd_link_info *info, { struct bfd_link_hash_entry *bh; struct elf_link_hash_entry *elfh; - const char *name; + char *name; asection *s; bfd_vma value; + bfd_boolean res; /* Read the symbol's value. */ BFD_ASSERT (h->root.root.type == bfd_link_hash_defined @@ -1623,11 +1630,13 @@ mips_elf_create_shadow_symbol (struct bfd_link_info *info, value = h->root.root.u.def.value; /* Create a new symbol. */ - name = ACONCAT ((prefix, h->root.root.root.string, NULL)); + name = concat (prefix, h->root.root.root.string, NULL); bh = NULL; - if (!_bfd_generic_link_add_one_symbol (info, s->owner, name, - BSF_LOCAL, s, value, NULL, - TRUE, FALSE, &bh)) + res = _bfd_generic_link_add_one_symbol (info, s->owner, name, + BSF_LOCAL, s, value, NULL, + TRUE, FALSE, &bh); + free (name); + if (! res) return FALSE; /* Make it local and copy the other attributes from H. */ @@ -1955,6 +1964,8 @@ mips_elf_add_la25_stub (struct bfd_link_info *info, /* Prefer to use LUI/ADDIU stubs if the function is at the beginning of the section and if we would need no more than 2 nops. */ value = mips_elf_get_la25_target (stub, &s); + if (ELF_ST_IS_MICROMIPS (stub->h->root.other)) + value &= ~1; use_trampoline_p = (value != 0 || s->alignment_power > 4); h->la25_stub = stub; @@ -2084,7 +2095,11 @@ mips_elf_check_symbols (struct mips_elf_link_hash_entry *h, void *data) All we need to do here is shuffle the bits appropriately. As above, the two 16-bit halves must be swapped on a - little-endian system. */ + little-endian system. + + Finally R_MIPS16_PC16_S1 corresponds to R_MIPS_PC16, however the + relocatable field is shifted by 1 rather than 2 and the same bit + shuffling is done as with the relocations above. */ static inline bfd_boolean mips16_reloc_p (int r_type) @@ -2104,6 +2119,7 @@ mips16_reloc_p (int r_type) case R_MIPS16_TLS_GOTTPREL: case R_MIPS16_TLS_TPREL_HI16: case R_MIPS16_TLS_TPREL_LO16: + case R_MIPS16_PC16_S1: return TRUE; default: @@ -2209,6 +2225,19 @@ jal_reloc_p (int r_type) || r_type == R_MICROMIPS_26_S1); } +static inline bfd_boolean +b_reloc_p (int r_type) +{ + return (r_type == R_MIPS_PC26_S2 + || r_type == R_MIPS_PC21_S2 + || r_type == R_MIPS_PC16 + || r_type == R_MIPS_GNU_REL16_S2 + || r_type == R_MIPS16_PC16_S1 + || r_type == R_MICROMIPS_PC16_S1 + || r_type == R_MICROMIPS_PC10_S1 + || r_type == R_MICROMIPS_PC7_S1); +} + static inline bfd_boolean aligned_pcrel_reloc_p (int r_type) { @@ -2216,6 +2245,23 @@ aligned_pcrel_reloc_p (int r_type) || r_type == R_MIPS_PC19_S2); } +static inline bfd_boolean +branch_reloc_p (int r_type) +{ + return (r_type == R_MIPS_26 + || r_type == R_MIPS_PC26_S2 + || r_type == R_MIPS_PC21_S2 + || r_type == R_MIPS_PC16 + || r_type == R_MIPS_GNU_REL16_S2); +} + +static inline bfd_boolean +mips16_branch_reloc_p (int r_type) +{ + return (r_type == R_MIPS16_26 + || r_type == R_MIPS16_PC16_S1); +} + static inline bfd_boolean micromips_branch_reloc_p (int r_type) { @@ -5241,6 +5287,9 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, /* TRUE if the symbol referred to by this relocation is a local symbol. */ bfd_boolean local_p, was_local_p; + /* TRUE if the symbol referred to by this relocation is a section + symbol. */ + bfd_boolean section_p = FALSE; /* TRUE if the symbol referred to by this relocation is "_gp_disp". */ bfd_boolean gp_disp_p = FALSE; /* TRUE if the symbol referred to by this relocation is @@ -5291,17 +5340,18 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, /* Figure out the value of the symbol. */ if (local_p) { + bfd_boolean micromips_p = MICROMIPS_P (abfd); Elf_Internal_Sym *sym; sym = local_syms + r_symndx; sec = local_sections[r_symndx]; + section_p = ELF_ST_TYPE (sym->st_info) == STT_SECTION; + symbol = sec->output_section->vma + sec->output_offset; - if (ELF_ST_TYPE (sym->st_info) != STT_SECTION - || (sec->flags & SEC_MERGE)) + if (!section_p || (sec->flags & SEC_MERGE)) symbol += sym->st_value; - if ((sec->flags & SEC_MERGE) - && ELF_ST_TYPE (sym->st_info) == STT_SECTION) + if ((sec->flags & SEC_MERGE) && section_p) { addend = _bfd_elf_rel_local_sym (abfd, sym, &sec, addend); addend -= symbol; @@ -5316,11 +5366,29 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, *namep = bfd_elf_string_from_elf_section (input_bfd, symtab_hdr->sh_link, sym->st_name); - if (*namep == '\0') + if (*namep == NULL || **namep == '\0') *namep = bfd_section_name (input_bfd, sec); - target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (sym->st_other); - target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (sym->st_other); + /* For relocations against a section symbol and ones against no + symbol (absolute relocations) infer the ISA mode from the addend. */ + if (section_p || r_symndx == STN_UNDEF) + { + target_is_16_bit_code_p = (addend & 1) && !micromips_p; + target_is_micromips_code_p = (addend & 1) && micromips_p; + } + /* For relocations against an absolute symbol infer the ISA mode + from the value of the symbol plus addend. */ + else if (bfd_is_abs_section (sec)) + { + target_is_16_bit_code_p = ((symbol + addend) & 1) && !micromips_p; + target_is_micromips_code_p = ((symbol + addend) & 1) && micromips_p; + } + /* Otherwise just use the regular symbol annotation available. */ + else + { + target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (sym->st_other); + target_is_micromips_code_p = ELF_ST_IS_MICROMIPS (sym->st_other); + } } else { @@ -5404,17 +5472,14 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf */ symbol = 0; } - else if ((*info->callbacks->undefined_symbol) - (info, h->root.root.root.string, input_bfd, - input_section, relocation->r_offset, - (info->unresolved_syms_in_objects == RM_GENERATE_ERROR) - || ELF_ST_VISIBILITY (h->root.other))) - { - return bfd_reloc_undefined; - } else { - return bfd_reloc_notsupported; + (*info->callbacks->undefined_symbol) + (info, h->root.root.root.string, input_bfd, + input_section, relocation->r_offset, + (info->unresolved_syms_in_objects == RM_GENERATE_ERROR) + || ELF_ST_VISIBILITY (h->root.other)); + return bfd_reloc_undefined; } target_is_16_bit_code_p = ELF_ST_IS_MIPS16 (h->root.other); @@ -5517,15 +5582,20 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, else if (h != NULL && h->la25_stub && mips_elf_relocation_needs_la25_stub (input_bfd, r_type, target_is_16_bit_code_p)) - symbol = (h->la25_stub->stub_section->output_section->vma - + h->la25_stub->stub_section->output_offset - + h->la25_stub->offset); + { + symbol = (h->la25_stub->stub_section->output_section->vma + + h->la25_stub->stub_section->output_offset + + h->la25_stub->offset); + if (ELF_ST_IS_MICROMIPS (h->root.other)) + symbol |= 1; + } /* For direct MIPS16 and microMIPS calls make sure the compressed PLT entry is used if a standard PLT entry has also been made. In this case the symbol will have been set by mips_elf_set_plt_sym_value to point to the standard PLT entry, so redirect to the compressed one. */ - else if ((r_type == R_MIPS16_26 || r_type == R_MICROMIPS_26_S1) + else if ((mips16_branch_reloc_p (r_type) + || micromips_branch_reloc_p (r_type)) && !bfd_link_relocatable (info) && h != NULL && h->use_plt_entry @@ -5547,7 +5617,7 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, } /* Make sure MIPS16 and microMIPS are not used together. */ - if ((r_type == R_MIPS16_26 && target_is_micromips_code_p) + if ((mips16_branch_reloc_p (r_type) && target_is_micromips_code_p) || (micromips_branch_reloc_p (r_type) && target_is_16_bit_code_p)) { (*_bfd_error_handler) @@ -5563,10 +5633,12 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, acceptable. */ *cross_mode_jump_p = (!bfd_link_relocatable (info) && !(h && h->root.root.type == bfd_link_hash_undefweak) - && ((r_type == R_MIPS16_26 && !target_is_16_bit_code_p) - || (r_type == R_MICROMIPS_26_S1 + && ((mips16_branch_reloc_p (r_type) + && !target_is_16_bit_code_p) + || (micromips_branch_reloc_p (r_type) && !target_is_micromips_code_p) - || ((r_type == R_MIPS_26 || r_type == R_MIPS_JALR) + || ((branch_reloc_p (r_type) + || r_type == R_MIPS_JALR) && (target_is_16_bit_code_p || target_is_micromips_code_p)))); @@ -5767,22 +5839,26 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, { unsigned int shift; - /* Make sure the target of JALX is word-aligned. Bit 0 must be - the correct ISA mode selector and bit 1 must be 0. */ - if (*cross_mode_jump_p && (symbol & 3) != (r_type == R_MIPS_26)) - return bfd_reloc_outofrange; - /* Shift is 2, unusually, for microMIPS JALX. */ shift = (!*cross_mode_jump_p && r_type == R_MICROMIPS_26_S1) ? 1 : 2; - if (was_local_p) - value = addend | ((p + 4) & (0xfc000000 << shift)); - else if (howto->partial_inplace) + if (howto->partial_inplace && !section_p) value = _bfd_mips_elf_sign_extend (addend, 26 + shift); else value = addend; - value = (value + symbol) >> shift; - if (!was_local_p && h->root.root.type != bfd_link_hash_undefweak) + value += symbol; + + /* Make sure the target of a jump is suitably aligned. Bit 0 must + be the correct ISA mode selector except for weak undefined + symbols. */ + if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak) + && (*cross_mode_jump_p + ? (value & 3) != (r_type == R_MIPS_26) + : (value & ((1 << shift) - 1)) != (r_type != R_MIPS_26))) + return bfd_reloc_outofrange; + + value >>= shift; + if (was_local_p || h->root.root.type != bfd_link_hash_undefweak) overflowed_p = (value >> 26) != ((p + 4) >> (26 + shift)); value &= howto->dst_mask; } @@ -5969,7 +6045,12 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, if (howto->partial_inplace) addend = _bfd_mips_elf_sign_extend (addend, 18); - if ((symbol + addend) & 3) + /* No need to exclude weak undefined symbols here as they resolve + to 0 and never set `*cross_mode_jump_p', so this alignment check + will never trigger for them. */ + if (*cross_mode_jump_p + ? ((symbol + addend) & 3) != 1 + : ((symbol + addend) & 3) != 0) return bfd_reloc_outofrange; value = symbol + addend - p; @@ -5979,6 +6060,23 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, value &= howto->dst_mask; break; + case R_MIPS16_PC16_S1: + if (howto->partial_inplace) + addend = _bfd_mips_elf_sign_extend (addend, 17); + + if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak) + && (*cross_mode_jump_p + ? ((symbol + addend) & 3) != 0 + : ((symbol + addend) & 1) == 0)) + return bfd_reloc_outofrange; + + value = symbol + addend - p; + if (was_local_p || h->root.root.type != bfd_link_hash_undefweak) + overflowed_p = mips_elf_overflow_p (value, 17); + value >>= howto->rightshift; + value &= howto->dst_mask; + break; + case R_MIPS_PC21_S2: if (howto->partial_inplace) addend = _bfd_mips_elf_sign_extend (addend, 23); @@ -6052,6 +6150,13 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MICROMIPS_PC7_S1: if (howto->partial_inplace) addend = _bfd_mips_elf_sign_extend (addend, 8); + + if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak) + && (*cross_mode_jump_p + ? ((symbol + addend + 2) & 3) != 0 + : ((symbol + addend + 2) & 1) == 0)) + return bfd_reloc_outofrange; + value = symbol + addend - p; if (was_local_p || h->root.root.type != bfd_link_hash_undefweak) overflowed_p = mips_elf_overflow_p (value, 8); @@ -6062,6 +6167,13 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MICROMIPS_PC10_S1: if (howto->partial_inplace) addend = _bfd_mips_elf_sign_extend (addend, 11); + + if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak) + && (*cross_mode_jump_p + ? ((symbol + addend + 2) & 3) != 0 + : ((symbol + addend + 2) & 1) == 0)) + return bfd_reloc_outofrange; + value = symbol + addend - p; if (was_local_p || h->root.root.type != bfd_link_hash_undefweak) overflowed_p = mips_elf_overflow_p (value, 11); @@ -6072,6 +6184,13 @@ mips_elf_calculate_relocation (bfd *abfd, bfd *input_bfd, case R_MICROMIPS_PC16_S1: if (howto->partial_inplace) addend = _bfd_mips_elf_sign_extend (addend, 17); + + if ((was_local_p || h->root.root.type != bfd_link_hash_undefweak) + && (*cross_mode_jump_p + ? ((symbol + addend) & 3) != 0 + : ((symbol + addend) & 1) == 0)) + return bfd_reloc_outofrange; + value = symbol + addend - p; if (was_local_p || h->root.root.type != bfd_link_hash_undefweak) overflowed_p = mips_elf_overflow_p (value, 17); @@ -6230,7 +6349,21 @@ mips_elf_perform_relocation (struct bfd_link_info *info, /* Set the field. */ x |= (value & howto->dst_mask); - /* If required, turn JAL into JALX. */ + /* Detect incorrect JALX usage. If required, turn JAL or BAL into JALX. */ + if (!cross_mode_jump_p && jal_reloc_p (r_type)) + { + bfd_vma opcode = x >> 26; + + if (r_type == R_MIPS16_26 ? opcode == 0x7 + : r_type == R_MICROMIPS_26_S1 ? opcode == 0x3c + : opcode == 0x1d) + { + info->callbacks->einfo + (_("%X%H: Unsupported JALX to the same ISA mode\n"), + input_bfd, input_section, relocation->r_offset); + return TRUE; + } + } if (cross_mode_jump_p && jal_reloc_p (r_type)) { bfd_boolean ok; @@ -6258,18 +6391,63 @@ mips_elf_perform_relocation (struct bfd_link_info *info, convert J or JALS to JALX. */ if (!ok) { - (*_bfd_error_handler) - (_("%B: %A+0x%lx: Unsupported jump between ISA modes; consider recompiling with interlinking enabled."), - input_bfd, - input_section, - (unsigned long) relocation->r_offset); - bfd_set_error (bfd_error_bad_value); - return FALSE; + info->callbacks->einfo + (_("%X%H: Unsupported jump between ISA modes; " + "consider recompiling with interlinking enabled\n"), + input_bfd, input_section, relocation->r_offset); + return TRUE; } /* Make this the JALX opcode. */ x = (x & ~(0x3f << 26)) | (jalx_opcode << 26); } + else if (cross_mode_jump_p && b_reloc_p (r_type)) + { + bfd_boolean ok = FALSE; + bfd_vma opcode = x >> 16; + bfd_vma jalx_opcode = 0; + bfd_vma addr; + bfd_vma dest; + + if (r_type == R_MICROMIPS_PC16_S1) + { + ok = opcode == 0x4060; + jalx_opcode = 0x3c; + value <<= 1; + } + else if (r_type == R_MIPS_PC16 || r_type == R_MIPS_GNU_REL16_S2) + { + ok = opcode == 0x411; + jalx_opcode = 0x1d; + value <<= 2; + } + + if (bfd_link_pic (info) || !ok) + { + info->callbacks->einfo + (_("%X%H: Unsupported branch between ISA modes\n"), + input_bfd, input_section, relocation->r_offset); + return TRUE; + } + + addr = (input_section->output_section->vma + + input_section->output_offset + + relocation->r_offset + + 4); + dest = addr + (((value & 0x3ffff) ^ 0x20000) - 0x20000); + + if ((addr >> 28) << 28 != (dest >> 28) << 28) + { + info->callbacks->einfo + (_("%X%H: Cannot convert branch between ISA modes " + "to JALX: relocation out of range\n"), + input_bfd, input_section, relocation->r_offset); + return TRUE; + } + + /* Make this the JALX opcode. */ + x = ((dest >> 2) & 0x3ffffff) | jalx_opcode << 26; + } /* Try converting JAL to BAL and J(AL)R to B(AL), if the target is in range. */ @@ -7774,16 +7952,24 @@ mips_elf_read_rel_addend (bfd *abfd, const Elf_Internal_Rela *rel, bfd_byte *location; unsigned int r_type; bfd_vma addend; + bfd_vma bytes; r_type = ELF_R_TYPE (abfd, rel->r_info); location = contents + rel->r_offset; /* Get the addend, which is stored in the input file. */ _bfd_mips_elf_reloc_unshuffle (abfd, r_type, FALSE, location); - addend = mips_elf_obtain_contents (howto, rel, abfd, contents); + bytes = mips_elf_obtain_contents (howto, rel, abfd, contents); _bfd_mips_elf_reloc_shuffle (abfd, r_type, FALSE, location); - return addend & howto->src_mask; + addend = bytes & howto->src_mask; + + /* Shift is 2, unusually, for microMIPS JALX. Adjust the addend + accordingly. */ + if (r_type == R_MICROMIPS_26_S1 && (bytes >> 26) == 0x3c) + addend <<= 1; + + return addend; } /* REL is a relocation in ABFD that needs a partnering LO16 relocation @@ -8325,6 +8511,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, case R_MIPS_PC21_S2: case R_MIPS_PC26_S2: case R_MIPS16_26: + case R_MIPS16_PC16_S1: case R_MICROMIPS_26_S1: case R_MICROMIPS_PC7_S1: case R_MICROMIPS_PC10_S1: @@ -8618,7 +8805,9 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, a PLT entry is not created because the symbol is satisfied locally. */ if (h != NULL - && jal_reloc_p (r_type) + && (branch_reloc_p (r_type) + || mips16_branch_reloc_p (r_type) + || micromips_branch_reloc_p (r_type)) && !SYMBOL_CALLS_LOCAL (info, h)) { if (h->plt.plist == NULL) @@ -8626,7 +8815,7 @@ _bfd_mips_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, if (h->plt.plist == NULL) return FALSE; - if (r_type == R_MIPS_26) + if (branch_reloc_p (r_type)) h->plt.plist->need_mips = TRUE; else h->plt.plist->need_comp = TRUE; @@ -10234,10 +10423,9 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, htab->small_data_overflow_reported = TRUE; (*info->callbacks->einfo) ("%P: %s\n", msg); } - if (! ((*info->callbacks->reloc_overflow) - (info, NULL, name, howto->name, (bfd_vma) 0, - input_bfd, input_section, rel->r_offset))) - return FALSE; + (*info->callbacks->reloc_overflow) + (info, NULL, name, howto->name, (bfd_vma) 0, + input_bfd, input_section, rel->r_offset); } break; @@ -10245,19 +10433,26 @@ _bfd_mips_elf_relocate_section (bfd *output_bfd, struct bfd_link_info *info, break; case bfd_reloc_outofrange: + msg = NULL; if (jal_reloc_p (howto->type)) + msg = (cross_mode_jump_p + ? _("Cannot convert a jump to JALX " + "for a non-word-aligned address") + : (howto->type == R_MIPS16_26 + ? _("Jump to a non-word-aligned address") + : _("Jump to a non-instruction-aligned address"))); + else if (b_reloc_p (howto->type)) + msg = (cross_mode_jump_p + ? _("Cannot convert a branch to JALX " + "for a non-word-aligned address") + : _("Branch to a non-instruction-aligned address")); + else if (aligned_pcrel_reloc_p (howto->type)) + msg = _("PC-relative load from unaligned address"); + if (msg) { - msg = _("JALX to a non-word-aligned address"); - info->callbacks->warning - (info, msg, name, input_bfd, input_section, rel->r_offset); - return FALSE; - } - if (aligned_pcrel_reloc_p (howto->type)) - { - msg = _("PC-relative load from unaligned address"); - info->callbacks->warning - (info, msg, name, input_bfd, input_section, rel->r_offset); - return FALSE; + info->callbacks->einfo + ("%X%H: %s\n", input_bfd, input_section, rel->r_offset, msg); + break; } /* Fall through. */ @@ -11455,7 +11650,7 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd, case DT_MIPS_SYMTABNO: name = ".dynsym"; elemsize = MIPS_ELF_SYM_SIZE (output_bfd); - s = bfd_get_section_by_name (output_bfd, name); + s = bfd_get_linker_section (dynobj, name); if (s != NULL) dyn.d_un.d_val = s->size / elemsize; @@ -12916,25 +13111,22 @@ _bfd_elf_mips_get_relocated_section_contents switch (r) { case bfd_reloc_undefined: - if (!((*link_info->callbacks->undefined_symbol) - (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr), - input_bfd, input_section, (*parent)->address, TRUE))) - goto error_return; + (*link_info->callbacks->undefined_symbol) + (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr), + input_bfd, input_section, (*parent)->address, TRUE); break; case bfd_reloc_dangerous: BFD_ASSERT (error_message != NULL); - if (!((*link_info->callbacks->reloc_dangerous) - (link_info, error_message, input_bfd, input_section, - (*parent)->address))) - goto error_return; + (*link_info->callbacks->reloc_dangerous) + (link_info, error_message, + input_bfd, input_section, (*parent)->address); break; case bfd_reloc_overflow: - if (!((*link_info->callbacks->reloc_overflow) - (link_info, NULL, - bfd_asymbol_name (*(*parent)->sym_ptr_ptr), - (*parent)->howto->name, (*parent)->addend, - input_bfd, input_section, (*parent)->address))) - goto error_return; + (*link_info->callbacks->reloc_overflow) + (link_info, NULL, + bfd_asymbol_name (*(*parent)->sym_ptr_ptr), + (*parent)->howto->name, (*parent)->addend, + input_bfd, input_section, (*parent)->address); break; case bfd_reloc_outofrange: default: @@ -13110,9 +13302,8 @@ static const struct opcode_descriptor bz_insns_16[] = { /* Switch between a 5-bit register index and its 3-bit shorthand. */ -#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0x17) + 2) -#define BZ16_REG_FIELD(r) \ - (((2 <= (r) && (r) <= 7) ? (r) : ((r) - 16)) << 7) +#define BZ16_REG(opcode) ((((((opcode) >> 7) & 7) + 0x1e) & 0xf) + 2) +#define BZ16_REG_FIELD(r) (((r) & 7) << 7) /* 32-bit instructions with a delay slot. */ @@ -14867,89 +15058,282 @@ _bfd_mips_elf_final_link (bfd *abfd, struct bfd_link_info *info) return TRUE; } -/* Merge object attributes from IBFD into OBFD. Raise an error if - there are conflicting attributes. */ +/* Merge object file header flags from IBFD into OBFD. Raise an error + if there are conflicting settings. */ + static bfd_boolean -mips_elf_merge_obj_attributes (bfd *ibfd, bfd *obfd) +mips_elf_merge_obj_e_flags (bfd *ibfd, bfd *obfd) { - obj_attribute *in_attr; - obj_attribute *out_attr; - bfd *abi_fp_bfd; - bfd *abi_msa_bfd; + struct mips_elf_obj_tdata *out_tdata = mips_elf_tdata (obfd); + flagword old_flags; + flagword new_flags; + bfd_boolean ok; - abi_fp_bfd = mips_elf_tdata (obfd)->abi_fp_bfd; - in_attr = elf_known_obj_attributes (ibfd)[OBJ_ATTR_GNU]; - if (!abi_fp_bfd && in_attr[Tag_GNU_MIPS_ABI_FP].i != Val_GNU_MIPS_ABI_FP_ANY) - mips_elf_tdata (obfd)->abi_fp_bfd = ibfd; + new_flags = elf_elfheader (ibfd)->e_flags; + elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_NOREORDER; + old_flags = elf_elfheader (obfd)->e_flags; - abi_msa_bfd = mips_elf_tdata (obfd)->abi_msa_bfd; - if (!abi_msa_bfd - && in_attr[Tag_GNU_MIPS_ABI_MSA].i != Val_GNU_MIPS_ABI_MSA_ANY) - mips_elf_tdata (obfd)->abi_msa_bfd = ibfd; + /* Check flag compatibility. */ - if (!elf_known_obj_attributes_proc (obfd)[0].i) - { - /* This is the first object. Copy the attributes. */ - _bfd_elf_copy_obj_attributes (ibfd, obfd); + new_flags &= ~EF_MIPS_NOREORDER; + old_flags &= ~EF_MIPS_NOREORDER; - /* Use the Tag_null value to indicate the attributes have been - initialized. */ - elf_known_obj_attributes_proc (obfd)[0].i = 1; + /* Some IRIX 6 BSD-compatibility objects have this bit set. It + doesn't seem to matter. */ + new_flags &= ~EF_MIPS_XGOT; + old_flags &= ~EF_MIPS_XGOT; - return TRUE; - } + /* MIPSpro generates ucode info in n64 objects. Again, we should + just be able to ignore this. */ + new_flags &= ~EF_MIPS_UCODE; + old_flags &= ~EF_MIPS_UCODE; - /* Check for conflicting Tag_GNU_MIPS_ABI_FP attributes and merge - non-conflicting ones. */ - out_attr = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU]; - if (in_attr[Tag_GNU_MIPS_ABI_FP].i != out_attr[Tag_GNU_MIPS_ABI_FP].i) + /* DSOs should only be linked with CPIC code. */ + if ((ibfd->flags & DYNAMIC) != 0) + new_flags |= EF_MIPS_PIC | EF_MIPS_CPIC; + + if (new_flags == old_flags) + return TRUE; + + ok = TRUE; + + if (((new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0) + != ((old_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0)) { - int out_fp, in_fp; + (*_bfd_error_handler) + (_("%B: warning: linking abicalls files with non-abicalls files"), + ibfd); + ok = TRUE; + } - out_fp = out_attr[Tag_GNU_MIPS_ABI_FP].i; - in_fp = in_attr[Tag_GNU_MIPS_ABI_FP].i; - out_attr[Tag_GNU_MIPS_ABI_FP].type = 1; - if (out_fp == Val_GNU_MIPS_ABI_FP_ANY) - out_attr[Tag_GNU_MIPS_ABI_FP].i = in_fp; - else if (out_fp == Val_GNU_MIPS_ABI_FP_XX - && (in_fp == Val_GNU_MIPS_ABI_FP_DOUBLE - || in_fp == Val_GNU_MIPS_ABI_FP_64 - || in_fp == Val_GNU_MIPS_ABI_FP_64A)) + if (new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) + elf_elfheader (obfd)->e_flags |= EF_MIPS_CPIC; + if (! (new_flags & EF_MIPS_PIC)) + elf_elfheader (obfd)->e_flags &= ~EF_MIPS_PIC; + + new_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC); + old_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC); + + /* Compare the ISAs. */ + if (mips_32bit_flags_p (old_flags) != mips_32bit_flags_p (new_flags)) + { + (*_bfd_error_handler) + (_("%B: linking 32-bit code with 64-bit code"), + ibfd); + ok = FALSE; + } + else if (!mips_mach_extends_p (bfd_get_mach (ibfd), bfd_get_mach (obfd))) + { + /* OBFD's ISA isn't the same as, or an extension of, IBFD's. */ + if (mips_mach_extends_p (bfd_get_mach (obfd), bfd_get_mach (ibfd))) { - mips_elf_tdata (obfd)->abi_fp_bfd = ibfd; - out_attr[Tag_GNU_MIPS_ABI_FP].i = in_attr[Tag_GNU_MIPS_ABI_FP].i; + /* Copy the architecture info from IBFD to OBFD. Also copy + the 32-bit flag (if set) so that we continue to recognise + OBFD as a 32-bit binary. */ + bfd_set_arch_info (obfd, bfd_get_arch_info (ibfd)); + elf_elfheader (obfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH); + elf_elfheader (obfd)->e_flags + |= new_flags & (EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE); + + /* Update the ABI flags isa_level, isa_rev, isa_ext fields. */ + update_mips_abiflags_isa (obfd, &out_tdata->abiflags); + + /* Copy across the ABI flags if OBFD doesn't use them + and if that was what caused us to treat IBFD as 32-bit. */ + if ((old_flags & EF_MIPS_ABI) == 0 + && mips_32bit_flags_p (new_flags) + && !mips_32bit_flags_p (new_flags & ~EF_MIPS_ABI)) + elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ABI; } - else if (in_fp == Val_GNU_MIPS_ABI_FP_XX - && (out_fp == Val_GNU_MIPS_ABI_FP_DOUBLE - || out_fp == Val_GNU_MIPS_ABI_FP_64 - || out_fp == Val_GNU_MIPS_ABI_FP_64A)) - /* Keep the current setting. */; - else if (out_fp == Val_GNU_MIPS_ABI_FP_64A - && in_fp == Val_GNU_MIPS_ABI_FP_64) + else { - mips_elf_tdata (obfd)->abi_fp_bfd = ibfd; - out_attr[Tag_GNU_MIPS_ABI_FP].i = in_attr[Tag_GNU_MIPS_ABI_FP].i; + /* The ISAs aren't compatible. */ + (*_bfd_error_handler) + (_("%B: linking %s module with previous %s modules"), + ibfd, + bfd_printable_name (ibfd), + bfd_printable_name (obfd)); + ok = FALSE; } - else if (in_fp == Val_GNU_MIPS_ABI_FP_64A - && out_fp == Val_GNU_MIPS_ABI_FP_64) - /* Keep the current setting. */; - else if (in_fp != Val_GNU_MIPS_ABI_FP_ANY) - { - const char *out_string, *in_string; + } - out_string = _bfd_mips_fp_abi_string (out_fp); - in_string = _bfd_mips_fp_abi_string (in_fp); - /* First warn about cases involving unrecognised ABIs. */ - if (!out_string && !in_string) - _bfd_error_handler - (_("Warning: %B uses unknown floating point ABI %d " - "(set by %B), %B uses unknown floating point ABI %d"), - obfd, abi_fp_bfd, ibfd, out_fp, in_fp); - else if (!out_string) - _bfd_error_handler - (_("Warning: %B uses unknown floating point ABI %d " - "(set by %B), %B uses %s"), - obfd, abi_fp_bfd, ibfd, out_fp, in_string); + new_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE); + old_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE); + + /* Compare ABIs. The 64-bit ABI does not use EF_MIPS_ABI. But, it + does set EI_CLASS differently from any 32-bit ABI. */ + if ((new_flags & EF_MIPS_ABI) != (old_flags & EF_MIPS_ABI) + || (elf_elfheader (ibfd)->e_ident[EI_CLASS] + != elf_elfheader (obfd)->e_ident[EI_CLASS])) + { + /* Only error if both are set (to different values). */ + if (((new_flags & EF_MIPS_ABI) && (old_flags & EF_MIPS_ABI)) + || (elf_elfheader (ibfd)->e_ident[EI_CLASS] + != elf_elfheader (obfd)->e_ident[EI_CLASS])) + { + (*_bfd_error_handler) + (_("%B: ABI mismatch: linking %s module with previous %s modules"), + ibfd, + elf_mips_abi_name (ibfd), + elf_mips_abi_name (obfd)); + ok = FALSE; + } + new_flags &= ~EF_MIPS_ABI; + old_flags &= ~EF_MIPS_ABI; + } + + /* Compare ASEs. Forbid linking MIPS16 and microMIPS ASE modules together + and allow arbitrary mixing of the remaining ASEs (retain the union). */ + if ((new_flags & EF_MIPS_ARCH_ASE) != (old_flags & EF_MIPS_ARCH_ASE)) + { + int old_micro = old_flags & EF_MIPS_ARCH_ASE_MICROMIPS; + int new_micro = new_flags & EF_MIPS_ARCH_ASE_MICROMIPS; + int old_m16 = old_flags & EF_MIPS_ARCH_ASE_M16; + int new_m16 = new_flags & EF_MIPS_ARCH_ASE_M16; + int micro_mis = old_m16 && new_micro; + int m16_mis = old_micro && new_m16; + + if (m16_mis || micro_mis) + { + (*_bfd_error_handler) + (_("%B: ASE mismatch: linking %s module with previous %s modules"), + ibfd, + m16_mis ? "MIPS16" : "microMIPS", + m16_mis ? "microMIPS" : "MIPS16"); + ok = FALSE; + } + + elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ARCH_ASE; + + new_flags &= ~ EF_MIPS_ARCH_ASE; + old_flags &= ~ EF_MIPS_ARCH_ASE; + } + + /* Compare NaN encodings. */ + if ((new_flags & EF_MIPS_NAN2008) != (old_flags & EF_MIPS_NAN2008)) + { + _bfd_error_handler (_("%B: linking %s module with previous %s modules"), + ibfd, + (new_flags & EF_MIPS_NAN2008 + ? "-mnan=2008" : "-mnan=legacy"), + (old_flags & EF_MIPS_NAN2008 + ? "-mnan=2008" : "-mnan=legacy")); + ok = FALSE; + new_flags &= ~EF_MIPS_NAN2008; + old_flags &= ~EF_MIPS_NAN2008; + } + + /* Compare FP64 state. */ + if ((new_flags & EF_MIPS_FP64) != (old_flags & EF_MIPS_FP64)) + { + _bfd_error_handler (_("%B: linking %s module with previous %s modules"), + ibfd, + (new_flags & EF_MIPS_FP64 + ? "-mfp64" : "-mfp32"), + (old_flags & EF_MIPS_FP64 + ? "-mfp64" : "-mfp32")); + ok = FALSE; + new_flags &= ~EF_MIPS_FP64; + old_flags &= ~EF_MIPS_FP64; + } + + /* Warn about any other mismatches */ + if (new_flags != old_flags) + { + (*_bfd_error_handler) + (_("%B: uses different e_flags (0x%lx) fields than previous modules " + "(0x%lx)"), + ibfd, (unsigned long) new_flags, + (unsigned long) old_flags); + ok = FALSE; + } + + return ok; +} + +/* Merge object attributes from IBFD into OBFD. Raise an error if + there are conflicting attributes. */ +static bfd_boolean +mips_elf_merge_obj_attributes (bfd *ibfd, bfd *obfd) +{ + obj_attribute *in_attr; + obj_attribute *out_attr; + bfd *abi_fp_bfd; + bfd *abi_msa_bfd; + + abi_fp_bfd = mips_elf_tdata (obfd)->abi_fp_bfd; + in_attr = elf_known_obj_attributes (ibfd)[OBJ_ATTR_GNU]; + if (!abi_fp_bfd && in_attr[Tag_GNU_MIPS_ABI_FP].i != Val_GNU_MIPS_ABI_FP_ANY) + mips_elf_tdata (obfd)->abi_fp_bfd = ibfd; + + abi_msa_bfd = mips_elf_tdata (obfd)->abi_msa_bfd; + if (!abi_msa_bfd + && in_attr[Tag_GNU_MIPS_ABI_MSA].i != Val_GNU_MIPS_ABI_MSA_ANY) + mips_elf_tdata (obfd)->abi_msa_bfd = ibfd; + + if (!elf_known_obj_attributes_proc (obfd)[0].i) + { + /* This is the first object. Copy the attributes. */ + _bfd_elf_copy_obj_attributes (ibfd, obfd); + + /* Use the Tag_null value to indicate the attributes have been + initialized. */ + elf_known_obj_attributes_proc (obfd)[0].i = 1; + + return TRUE; + } + + /* Check for conflicting Tag_GNU_MIPS_ABI_FP attributes and merge + non-conflicting ones. */ + out_attr = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU]; + if (in_attr[Tag_GNU_MIPS_ABI_FP].i != out_attr[Tag_GNU_MIPS_ABI_FP].i) + { + int out_fp, in_fp; + + out_fp = out_attr[Tag_GNU_MIPS_ABI_FP].i; + in_fp = in_attr[Tag_GNU_MIPS_ABI_FP].i; + out_attr[Tag_GNU_MIPS_ABI_FP].type = 1; + if (out_fp == Val_GNU_MIPS_ABI_FP_ANY) + out_attr[Tag_GNU_MIPS_ABI_FP].i = in_fp; + else if (out_fp == Val_GNU_MIPS_ABI_FP_XX + && (in_fp == Val_GNU_MIPS_ABI_FP_DOUBLE + || in_fp == Val_GNU_MIPS_ABI_FP_64 + || in_fp == Val_GNU_MIPS_ABI_FP_64A)) + { + mips_elf_tdata (obfd)->abi_fp_bfd = ibfd; + out_attr[Tag_GNU_MIPS_ABI_FP].i = in_attr[Tag_GNU_MIPS_ABI_FP].i; + } + else if (in_fp == Val_GNU_MIPS_ABI_FP_XX + && (out_fp == Val_GNU_MIPS_ABI_FP_DOUBLE + || out_fp == Val_GNU_MIPS_ABI_FP_64 + || out_fp == Val_GNU_MIPS_ABI_FP_64A)) + /* Keep the current setting. */; + else if (out_fp == Val_GNU_MIPS_ABI_FP_64A + && in_fp == Val_GNU_MIPS_ABI_FP_64) + { + mips_elf_tdata (obfd)->abi_fp_bfd = ibfd; + out_attr[Tag_GNU_MIPS_ABI_FP].i = in_attr[Tag_GNU_MIPS_ABI_FP].i; + } + else if (in_fp == Val_GNU_MIPS_ABI_FP_64A + && out_fp == Val_GNU_MIPS_ABI_FP_64) + /* Keep the current setting. */; + else if (in_fp != Val_GNU_MIPS_ABI_FP_ANY) + { + const char *out_string, *in_string; + + out_string = _bfd_mips_fp_abi_string (out_fp); + in_string = _bfd_mips_fp_abi_string (in_fp); + /* First warn about cases involving unrecognised ABIs. */ + if (!out_string && !in_string) + _bfd_error_handler + (_("Warning: %B uses unknown floating point ABI %d " + "(set by %B), %B uses unknown floating point ABI %d"), + obfd, abi_fp_bfd, ibfd, out_fp, in_fp); + else if (!out_string) + _bfd_error_handler + (_("Warning: %B uses unknown floating point ABI %d " + "(set by %B), %B uses %s"), + obfd, abi_fp_bfd, ibfd, out_fp, in_string); else if (!in_string) _bfd_error_handler (_("Warning: %B uses %s (set by %B), " @@ -15013,7 +15397,37 @@ mips_elf_merge_obj_attributes (bfd *ibfd, bfd *obfd) } /* Merge Tag_compatibility attributes and any common GNU ones. */ - _bfd_elf_merge_object_attributes (ibfd, obfd); + return _bfd_elf_merge_object_attributes (ibfd, obfd); +} + +/* Merge object ABI flags from IBFD into OBFD. Raise an error if + there are conflicting settings. */ + +static bfd_boolean +mips_elf_merge_obj_abiflags (bfd *ibfd, bfd *obfd) +{ + obj_attribute *out_attr = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU]; + struct mips_elf_obj_tdata *out_tdata = mips_elf_tdata (obfd); + struct mips_elf_obj_tdata *in_tdata = mips_elf_tdata (ibfd); + + /* Update the output abiflags fp_abi using the computed fp_abi. */ + out_tdata->abiflags.fp_abi = out_attr[Tag_GNU_MIPS_ABI_FP].i; + +#define max(a, b) ((a) > (b) ? (a) : (b)) + /* Merge abiflags. */ + out_tdata->abiflags.isa_level = max (out_tdata->abiflags.isa_level, + in_tdata->abiflags.isa_level); + out_tdata->abiflags.isa_rev = max (out_tdata->abiflags.isa_rev, + in_tdata->abiflags.isa_rev); + out_tdata->abiflags.gpr_size = max (out_tdata->abiflags.gpr_size, + in_tdata->abiflags.gpr_size); + out_tdata->abiflags.cpr1_size = max (out_tdata->abiflags.cpr1_size, + in_tdata->abiflags.cpr1_size); + out_tdata->abiflags.cpr2_size = max (out_tdata->abiflags.cpr2_size, + in_tdata->abiflags.cpr2_size); +#undef max + out_tdata->abiflags.ases |= in_tdata->abiflags.ases; + out_tdata->abiflags.flags1 |= in_tdata->abiflags.flags1; return TRUE; } @@ -15026,12 +15440,9 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) { struct mips_elf_obj_tdata *out_tdata; struct mips_elf_obj_tdata *in_tdata; - flagword old_flags; - flagword new_flags; - bfd_boolean ok; bfd_boolean null_input_bfd = TRUE; asection *sec; - obj_attribute *out_attr; + bfd_boolean ok; /* Check if we have the same endianness. */ if (! _bfd_generic_verify_endian_match (ibfd, obfd)) @@ -15080,28 +15491,18 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) if (null_input_bfd) return TRUE; - /* Set up the FP ABI attribute from the abiflags if it is not already - set. */ + /* Populate abiflags using existing information. */ if (in_tdata->abiflags_valid) { obj_attribute *in_attr = elf_known_obj_attributes (ibfd)[OBJ_ATTR_GNU]; + Elf_Internal_ABIFlags_v0 in_abiflags; + Elf_Internal_ABIFlags_v0 abiflags; + + /* Set up the FP ABI attribute from the abiflags if it is not already + set. */ if (in_attr[Tag_GNU_MIPS_ABI_FP].i == Val_GNU_MIPS_ABI_FP_ANY) in_attr[Tag_GNU_MIPS_ABI_FP].i = in_tdata->abiflags.fp_abi; - } - if (!mips_elf_merge_obj_attributes (ibfd, obfd)) - return FALSE; - - /* Populate abiflags using existing information. */ - if (!in_tdata->abiflags_valid) - { - infer_mips_abiflags (ibfd, &in_tdata->abiflags); - in_tdata->abiflags_valid = TRUE; - } - else - { - Elf_Internal_ABIFlags_v0 abiflags; - Elf_Internal_ABIFlags_v0 in_abiflags; infer_mips_abiflags (ibfd, &abiflags); in_abiflags = in_tdata->abiflags; @@ -15137,6 +15538,11 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) ".MIPS.abiflags (0x%lx)"), ibfd, (unsigned long) in_abiflags.flags2); } + else + { + infer_mips_abiflags (ibfd, &in_tdata->abiflags); + in_tdata->abiflags_valid = TRUE; + } if (!out_tdata->abiflags_valid) { @@ -15165,208 +15571,16 @@ _bfd_mips_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd) update_mips_abiflags_isa (obfd, &out_tdata->abiflags); } - return TRUE; - } - - /* Update the output abiflags fp_abi using the computed fp_abi. */ - out_attr = elf_known_obj_attributes (obfd)[OBJ_ATTR_GNU]; - out_tdata->abiflags.fp_abi = out_attr[Tag_GNU_MIPS_ABI_FP].i; - -#define max(a,b) ((a) > (b) ? (a) : (b)) - /* Merge abiflags. */ - out_tdata->abiflags.isa_level = max (out_tdata->abiflags.isa_level, - in_tdata->abiflags.isa_level); - out_tdata->abiflags.isa_rev = max (out_tdata->abiflags.isa_rev, - in_tdata->abiflags.isa_rev); - out_tdata->abiflags.gpr_size = max (out_tdata->abiflags.gpr_size, - in_tdata->abiflags.gpr_size); - out_tdata->abiflags.cpr1_size = max (out_tdata->abiflags.cpr1_size, - in_tdata->abiflags.cpr1_size); - out_tdata->abiflags.cpr2_size = max (out_tdata->abiflags.cpr2_size, - in_tdata->abiflags.cpr2_size); -#undef max - out_tdata->abiflags.ases |= in_tdata->abiflags.ases; - out_tdata->abiflags.flags1 |= in_tdata->abiflags.flags1; - - new_flags = elf_elfheader (ibfd)->e_flags; - elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_NOREORDER; - old_flags = elf_elfheader (obfd)->e_flags; - - /* Check flag compatibility. */ - - new_flags &= ~EF_MIPS_NOREORDER; - old_flags &= ~EF_MIPS_NOREORDER; - - /* Some IRIX 6 BSD-compatibility objects have this bit set. It - doesn't seem to matter. */ - new_flags &= ~EF_MIPS_XGOT; - old_flags &= ~EF_MIPS_XGOT; - - /* MIPSpro generates ucode info in n64 objects. Again, we should - just be able to ignore this. */ - new_flags &= ~EF_MIPS_UCODE; - old_flags &= ~EF_MIPS_UCODE; - - /* DSOs should only be linked with CPIC code. */ - if ((ibfd->flags & DYNAMIC) != 0) - new_flags |= EF_MIPS_PIC | EF_MIPS_CPIC; - - if (new_flags == old_flags) - return TRUE; - - ok = TRUE; - - if (((new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0) - != ((old_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) != 0)) - { - (*_bfd_error_handler) - (_("%B: warning: linking abicalls files with non-abicalls files"), - ibfd); ok = TRUE; } + else + ok = mips_elf_merge_obj_e_flags (ibfd, obfd); - if (new_flags & (EF_MIPS_PIC | EF_MIPS_CPIC)) - elf_elfheader (obfd)->e_flags |= EF_MIPS_CPIC; - if (! (new_flags & EF_MIPS_PIC)) - elf_elfheader (obfd)->e_flags &= ~EF_MIPS_PIC; - - new_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC); - old_flags &= ~ (EF_MIPS_PIC | EF_MIPS_CPIC); - - /* Compare the ISAs. */ - if (mips_32bit_flags_p (old_flags) != mips_32bit_flags_p (new_flags)) - { - (*_bfd_error_handler) - (_("%B: linking 32-bit code with 64-bit code"), - ibfd); - ok = FALSE; - } - else if (!mips_mach_extends_p (bfd_get_mach (ibfd), bfd_get_mach (obfd))) - { - /* OBFD's ISA isn't the same as, or an extension of, IBFD's. */ - if (mips_mach_extends_p (bfd_get_mach (obfd), bfd_get_mach (ibfd))) - { - /* Copy the architecture info from IBFD to OBFD. Also copy - the 32-bit flag (if set) so that we continue to recognise - OBFD as a 32-bit binary. */ - bfd_set_arch_info (obfd, bfd_get_arch_info (ibfd)); - elf_elfheader (obfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH); - elf_elfheader (obfd)->e_flags - |= new_flags & (EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE); - - /* Update the ABI flags isa_level, isa_rev, isa_ext fields. */ - update_mips_abiflags_isa (obfd, &out_tdata->abiflags); - - /* Copy across the ABI flags if OBFD doesn't use them - and if that was what caused us to treat IBFD as 32-bit. */ - if ((old_flags & EF_MIPS_ABI) == 0 - && mips_32bit_flags_p (new_flags) - && !mips_32bit_flags_p (new_flags & ~EF_MIPS_ABI)) - elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ABI; - } - else - { - /* The ISAs aren't compatible. */ - (*_bfd_error_handler) - (_("%B: linking %s module with previous %s modules"), - ibfd, - bfd_printable_name (ibfd), - bfd_printable_name (obfd)); - ok = FALSE; - } - } - - new_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE); - old_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH | EF_MIPS_32BITMODE); - - /* Compare ABIs. The 64-bit ABI does not use EF_MIPS_ABI. But, it - does set EI_CLASS differently from any 32-bit ABI. */ - if ((new_flags & EF_MIPS_ABI) != (old_flags & EF_MIPS_ABI) - || (elf_elfheader (ibfd)->e_ident[EI_CLASS] - != elf_elfheader (obfd)->e_ident[EI_CLASS])) - { - /* Only error if both are set (to different values). */ - if (((new_flags & EF_MIPS_ABI) && (old_flags & EF_MIPS_ABI)) - || (elf_elfheader (ibfd)->e_ident[EI_CLASS] - != elf_elfheader (obfd)->e_ident[EI_CLASS])) - { - (*_bfd_error_handler) - (_("%B: ABI mismatch: linking %s module with previous %s modules"), - ibfd, - elf_mips_abi_name (ibfd), - elf_mips_abi_name (obfd)); - ok = FALSE; - } - new_flags &= ~EF_MIPS_ABI; - old_flags &= ~EF_MIPS_ABI; - } - - /* Compare ASEs. Forbid linking MIPS16 and microMIPS ASE modules together - and allow arbitrary mixing of the remaining ASEs (retain the union). */ - if ((new_flags & EF_MIPS_ARCH_ASE) != (old_flags & EF_MIPS_ARCH_ASE)) - { - int old_micro = old_flags & EF_MIPS_ARCH_ASE_MICROMIPS; - int new_micro = new_flags & EF_MIPS_ARCH_ASE_MICROMIPS; - int old_m16 = old_flags & EF_MIPS_ARCH_ASE_M16; - int new_m16 = new_flags & EF_MIPS_ARCH_ASE_M16; - int micro_mis = old_m16 && new_micro; - int m16_mis = old_micro && new_m16; - - if (m16_mis || micro_mis) - { - (*_bfd_error_handler) - (_("%B: ASE mismatch: linking %s module with previous %s modules"), - ibfd, - m16_mis ? "MIPS16" : "microMIPS", - m16_mis ? "microMIPS" : "MIPS16"); - ok = FALSE; - } - - elf_elfheader (obfd)->e_flags |= new_flags & EF_MIPS_ARCH_ASE; - - new_flags &= ~ EF_MIPS_ARCH_ASE; - old_flags &= ~ EF_MIPS_ARCH_ASE; - } - - /* Compare NaN encodings. */ - if ((new_flags & EF_MIPS_NAN2008) != (old_flags & EF_MIPS_NAN2008)) - { - _bfd_error_handler (_("%B: linking %s module with previous %s modules"), - ibfd, - (new_flags & EF_MIPS_NAN2008 - ? "-mnan=2008" : "-mnan=legacy"), - (old_flags & EF_MIPS_NAN2008 - ? "-mnan=2008" : "-mnan=legacy")); - ok = FALSE; - new_flags &= ~EF_MIPS_NAN2008; - old_flags &= ~EF_MIPS_NAN2008; - } - - /* Compare FP64 state. */ - if ((new_flags & EF_MIPS_FP64) != (old_flags & EF_MIPS_FP64)) - { - _bfd_error_handler (_("%B: linking %s module with previous %s modules"), - ibfd, - (new_flags & EF_MIPS_FP64 - ? "-mfp64" : "-mfp32"), - (old_flags & EF_MIPS_FP64 - ? "-mfp64" : "-mfp32")); - ok = FALSE; - new_flags &= ~EF_MIPS_FP64; - old_flags &= ~EF_MIPS_FP64; - } + ok = mips_elf_merge_obj_attributes (ibfd, obfd) && ok; - /* Warn about any other mismatches */ - if (new_flags != old_flags) - { - (*_bfd_error_handler) - (_("%B: uses different e_flags (0x%lx) fields than previous modules (0x%lx)"), - ibfd, (unsigned long) new_flags, - (unsigned long) old_flags); - ok = FALSE; - } + ok = mips_elf_merge_obj_abiflags (ibfd, obfd) && ok; - if (! ok) + if (!ok) { bfd_set_error (bfd_error_bad_value); return FALSE; @@ -15532,6 +15746,8 @@ print_mips_ases (FILE *file, unsigned int mask) fputs ("\n\tDSP ASE", file); if (mask & AFL_ASE_DSPR2) fputs ("\n\tDSP R2 ASE", file); + if (mask & AFL_ASE_DSPR3) + fputs ("\n\tDSP R3 ASE", file); if (mask & AFL_ASE_EVA) fputs ("\n\tEnhanced VA Scheme", file); if (mask & AFL_ASE_MCU) @@ -16118,6 +16334,9 @@ _bfd_mips_post_process_headers (bfd *abfd, struct bfd_link_info *link_info) if (mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64 || mips_elf_tdata (abfd)->abiflags.fp_abi == Val_GNU_MIPS_ABI_FP_64A) i_ehdrp->e_ident[EI_ABIVERSION] = 3; + + if (elf_stack_flags (abfd) && !(elf_stack_flags (abfd) & PF_X)) + i_ehdrp->e_ident[EI_ABIVERSION] = 5; } int