X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=cpu%2FChangeLog;h=e3074582cbe5474f97b7b3780a92c15a9a7da498;hb=67ce483baa43121a17195efe4b14a183e9fd8232;hp=2afbaf2d9d872c1749357e51c4129e7d7b99b0c2;hpb=ab5f875d24fd1eee651b37a7a01d069dd3b56f00;p=deliverable%2Fbinutils-gdb.git diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 2afbaf2d9d..e3074582cb 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,215 @@ +2018-07-24 Alan Modra + + PR 23430 + * or1kcommon.cpu (spr-reg-indices): Fix description typo. + +2018-05-09 Sebastian Rasmussen + + * or1kcommon.cpu (spr-reg-info): Typo fix. + +2018-03-03 Alan Modra + + * frv.opc: Include opintl.h. + (add_next_to_vliw): Use opcodes_error_handler to print error. + Standardize error message. + (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. + +2018-01-13 Nick Clifton + + 2.30 branch created. + +2017-03-15 Stafford Horne + + * or1kcommon.cpu: Add pc set semantics to also update ppc. + +2016-10-06 Alan Modra + + * mep.opc (expand_string): Add fall through comment. + +2016-03-03 Alan Modra + + * fr30.cpu (f-m4): Replace bogus comment with a better guess + at what is really going on. + +2016-03-02 Alan Modra + + * fr30.cpu (f-m4): Replace -1 << 4 with -16. + +2016-02-02 Andrew Burgess + + * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to + a constant to better align disassembler output. + +2014-07-20 Stefan Kristiansson + + * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. + +2014-06-12 Alan Modra + + * or1k.opc: Whitespace fixes. + +2014-05-08 Stefan Kristiansson + + * or1korbis.cpu (h-atomic-reserve): New hardware. + (h-atomic-address): Likewise. + (insn-opcode): Add opcodes for LWA and SWA. + (atomic-reserve): New operand. + (atomic-address): Likewise. + (l-lwa, l-swa): New instructions. + (l-lbs): Fix typo in comment. + (store-insn): Clear atomic reserve on store to atomic-address. + Fix register names in fmt field. + +2014-04-22 Christian Svensson + + * openrisc.cpu: Delete. + * openrisc.opc: Delete. + * or1k.cpu: New file. + * or1k.opc: New file. + * or1kcommon.cpu: New file. + * or1korbis.cpu: New file. + * or1korfpx.cpu: New file. + +2013-12-07 Mike Frysinger + + * epiphany.opc: Remove +x file mode. + +2013-03-08 Yann Sionneau + + PR binutils/15241 + * lm32.cpu (Control and status registers): Add CFG2, PSW, + TLBVADDR, TLBPADDR and TLBBADVADDR. + +2012-11-30 Oleg Raikhman + Joern Rennecke + + * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. + (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. + (testset-insn): Add NO_DIS attribute to t.l. + (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. + (move-insns): Add NO-DIS attribute to cmov.l. + (op-mmr-movts): Add NO-DIS attribute to movts.l. + (op-mmr-movfs): Add NO-DIS attribute to movfs.l. + (op-rrr): Add NO-DIS attribute to .l. + (shift-rrr): Add NO-DIS attribute to .l. + (op-shift-rri): Add NO-DIS attribute to i32.l. + (bitrl, movtl): Add NO-DIS attribute. + (op-iextrrr): Add NO-DIS attribute to .l + (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. + (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. + +2012-02-27 Alan Modra + + * mt.opc (print_dollarhex): Trim values to 32 bits. + +2011-12-15 Nick Clifton + + * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit + hosts. + +2011-10-26 Joern Rennecke + + * epiphany.opc (parse_branch_addr): Fix type of valuep. + Cast value before printing it as a long. + (parse_postindex): Fix type of valuep. + +2011-10-25 Joern Rennecke + + * cpu/epiphany.cpu: New file. + * cpu/epiphany.opc: New file. + +2011-08-22 Nick Clifton + + * fr30.cpu: Newly contributed file. + * fr30.opc: Likewise. + * ip2k.cpu: Likewise. + * ip2k.opc: Likewise. + * mep-avc.cpu: Likewise. + * mep-avc2.cpu: Likewise. + * mep-c5.cpu: Likewise. + * mep-core.cpu: Likewise. + * mep-default.cpu: Likewise. + * mep-ext-cop.cpu: Likewise. + * mep-fmax.cpu: Likewise. + * mep-h1.cpu: Likewise. + * mep-ivc2.cpu: Likewise. + * mep-rhcop.cpu: Likewise. + * mep-sample-ucidsp.cpu: Likewise. + * mep.cpu: Likewise. + * mep.opc: Likewise. + * openrisc.cpu: Likewise. + * openrisc.opc: Likewise. + * xstormy16.cpu: Likewise. + * xstormy16.opc: Likewise. + +2010-10-08 Pierre Muller + + * frv.opc: #undef DEBUG. + +2010-07-03 DJ Delorie + + * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. + +2010-02-11 Doug Evans + + * m32r.cpu (HASH-PREFIX): Delete. + (duhpo, dshpo): New pmacros. + (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. + (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX + attribute, define with dshpo. + (uimm24): Delete HASH-PREFIX attribute. + * m32r.opc (CGEN_PRINT_NORMAL): Delete. + (print_signed_with_hash_prefix): New function. + (print_unsigned_with_hash_prefix): New function. + * xc16x.cpu (dowh): New pmacro. + (upof16): Define with dowh, specify print handler. + (qbit, qlobit, qhibit): Ditto. + (upag16): Ditto. + * xc16x.opc (CGEN_PRINT_NORMAL): Delete. + (print_with_dot_prefix): New functions. + (print_with_pof_prefix, print_with_pag_prefix): New functions. + +2010-01-24 Doug Evans + + * frv.cpu (floating-point-conversion): Update call to fp conv op. + (floating-point-dual-conversion, ne-floating-point-dual-conversion, + conditional-floating-point-conversion, ne-floating-point-conversion, + float-parallel-mul-add-double-semantics): Ditto. + +2010-01-05 Doug Evans + + * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. + (f-dsp-40-u20, f-dsp-40-u24): Ditto. + +2010-01-02 Doug Evans + + * m32c.opc (parse_signed16): Fix typo. + +2009-12-11 Nick Clifton + + * frv.opc: Fix shadowed variable warnings. + * m32c.opc: Fix shadowed variable warnings. + +2009-11-14 Doug Evans + + Must use VOID expression in VOID context. + * xc16x.cpu (mov4): Fix mode of `sequence'. + (mov9, mov10): Ditto. + (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. + (callr, callseg, calls, trap, rets, reti): Ditto. + (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. + (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. + (exts, exts1, extsr, extsr1, prior): Ditto. + +2009-10-23 Doug Evans + + * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. + cgen-ops.h -> cgen/basic-ops.h. + +2009-09-25 Alan Modra + + * m32r.cpu (stb-plus): Typo fix. + 2009-09-23 Doug Evans * m32r.cpu (sth-plus): Fix address mode and calculation. @@ -91,7 +303,7 @@ (dst32-16-16sa-Unprefixed-*): New (jsri): Fix operands. (setzx): Fix encoding. - + 2007-03-08 Alan Modra * m32r.opc: Formatting. @@ -113,7 +325,7 @@ (parse_signed_bitbase8): Likewise. (parse_signed_bitbase11): Likewise. (parse_signed_bitbase19): Likewise. - + 2006-03-13 DJ Delorie * m32c.cpu (Bit3-S): New. @@ -150,10 +362,10 @@ attribute. (jsri16, jsri32): Add 1ADDR attribute. (jsr32.w, jsr32.a): Add JUMP attribute. - + 2006-02-17 Shrirang Khisti - Anil Paranjape - Shilin Shakti + Anil Paranjape + Shilin Shakti * xc16x.cpu: New file containing complete CGEN specific XC16X CPU description. @@ -254,7 +466,7 @@ stzx16-imm8-imm8-abs16): Fix operand typos. * m32c.opc (m32c_asm_hash): Support bnCND. (parse_signed4n, print_signed4n): New. - + 2005-10-26 DJ Delorie * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. @@ -328,7 +540,7 @@ Fix compile time warnings about signedness mismatches. Remove dead code. (parse_lab_5_3): New parser function. - + 2005-07-16 Jim Blandy * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, @@ -695,6 +907,12 @@ * New file. +Copyright (C) 2003-2012 Free Software Foundation, Inc. + +Copying and distribution of this file, with or without modification, +are permitted in any medium without royalty provided the copyright +notice and this notice are preserved. + Local Variables: mode: change-log left-margin: 8