X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=cpu%2FChangeLog;h=f2ac243c68e1e70714ba7cff81a039f569649ba7;hb=1ce22eebea40573551c2db2e7c83951154d14c81;hp=3e8f019e353eab91735db1884f25dbb8cce15e85;hpb=0c115f8483ac32dc95fde902cac8c8bb99f9c3be;p=deliverable%2Fbinutils-gdb.git

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 3e8f019e35..f2ac243c68 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,75 @@
+2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
+	* bpf.opc (bpf_print_insn): Do not set endian_code here.
+
+2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+	* mep.opc (print_slot_insn): Pass the insn endianness to
+	cgen_get_insn_value.
+
+2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
+	    David Faust <david.faust@oracle.com>
+
+	* bpf.cpu (define-alu-insn-un): Add definitions of semantics.
+	(define-alu-insn-mov): Likewise.
+	(daib): Likewise.
+	(define-alu-instructions): Likewise.
+	(define-endian-insn): Likewise.
+	(define-lddw): Likewise.
+	(dlabs): Likewise.
+	(dlind): Likewise.
+	(dxli): Likewise.
+	(dxsi): Likewise.
+	(dsti): Likewise.
+	(define-ldstx-insns): Likewise.
+	(define-st-insns): Likewise.
+	(define-cond-jump-insn): Likewise.
+	(dcji): Likewise.
+	(define-condjump-insns): Likewise.
+	(define-call-insn): Likewise.
+	(ja): Likewise.
+	("exit"): Likewise.
+	(define-atomic-insns): Likewise.
+	(sem-exchange-and-add): New macro.
+	* bpf.cpu ("brkpt"): New instruction.
+	(bpfbf): Set word-bitsize to 32 and insn-endian big.
+	(h-gpr): Prefer r0 to `a' and r6 to `ctx'.
+	(h-pc): Expand definition.
+	* bpf.opc (bpf_print_insn): Set endian_code to BIG.
+
+2020-05-21  Alan Modra  <amodra@gmail.com>
+
+	* mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
+	"if (x) free (x)" with "free (x)".
+
+2020-05-19  Stafford Horne  <shorne@gmail.com>
+
+	PR 25184
+	* or1k.cpu (arch or1k): Remove or64 and or64nd machs.
+	(ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
+	(cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
+	* or1kcommon.cpu (h-fdr): Remove hardware.
+	* or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
+	(float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
+	(float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
+	(float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
+	(lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
+
+2020-02-16  David Faust  <david.faust@oracle.com>
+
+	* bpf.cpu (define-cond-jump-insn): Renamed from djci.
+	(dcji) New version with support for JMP32
+
+2020-02-03  Alan Modra  <amodra@gmail.com>
+
+	* m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
+
+2020-02-01  Alan Modra  <amodra@gmail.com>
+
+	* frv.cpu (f-u12): Multiply rather than left shift signed values.
+	(f-label16, f-label24): Likewise.
+
 2020-01-30  Alan Modra  <amodra@gmail.com>
 
 	* m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.