X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=cpu%2Fiq2000.cpu;h=cb9cfae1d43e173f8ea6401e6d96d757bc72c055;hb=e822f2cda9bc484adb5f8860050640a5c6f1ced9;hp=2a34859af8e42b1e60f94ee90f2e4e8741b2783a;hpb=539ee71a87838a10f843d7b1ef64975afba1b20e;p=deliverable%2Fbinutils-gdb.git diff --git a/cpu/iq2000.cpu b/cpu/iq2000.cpu index 2a34859af8..cb9cfae1d4 100644 --- a/cpu/iq2000.cpu +++ b/cpu/iq2000.cpu @@ -1,14 +1,13 @@ ; IQ2000/IQ10 Common CPU description. -*- Scheme -*- +; Copyright 2001, 2002, 2007, 2009 Free Software Foundation, Inc. ; -; Copyright 2000, 2001, 2002 Free Software Foundation, Inc. -; -; Contributed by Red Hat Inc; developed under contract from Vitesse. +; Contributed by Red Hat Inc; developed under contract from Fujitsu. ; ; This file is part of the GNU Binutils. ; ; This program is free software; you can redistribute it and/or modify ; it under the terms of the GNU General Public License as published by -; the Free Software Foundation; either version 2 of the License, or +; the Free Software Foundation; either version 3 of the License, or ; (at your option) any later version. ; ; This program is distributed in the hope that it will be useful, @@ -18,7 +17,8 @@ ; ; You should have received a copy of the GNU General Public License ; along with this program; if not, write to the Free Software -; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +; MA 02110-1301, USA. (include "simplify.inc") @@ -207,7 +207,7 @@ (df f-offset "pc offset field" (PCREL-ADDR) 15 16 INT ; Actually, this is relative to the address of the delay slot. ((value pc) (sra SI (sub SI value pc) 2)) - ((value pc) (add SI (sll SI value 2) (add pc 4)))) + ((value pc) (add SI (mul SI value 4) (add pc 4)))) ; Instruction fields that scarcely appear in instructions. @@ -350,10 +350,10 @@ (name (.sym USES- (.upcase regfield))) (comment ("insn accesses register operand " regfield)))) -(define-reg-use-attr rd) -(define-reg-use-attr rs) -(define-reg-use-attr rt) -(define-reg-use-attr r31) +(define-reg-use-attr "rd") +(define-reg-use-attr "rs") +(define-reg-use-attr "rt") +(define-reg-use-attr "r31") ; Operands. @@ -374,7 +374,7 @@ (dnop maskq10 "iq10 mask" () h-uint f-maskq10) (dnop maskl "mask left" () h-uint f-maskl) (dnop count "count" () h-uint f-count) -(dnop index "index" () h-uint f-index) +(dnop _index "index" () h-uint f-index) (dnop execode "execcode" () h-uint f-excode) (dnop bytecount "byte count" () h-uint f-bytecount) (dnop cam-y "cam global opn y" () h-uint f-cam-y) @@ -1194,6 +1194,3 @@ (if (keep-mach? (iq10)) (include "iq10.cpu")) - - -