X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=cpu%2Fm32c.cpu;h=ab65fc13626731ce6d2a03fc0fbaf4ede1f1115e;hb=22aa1d51198689f5f3f01a874b405bf4449cbfb0;hp=bcc36161f7cb374c98ee1f010acb2b16b8768a1b;hpb=21375995bd28258d997c67b0736426e5aabc581b;p=deliverable%2Fbinutils-gdb.git diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu index bcc36161f7..ab65fc1362 100644 --- a/cpu/m32c.cpu +++ b/cpu/m32c.cpu @@ -240,7 +240,7 @@ ; r1l 10'b 11'b ; r1h 11'b 01'b (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT - ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert + ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract ) ; QI mode gr encoding for m32c is different than for m16c. The hardware @@ -252,7 +252,7 @@ ; r1l 10'b 11'b ; r1h 11'b 01'b (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT - ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert + ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract ) ; HI mode gr encoding for m32c is different than for m16c. The hardware @@ -316,11 +316,11 @@ ; r1l 10'b 11'b ; r1h 11'b 01'b (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT - ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert + ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract ) (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT - ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert + ((value pc) (or USI (and (inv (sll value 1)) 2) (and (srl value 1) 1))) ; insert ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract ) ; HI mode gr encoding for m32c is different than for m16c. The hardware @@ -436,42 +436,42 @@ (df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT ((value pc) (or UHI - (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))) ; insert + (and (srl value 8) #xff) + (sll (and value #xff) 8))) ; insert ((value pc) (or UHI - (and UHI (srl UHI value 8) #x00ff) - (and UHI (sll UHI value 8) #xff00))) ; extract + (and UHI (srl UHI value 8) #xff) + (sll UHI (and UHI value #xff) 8))) ; extract ) (df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; insert + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; insert ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; extract + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; extract ) (df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT ((value pc) (or UHI - (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))) ; insert + (and (srl value 8) #xff) + (sll (and value #xff) 8))) ; insert ((value pc) (or UHI - (and UHI (srl UHI value 8) #x00ff) - (and UHI (sll UHI value 8) #xff00))) ; extract + (and UHI (srl UHI value 8) #xff) + (sll UHI (and UHI value #xff) 8))) ; extract ) (df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; insert + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; insert ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; extract + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; extract ) (dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT @@ -504,79 +504,82 @@ (df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT ((value pc) (or UHI - (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))) ; insert + (and (srl value 8) #xff) + (sll (and value #xff) 8))) ; insert ((value pc) (or UHI - (and UHI (srl UHI value 8) #x00ff) - (and UHI (sll UHI value 8) #xff00))) ; extract + (and UHI (srl UHI value 8) #xff) + (sll UHI (and UHI value #xff) 8))) ; extract ) (df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; insert + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; insert ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; extract + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; extract ) (df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT ((value pc) (or UHI - (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))) ; insert + (and (srl value 8) #xff) + (sll (and value #xff) 8))) ; insert ((value pc) (or UHI - (and UHI (srl UHI value 8) #x00ff) - (and UHI (sll UHI value 8) #xff00))) ; extract + (and UHI (srl UHI value 8) #xff) + (sll UHI (and UHI value #xff) 8))) ; extract ) (df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; insert + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; insert ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; extract + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; extract ) (df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT ((value pc) (or UHI - (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))) ; insert + (and (srl value 8) #xff) + (sll (and value #xff) 8))) ; insert ((value pc) (or UHI - (and UHI (srl UHI value 8) #x00ff) - (and UHI (sll UHI value 8) #xff00))) ; extract + (and UHI (srl UHI value 8) #xff) + (sll UHI (and UHI value #xff) 8))) ; extract ) (df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; insert + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; insert ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; extract + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; extract ) (df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT ((value pc) (or UHI - (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))) ; insert + (and (srl value 8) #xff) + (sll (and value #xff) 8))) ; insert ((value pc) (or UHI - (and UHI (srl UHI value 8) #x00ff) - (and UHI (sll UHI value 8) #xff00))) ; extract + (and UHI (srl UHI value 8) #xff) + (sll UHI (and UHI value #xff) 8))) ; extract ) (df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT - ((value pc) (or SI - (or (and (srl value 16) #xff) (and value #xff00)) - (sll (ext INT (trunc QI (and value #xff))) 16))) - ((value pc) (or SI - (or (and (srl value 16) #xff) (and value #xff00)) - (sll (ext INT (trunc QI (and value #xff))) 16))) + ((value pc) (sub SI (xor (or SI (or (and (srl value 16) #xff) + (and value #xff00)) + (sll (and value #xff) 16)) + #x800000) #x800000)) + ((value pc) (sub SI (xor (or SI + (or (and (srl value 16) #xff) + (and value #xff00)) + (sll (and value #xff) 16)) + #x800000) #x800000)) ) (df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT @@ -717,22 +720,22 @@ (ext INT (or SI (or SI - (and (srl value 24) #x000000ff) - (and (srl value 8) #x0000ff00)) + (and (srl value 24) #x00ff) + (and (srl value 8) #xff00)) (or SI - (and (sll value 8) #x00ff0000) - (and (sll value 24) #xff000000))))) + (sll (and value #xff00) 8) + (sll (and value #x00ff) 24))))) ;; extract ((value pc) (ext INT (or SI (or SI - (and (srl value 24) #x000000ff) - (and (srl value 8) #x0000ff00)) + (and (srl value 24) #x00ff) + (and (srl value 8) #xff00)) (or SI - (and (sll value 8) #x00ff0000) - (and (sll value 24) #xff000000))))) + (sll (and value #xff00) 8) + (sll (and value #x00ff) 24))))) ) (dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT @@ -743,7 +746,7 @@ ) (sequence () ; extract (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff) - (and (sll (ifield f-dsp-64-u16) 16) #xffff0000))) + (sll (and (ifield f-dsp-64-u16) #xffff) 16))) ) ) @@ -755,7 +758,7 @@ ) (sequence () ; extract (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff) - (and (sll (ifield f-dsp-64-u16) 16) #xffff0000))) + (sll (and (ifield f-dsp-64-u16) #xffff) 16))) ) ) @@ -778,12 +781,12 @@ (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; insert + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; insert ((value pc) (ext INT (trunc HI - (or (and (srl value 8) #x00ff) - (and (sll value 8) #xff00))))) ; extract + (or (and (srl value 8) #xff) + (sll (and value #xff) 8))))) ; extract ) ;------------------------------------------------------------- @@ -824,7 +827,7 @@ (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3)) ) (sequence () ; extract - (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3) + (set (ifield f-bitbase32-16-s11-unprefixed) (or (mul (ifield f-dsp-16-s8) 8) (ifield f-bitno32-unprefixed))) ) ) @@ -846,7 +849,7 @@ (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3)) ) (sequence () ; extract - (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3) + (set (ifield f-bitbase32-16-s19-unprefixed) (or (mul (ifield f-dsp-16-s16) 8) (ifield f-bitno32-unprefixed))) ) ) @@ -882,7 +885,7 @@ (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3)) ) (sequence () ; extract - (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3) + (set (ifield f-bitbase32-24-s11-prefixed) (or (mul (ifield f-dsp-24-s8) 8) (ifield f-bitno32-prefixed))) ) ) @@ -910,7 +913,7 @@ ) (sequence () ; extract (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3) - (or (sll (ifield f-dsp-32-s8) 11) + (or (mul (ifield f-dsp-32-s8) 2048) (ifield f-bitno32-prefixed)))) ) ) @@ -956,9 +959,12 @@ ) (df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8) - (srl (and (sub value (add pc 1)) #xffff) 8))) - ((value pc) (add SI (or (srl (and value #xffff) 8) - (sra (sll (and value #xff) 24) 16)) (add pc 1))) + (srl (and (sub value (add pc 1)) #xff00) 8))) + ((value pc) (add SI (sub (xor (or (srl (and value #xff00) 8) + (sll (and value #xff) 8)) + #x8000) + #x8000) + (add pc 1))) ) (df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT ((value pc) (or SI @@ -1069,7 +1075,7 @@ (indices keyword "" (("r2r0" 0) ("r3r1" 1))) (get (index) (or SI (and (reg h-gr index) #xffff) - (and (sll (reg h-gr (add index 2)) 16) #xffff0000))) + (sll (and (reg h-gr (add index 2)) #xffff) 16))) (set (index newval) (sequence () (set (reg h-gr index) (and newval #xffff)) (set (reg h-gr (add index 2)) (srl newval 16)))))