X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2FChangeLog;h=2690c5b9a90bc52aba94beb096526c495c74d374;hb=9622b051cf36414e121c0c2e63c099e588801e0e;hp=077395ac5b608badcfe1e200ca00996afde08919;hpb=1df69f4f6c134c94f81ef6fe0229bc4da0e66411;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/ChangeLog b/gas/ChangeLog index 077395ac5b..2690c5b9a9 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,185 @@ +2006-06-06 Ben Elliston + Anton Blanchard + + * config/tc-ppc.c (parse_cpu): Handle "-mpower6". + (md_show_usage): Document it. + (ppc_setup_opcodes): Test power6 opcode flag bits. + * doc/c-ppc.texi (PowerPC-Opts): Document "-mpower6". + +2006-06-06 Thiemo Seufer + Chao-ying Fu + + * config/tc-mips.c (ISA_SUPPORTS_DSP64): New macro. + (CPU_HAS_MIPS3D, CPU_HAS_MDMX, CPU_HAS_DSP, CPU_HAS_MT): Delete. + (macro_build): Update comment. + (mips_ip): Allow DSP64 instructions for MIPS64R2. + (mips_after_parse_args): Remove uses of CPU_HAS_MIPS3D and + CPU_HAS_MDMX. + (mips_cpu_info): Fix formatting. Add MIPS_CPU_ASE_MIPS3D and + MIPS_CPU_ASE_MDMX flags for sb1. + +2006-06-05 Thiemo Seufer + + * config/tc-mips.c (macro_build): Use INSERT_OPERAND wherew + appropriate. + (mips16_macro_build): Use MIPS16_INSERT_OPERAND where appropriate. + (mips_ip): Make overflowed/underflowed constant arguments in DSP + and MT instructions a fatal error. Use INSERT_OPERAND where + appropriate. Improve warnings for break and wait code overflows. + Use symbolic constant of OP_MASK_COPZ. + (mips16_ip): Use MIPS16_INSERT_OPERAND where appropriate. + +2006-06-05 Daniel Jacobowitz + + * po/Make-in (top_builddir): Define. + +2006-06-02 Joseph S. Myers + + * doc/Makefile.am (TEXI2DVI): Define. + * doc/Makefile.in: Regenerate. + * doc/c-arc.texi: Fix typo. + +2006-06-01 Alan Modra + + * config/obj-ieee.c: Delete. + * config/obj-ieee.h: Delete. + * Makefile.am (OBJ_FORMATS): Remove ieee. + (OBJ_FORMAT_CFILES, OBJ_FORMAT_HFILES): Similarly. + (obj-ieee.o): Remove rule. + * Makefile.in: Regenerate. + * configure.in (atof): Remove tahoe. + (OBJ_MAYBE_IEEE): Don't define. + * configure: Regenerate. + * config.in: Regenerate. + * doc/Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2006-05-31 Daniel Jacobowitz + + * Makefile.am: Replace INTLLIBS and INTLDEPS with LIBINTL + and LIBINTL_DEP everywhere. + (INTLLIBS): Remove. + (INCLUDES, DEP_INCLUDES): Use @INCINTL@. + * acinclude.m4: Include new gettext macros. + * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS. + Remove local code for po/Makefile. + * Makefile.in, configure, doc/Makefile.in: Regenerated. + +2006-05-30 Nick Clifton + + * po/es.po: Updated Spanish translation. + +2006-05-06 Denis Chertykov + + * doc/c-avr.texi: New file. + * doc/Makefile.am (CPU_DOCS): Add c-avr.texi + * doc/all.texi: Set AVR + * doc/as.texinfo: Include c-avr.texi + +2006-05-28 Jie Zhang + + * config/bfin-parse.y (check_macfunc): Loose the condition of + calling check_multiply_halfregs (). + +2006-05-25 Jie Zhang + + * config/bfin-parse.y (asm_1): Better check and deal with + vector and scalar Multiply 16-Bit Operands instructions. + +2006-05-24 Nick Clifton + + * config/tc-hppa.c: Convert to ISO C90 format. + * config/tc-hppa.h: Likewise. + +2006-05-24 Carlos O'Donell + Randolph Chung + + * config/tc-hppa.c (is_tls_gdidx, is_tls_ldidx, is_tls_dtpoff, + is_tls_ieoff, is_tls_leoff): Define. + (fix_new_hppa): Handle TLS. + (cons_fix_new_hppa): Likewise. + (pa_ip): Likewise. + (md_apply_fix): Handle TLS relocs. + * config/tc-hppa.h (hppa_fix_adjustable): Handle TLS. + +2006-05-24 Bjoern Haase + + * config/tc-avr.c: Add new cpu targets avr6, avr2560 and avr2561. + +2006-05-23 Thiemo Seufer + David Ung + Nigel Stephens + + [ gas/ChangeLog ] + * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename. + (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS, + ISA_HAS_MXHC1): New macros. + (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of + ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments. + (mips_cpu_info): Change to use combined ASE/IS_ISA flag. + (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, + MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines. + (mips_after_parse_args): Change default handling of float register + size to account for 32bit code with 64bit FP. Better sanity checking + of ISA/ASE/ABI option combinations. + (s_mipsset): Support switching of GPR and FPR sizes via + .set {g,f}p={32,64,default}. Better sanity checking for .set ASE + options. + (mips_elf_final_processing): We should record the use of 64bit FP + registers in 32bit code but we don't, because ELF header flags are + a scarce ressource. + (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE + extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef, + 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions. + (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA. + * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document + missing -march options. Document .set arch=CPU. Move .set smartmips + to ASE page. Use @code for .set FOO examples. + +2006-05-23 Jie Zhang + + * config/tc-bfin.c (bfin_start_line_hook): Bump line counters + if needed. + +2006-05-23 Jie Zhang + + * config/bfin-defs.h (bfin_equals): Remove declaration. + * config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr". + * config/tc-bfin.c (bfin_name_is_register): Remove. + (bfin_equals): Remove. + * config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1. + (bfin_name_is_register): Remove declaration. + +2006-05-19 Thiemo Seufer + Nigel Stephens + + * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define. + (mips_oddfpreg_ok): New function. + (mips_ip): Use it. + +2006-05-19 Thiemo Seufer + David Ung + + * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare. + * config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS, + ISA_HAS_DROR, ISA_HAS_ROR): Reformat. + (regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC, + RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK, + RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES, + FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES, + N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES, + SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES, + MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names, + reg_names_o32, reg_names_n32n64): Define register classes. + (reg_lookup): New function, use register classes. + (md_begin): Reserve register names in the symbol table. Simplify + OBJ_ELF defines. + (mips_ip): Fix comment formatting. Handle symbolic COP0 registers. + Use reg_lookup. + (mips16_ip): Use reg_lookup. + (tc_get_register): Likewise. + (tc_mips_regname_to_dw2regnum): New function. + 2006-05-19 Thiemo Seufer * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):