X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2FChangeLog;h=73398b3b5141b9433fa9a1fb0bff90aedb6596f9;hb=9306ca4a205ea71479693f53f777ab04f55b4d49;hp=b0dcda7201e86fcaa4aaaea0e513949e6737a725;hpb=f7870c8d99fd6d6c6d29b5c34cd27a8bbe04417f;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/ChangeLog b/gas/ChangeLog index b0dcda7201..73398b3b51 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,872 @@ +2004-11-04 Jan Beulich + + * config/tc-i386.c (set_intel_syntax): Allow % in symbol names when + intel syntax and no register prefix, allow $ in symbol names when + intel syntax. + (set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX. + (intel_float_operand): Add fourth return value indicating math control + operations. Make classification more precise. + (md_assemble): Complain if memory operand of mov[sz]x has no size + specified. + (parse_insn): Translate word operands to floating point instructions + operating on integers as well as control instructions to short ones + as expected by AT&T syntax. Translate 'd' suffix to short one only for + floating point instructions operating on non-integer operands. + (match_template): Remove fldcw special case. Adjust q-suffix handling + to permit it on fild/fistp/fisttp in AT&T mode. + (process_suffix): Don't guess DefaultSize insns' suffix from + stackop_size for certain floating point control instructions. Guess + suffix for branch and [ls][gi]dt based on flag_code. Split error + messages for Intel and AT&T syntax, and make the condition more strict + for the former. Adjust suppressing of generation of operand size + overrides. + (intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE, + OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add + more error checking. + * config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR + SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines. + +2004-11-03 Hans-Peter Nilsson + + * symbols.c (colon) [!WORKING_DOT_WORD]: Don't declare + md_short_jump_size, md_long_jump_size. + * write.c [!WORKING_DOT_WORD]: Ditto. + * tc.h [!WORKING_DOT_WORD]: Declare them here. Drop const + qualifier. + * config/tc-cris.h (md_short_jump_size, md_long_jump_size): Don't + declare. + * config/tc-cris.c (md_short_jump_size, md_long_jump_size): Drop + const qualifier in these definitions. + * config/tc-i370.c, config/tc-m68k.c, config/tc-pdp11.c, + config/tc-s390.c, config/tc-tahoe.c, config/tc-vax.c: Ditto. + +2004-11-02 Nick Clifton + + * dwarf2dbg.c (dwarf2_finish): Check for the existence of a file + table before deciding to produce a .debug_line section to match up + with a user provided .debug_info section. + +2004-10-28 Tomer Levi + + * config/tc-crx.c (getreg_image): Bug fix, a return value was + mistakenly omitted from CRX_C_REGTYPE and CRX_CS_REGTYPE cases. + +2004-10-27 Tomer Levi + + * config/tc-crx.c: Remove global variable 'post_inc_mode'. + (get_flags): New function. + (get_number_of_bits): Edit comments, update numeric values to supported + sizes. + (process_label_constant): Don't support the colon format (SYMBOL:[s|m|l]). + (set_cons_rparams): Support argument type 'arg_rbase'. + (get_operandtype): Bug fix in 'rbase' operand type parsing. + (handle_LoadStor): Bug fix, first handle post-increment mode. + (getreg_image): Remove redundant code, update according to latest CRX spec. + (print_constant): Bug fix relate to 3-word instructions. + (assemble_insn): Bug fix, when matching instructions, verify also + instruction type (not only mnemonic). + Add various error checking. + (preprocess_reglist): Support HI/LO and user registers. + +2004-10-25 David Mosberger-Tang + + * config/tc-ia64.c (fixup_unw_records): Don't let the "t" value + in an epilogue directive go negative. + +2004-10-25 H.J. Lu + + PR 474 + * config/tc-ia64.c (emit_one_bundle): Decrement md.num_slots_in_use + after reporting template error during manual bundling. Reported + by Michael Dupont, michaelx.dupont@intel.com. + +2004-10-25 Daniel Jacobowitz + + * Makefile.am: Run dep-am. + * aclocal.m4: Regenerate with automake 1.9.2. + * Makefile.in: Regenerate with automake 1.9.2. + * doc/Makefile.in: Likewise. + + * config/tc-arm.c: Include "dw2gencfi.h". + (tc_arm_regname_to_dw2regnum, tc_arm_frame_initial_instructions): + New functions. + * config/tc-arm.h (TARGET_USE_CFIPOP, DWARF2_DEFAULT_RETURN_COLUMN) + (DWARF2_CIE_DATA_ALIGNMENT, tc_regname_to_dw2regnum) + (tc_cfi_frame_initial_instructions): Define. + (tc_arm_regname_to_dw2regnum, tc_arm_frame_initial_instructions): + Add prototypes. + +2004-10-21 Tomer Levi + + * config/tc-crx.c (assemble_insn): Check unsigned immediate + operands validity. + Update coprocessor id to be unsigned immediate. + +2004-10-18 Aaron W. LaFramboise + + * config/tc-i386.c (O_secrel): Delete. + (tc_pe_dwarf2_emit_offset): New function. + * config/tc-i386.h (O_secrel): Define as O_md1. + (TC_DWARF2_EMIT_OFFSET): Define. + +2004-10-18 Nick Clifton + + * config/tc-xstormy16.c (xstormy16_cons_fix_new): Accept and + ignore @fptr() directives for 4-byte fixups. + +2004-10-15 Alan Modra + + * Makefile.am: Run "make dep-am" + * Makefile.in: Regenerate. + +2004-10-14 Bob Wilson + + * doc/c-xtensa.texi (Xtensa Options, Absolute Literals Directive): + Remove comments about placement of literal pools. + (Literal Directive): Update description of literal placement. + (Literal Prefix Directive): Remove statement that this does not apply + to absolute-mode literals. Describe new section naming scheme. + +2004-10-12 Bob Wilson + + * config/tc-xtensa.c (xtensa_frequency_pseudo): Use set_subseg_freq. + (is_entry_opcode, is_movi_opcode, is_the_loop_opcode, is_jx_opcode, + is_windowed_return_opcode): Delete. + (xtensa_frob_label): Use get_subseg_target_freq. + (md_assemble): Inline call to is_entry_opcode. + (xtensa_handle_align): Inline call to get_frag_is_literal. + (relaxation_requirements): Inline call to is_jx_opcode. + (emit_single_op): Inline call to is_movi_opcode. + (xg_assemble_vliw_tokens): Inline calls to get_frag_is_insn, + get_frag_is_no_transform, is_entry_opcode, and + set_frag_is_specific_opcode. Use get_subseg_total_freq. + (xtensa_fix_a0_b_retw_frags, xtensa_fix_b_j_loop_end_frags, + xtensa_fix_close_loop_end_frags, relax_frag_immed, convert_frag_immed): + Inline calls to get_frag_is_no_transform. + (next_instrs_are_b_retw): Inline call to is_windowed_return_opcode. + (xtensa_fix_short_loop_frags): Inline calls to is_the_loop_opcode and + get_frag_is_no_transform. + (convert_frag_immed_finish_loop): Inline calls to get_expression_value + and set_frag_is_no_transform. + (get_expression_value): Delete. + (subseg_map struct): Rename cur_total_freq to total_freq. Rename + cur_target_freq to target_freq. + (get_subseg_info): Split out code to create a new map entry into ... + (add_subseg_info): ... this new function. + (get_last_insn_flags): Check if get_subseg_info succeeded. + (set_last_insn_flags): Call add_subseg_info if needed. + (get_subseg_total_freq, get_subseg_target_freq, set_subseg_freq): New. + (xtensa_reorder_segments): Compute last_sec while counting sections. + Remove call to get_last_sec. + (get_last_sec): Delete. + (cache_literal_section): Inline call to retrieve_literal_seg and its + callees, seg_present and add_seg_list. + (retrieve_literal_seg, seg_present, add_seg_list): Delete. + (get_frag_is_insn, get_frag_is_no_transform, + set_frag_is_specific_opcode, set_frag_is_no_transform): Delete. + * config/tc-xtensa.h (MAX_SLOTS): Reduce from 31 to 15. + +2004-10-12 Bob Wilson + + * config/tc-xtensa.c: Use ISO C90 formatting. + * config/tc-xtensa.h: Likewise. + * config/xtensa-istack.h: Likewise. + * config/xtensa-relax.c: Likewise. + * config/xtensa-relax.h: Likewise. + +2004-10-12 Paul Brook + + * config/tc-arm.c (md_begin): Change EF_ARM_EABI_VER3 to + EF_ARM_EABI_VER4. + (arm_eabis): Ditto. + * doc/c-arm.texi: Document that we actually support -meabi=4, not + -meabi=3. + +2004-10-08 Bob Wilson + + * doc/as.texinfo (VTableEntry, VTableInherit): Add "directive" to index + entries. + (Acknowledgements): Use "GAS" instead of AS variable. + +2004-10-08 Daniel Jacobowitz + + * config/tc-i386.c: Include "elf/x86-64.h". + (i386_elf_section_type): New function. + * config/tc-i386.h (md_elf_section_type): Define. + (i386_elf_section_type): New prototype. + +2004-10-08 Linus Nielsen Feltzing + + * config/m68k-parse.h (enum m68k_register): New control register, + MBAR2 (for MCF5249) + * config/tc-m68k.c: Correct control register set for MCF5249. + +2004-10-07 Bob Wilson + Sterling Augustine + + * config/tc-xtensa.c (absolute_literals_supported): New global flag. + (UNREACHABLE_MAX_WIDTH): Define. + (XTENSA_FETCH_WIDTH): Delete. + (cur_vinsn, xtensa_fetch_width, xt_saved_debug_type, past_xtensa_end, + prefer_const16, prefer_l32r): New global variables. + (LIT4_SECTION_NAME): Define. + (lit4_state struct): Add lit4_seg_name and lit4_seg fields. + (XTENSA_PROP_*, GET_XTENSA_PROP_*, SET_XTENSA_PROP_*): Define. + (frag_flags struct): New. + (xtensa_block_info struct): Move from tc-xtensa.h. Add flags field. + (subseg_map struct): Add cur_total_freq and cur_target_freq fields. + (bitfield, bit_is_set, set_bit, clear_bit): Define. + (MAX_FORMATS): Define. + (op_placement_info struct, op_placement_table): New. + (O_pltrel, O_hi16, O_lo16): Define. + (directiveE enum): Rename directive_generics to directive_transform. + Delete directive_relax. Add directive_schedule, + directive_absolute_literals, and directive_last_directive. + (directive_info): Rename "generics" to "transform". Delete "relax". + Add "schedule" and "absolute-literals". + (directive_state): Adjust entries to match changes in directive_info. + (xtensa_relax_statesE, RELAX_IMMED_MAXSTEPS): Move to tc-xtensa.h. + (xtensa_const16_opcode, xtensa_movi_opcode, xtensa_movi_n_opcode, + xtensa_l32r_opcode, xtensa_nop_opcode, xtensa_rsr_lcount_opcode): New. + (xtensa_j_opcode, xtensa_rsr_opcode): Delete. + (align_only_targets, software_a0_b_retw_interlock, + software_avoid_b_j_loop_end, maybe_has_b_j_loop_end, + software_avoid_short_loop, software_avoid_close_loop_end, + software_avoid_all_short_loops, specific_opcode): Delete. + (warn_unaligned_branch_targets): New. + (workaround_a0_b_retw, workaround_b_j_loop_end, workaround_short_loop, + workaround_close_loop_end, workaround_all_short_loops): Default FALSE. + (option_[no_]link_relax, option_[no_]transform, + option_[no_]absolute_literals, option_warn_unaligned_targets, + option_prefer_l32r, option_prefer_const16, option_target_hardware): + New enum values. + (option_[no_]align_only_targets, option_literal_section_name, + option_text_section_name, option_data_section_name, + option_bss_section_name, option_eb, option_el): Delete. + (md_longopts): Add entries for: [no-]transform, [no-]absolute-literals, + warn-unaligned-targets, prefer-l32r, prefer-const16, [no-]link-relax, + and target-hardware. Delete entries for [no-]target-align-only, + literal-section-name, text-section-name, data-section-name, and + bss-section-name. + (md_parse_option): Handle new options and remove old ones. Accept but + ignore [no-]density options. Warn for [no-]generics and [no-]relax + and treat them as [no-]transform. + (md_show_usage): Add new options and remove old ones. + (xtensa_setup_hw_workarounds): New. + (md_pseudo_table): Change "word" entry to use xtensa_elf_cons. Add + "long", "short", "loc" and "frequency" entries. + (use_generics): Rename to ... + (use_transform): ... this function. Add past_xtensa_end check. + (use_longcalls): Add past_xtensa_end check. + (code_density_available, can_relax): Delete. + (do_align_targets): New. + (get_directive): Accept dashes in directive names. Warn about + [no-]generics and [no-]relax directives and treat them as + [no-]transform. + (xtensa_begin_directive): Call md_flush_pending_output only for some + directives. Check for directives inside instruction bundles. Warn + about deprecated ".begin literal" usage. Warn and ignore [no-]density + directives. Handle new directives. Check generating_literals flag + for literal_prefix. + (xtensa_end_directive): Check for directives inside instruction + bundles. Warn and ignore [no-]density directives. Handle new + directives. Call xtensa_set_frag_assembly_state. + (xtensa_loc_directive_seen, xtensa_dwarf2_directive_loc, + xtensa_dwarf2_emit_insn): New. + (xtensa_literal_position): Call md_flush_pending_output. Do not check + use_literal_section flag. + (xtensa_literal_pseudo): Call md_flush_pending_output. Handle absolute + literals. Use xtensa_elf_cons to parse the expression. + (xtensa_literal_prefix): Do not check use_literal_section. Support + ".lit4" sections for absolute literals. Change prefix convention to + replace ".text" (or ".t" in a linkonce section). No need to call + subseg_set. + (xtensa_frequency_pseudo, xtensa_elf_cons, xtensa_elf_suffix): New. + (expression_end): Handle closing braces and colons. + (PLT_SUFFIX, plt_suffix): Delete. + (expression_maybe_register): Use new xtensa-isa.h functions. Use + xtensa_elf_suffix instead of checking for plt suffix, and handle O_lo16 + and O_hi16 expressions as well. + (tokenize_arguments): Handle closing braces and colons. + (parse_arguments): Use new xtensa-isa.h functions. Handle "invisible" + operands and paired register syntax. + (get_invisible_operands): New. + (xg_translate_sysreg_op): Handle new Xtensa LX RSR/WSR/XSR syntax. Use + new xtensa-isa.h functions. + (xtensa_translate_old_userreg_ops, xtensa_translate_zero_immed): New. + (xg_translate_idioms): Check if inside bundle. Use use_transform. + Handle new Xtensa LX RSR/WSR/XSR syntax. Remove code to widen density + instructions. Use xtensa_translate_zero_immed. + (operand_is_immed, operand_is_pcrel_label): Delete. + (get_relaxable_immed): Use new xtensa-isa.h functions. + (get_opcode_from_buf): Add slot parameter. Use new xtensa-isa.h + functions. + (xtensa_print_insn_table, print_vliw_insn): New. + (is_direct_call_opcode): Use new xtensa-isa.h functions. + (is_call_opcode, is_loop_opcode, is_conditional_branch_opcode, + is_branch_or_jump_opcode): Delete. + (is_movi_opcode, decode_reloc, encode_reloc, encode_alt_reloc): New. + (opnum_to_reloc, reloc_to_opnum): Delete. + (xtensa_insnbuf_set_operand, xtensa_insnbuf_get_operand): Use new + xtensa-isa.h functions. Operate on one slot of an instruction. + (xtensa_insnbuf_set_immediate_field, is_negatable_branch, + xg_get_insn_size): Delete. + (xg_get_build_instr_size): Use xg_get_single_size. + (xg_is_narrow_insn, xg_is_single_relaxable_insn): Update calls to + xg_build_widen_table. Use xg_get_single_size. + (xg_get_max_narrow_insn_size): Delete. + (xg_get_max_insn_widen_size, xg_get_max_insn_widen_literal_size, + xg_is_relaxable_insn): Update calls to xg_build_widen_table. Use + xg_get_single_size. + (xg_build_to_insn): Record the loc field. Handle OP_OPERAND_HI16U and + OP_OPERAND_LOW16U. Check xg_valid_literal_expression. + (xg_expand_to_stack, xg_expand_narrow): Update calls to + xg_build_widen_table. Use xg_get_single_size. + (xg_immeds_fit): Use new xtensa-isa.h functions. Update call to + xg_check_operand. + (xg_symbolic_immeds_fit): Likewise. Also handle O_lo16 and O_hi16, and + treat weak symbols conservatively. + (xg_check_operand): Use new xtensa-isa.h functions. + (is_dnrange): Delete. + (xg_assembly_relax): Inline previous calls to tinsn_copy. + (xg_finish_frag): Specify separate relax states for the frag and slot0. + (is_branch_jmp_to_next, xg_add_branch_and_loop_targets): Use new + xtensa-isa.h functions. + (xg_instruction_matches_option_term, xg_instruction_matches_or_options, + xg_instruction_matches_options): New. + (xg_instruction_matches_rule): Handle O_register expressions. Call + xg_instruction_matches_options. + (transition_rule_cmp): New. + (xg_instruction_match): Update call to xg_build_simplify_table. + (xg_build_token_insn): Record loc fields. + (xg_simplify_insn): Check is_specific_opcode field and + density_supported flag. + (xg_expand_assembly_insn): Skip checking code_density_available. Use + new xtensa-isa.h functions. Call use_transform instead of can_relax. + (xg_assemble_literal): Add error handling for O_big. Call + record_alignment. Handle O_pltrel. + (xg_valid_literal_expression): New. + (xg_assemble_literal_space): Add slot parameter. Remove call to + set_expr_symbol_offset. Add call to record_alignment. Update call to + xg_finish_frag. + (xg_emit_insn): Delete. + (xg_emit_insn_to_buf): Add format parameter. Update calls to + xg_add_opcode_fix and xtensa_insnbuf_to_chars. + (xg_add_opcode_fix): Change opcode parameter to tinsn and add format + and slot parameters. Handle new "alternate" relocations for absolute + literals and CONST16 instructions. Check for bad uses of O_lo16 and + O_hi16. Use new xtensa-isa.h functions. + (xg_assemble_tokens): Delete. + (is_register_writer): Use new xtensa-isa.h functions. + (is_bad_loopend_opcode): Check for xtensa_rsr_lcount_opcode instead of + old-style RSR from LCOUNT. + (next_frag_opcode): Delete. + (next_frag_opcode_is_loop, next_frag_format_size, frag_format_size, + update_next_frag_state): New. + (update_next_frag_nop_state): Delete. + (next_frag_pre_opcode_bytes): Use next_frag_opcode_is_loop. + (xtensa_mark_literal_pool_location): Check use_literal_section flag and + the state of the absolute-literals directive. Add calls to + record_alignment and xtensa_set_frag_assembly_state. Call + xtensa_switch_to_non_abs_literal_fragment instead of + xtensa_switch_to_literal_fragment. + (build_nop): New. + (assemble_nop): Use build_nop. Update call to xtensa_insnbuf_to_chars. + (get_expanded_loop_offset): Change check for undefined opcode to an + assertion. + (xtensa_set_frag_assembly_state, relaxable_section, + xtensa_find_unmarked_state_frags, xtensa_find_unaligned_branch_targets, + xtensa_find_unaligned_loops, xg_apply_tentative_value): New. + (md_begin): Update call to xtensa_isa_init. Initialize linkrelax to 1. + Set lit4_seg_name. Call xg_init_vinsn. Initialize new global opcodes. + Call init_op_placement_info_table and xtensa_set_frag_assembly_state. + (xtensa_init_fix_data): New. + (xtensa_frob_label): Reset label symbol to the current frag. Check + do_align_targets and generating_literals flag. Propagate frequency + info to new alignment frag. Call xtensa_set_frag_assembly_state. + (xtensa_unrecognized_line): New. + (xtensa_flush_pending_output): Check if inside a bundle. Add a call + to xtensa_set_frag_assembly_state. + (error_reset_cur_vinsn): New. + (md_assemble): Remove check for literal frag. Remove call to + istack_init. Call use_transform instead of use_generics. Parse + explicit instruction format specifiers. Move code for + a0_b_retw_interlock workaround to xg_assemble_vliw_tokens. Call + error_reset_cur_vinsn on errors. Add call to get_invisible_operands. + Add dwarf2_where call. Remote automatic alignment for ENTRY + instructions. Move call to xtensa_clear_insn_labels to the end. + Rearrange to handle bundles. + (xtensa_cons_fix_new): Delete. + (xtensa_handle_align): New. + (xtensa_frag_init): Call xtensa_set_frag_assembly_state. Remove + assignment to is_no_density field. + (md_pcrel_from): Use new xtensa-isa.h functions. Use decode_reloc + instead of reloc_to_opnum. Handle "alternate" relocations. + (xtensa_force_relocation, xtensa_check_inside_bundle, + xtensa_elf_section_change_hook): New. + (xtensa_symbol_new_hook): Delete. + (xtensa_fix_adjustable): Check for difference of symbols with an + offset. Check for external and weak symbols. + (md_apply_fix3): Remove cases for XTENSA_OP{0,1,2} relocs. + (md_estimate_size_before_relax): Return expansion for the first slot. + (tc_gen_reloc): Handle difference of symbols by producing + XTENSA_DIFF{8,16,32} relocs and by writing the value of the difference + into the output. Handle new XTENSA_SLOT*_OP relocs by storing the + tentative values into the output when linkrelax is set. + (XTENSA_PROP_SEC_NAME): Define. + (xtensa_post_relax_hook): Call xtensa_find_unmarked_state_frags. + Create literal tables only if using literal sections. Create new + property tables instead of old instruction tables. Check for unaligned + branch targets and loops. + (finish_vinsn, find_vinsn_conflicts, check_t1_t2_reads_and_writes, + new_resource_table, clear_resource_table, resize_resource_table, + resources_available, reserve_resources, release_resources, + opcode_funcUnit_use_unit, opcode_funcUnit_use_stage, + resources_conflict, xg_find_narrowest_format, relaxation_requirements, + bundle_single_op, emit_single_op, xg_assemble_vliw_tokens): New. + (xtensa_end): Call xtensa_flush_pending_output. Set past_xtensa_end + flag. Update checks for workaround options. Call + xtensa_mark_narrow_branches and xtensa_mark_zcl_first_insns. + (xtensa_cleanup_align_frags): Add special case for branch targets. + Check for and mark unreachable frags. + (xtensa_fix_target_frags): Remove use of align_only_targets flag. + Use RELAX_LOOP_END_BYTES in special case for negatable branch at the + end of a zero-overhead loop body. + (frag_can_negate_branch): Handle instructions with multiple slots. + Use new xtensa-isa.h functions + (xtensa_mark_narrow_branches, is_narrow_branch_guaranteed_in_range, + xtensa_mark_zcl_first_insns): New. + (xtensa_fix_a0_b_retw_frags, xtensa_fix_b_j_loop_end_frags): Error if + transformations are disabled. + (next_instrs_are_b_retw): Use new xtensa-isa.h functions. Handle + multislot instructions. + (xtensa_fix_close_loop_end_frags, xtensa_fix_short_loop_frags): + Likewise. Also error if transformations are disabled. + (unrelaxed_frag_max_size): New. + (unrelaxed_frag_min_insn_count, unrelax_frag_has_b_j): Use new + xtensa-isa.h functions. + (xtensa_sanity_check, is_empty_loop, is_local_forward_loop): Use + xtensa_opcode_is_loop instead of is_loop_opcode. + (get_text_align_power): Replace as_fatal with assertion. + (get_text_align_fill_size): Iterate instead of using modulus when + use_nops is false. + (get_noop_aligned_address): Assert that this is for a machine-dependent + RELAX_ALIGN_NEXT_OPCODE frag. Use next_frag_opcode_is_loop, + xg_get_single_size, and frag_format_size. + (get_widen_aligned_address): Rename to ... + (get_aligned_diff): ... this function. Add max_diff parameter. + Remove handling of rs_align/rs_align_code frags. Use + next_frag_format_size, get_text_align_power, get_text_align_fill_size, + next_frag_opcode_is_loop, and xg_get_single_size. Compute max_diff + and pass it back to caller. + (xtensa_relax_frag): Use relax_frag_loop_align. Add code for new + RELAX_SLOTS, RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN, + RELAX_FILL_NOP, and RELAX_UNREACHABLE frag types. Check relax_seen. + (relax_frag_text_align): Rename to ... + (relax_frag_loop_align): ... this function. Assume loops can only be + in the first slot of an instruction. + (relax_frag_add_nop): Use assemble_nop instead of constructing an OR + instruction. Remove call to frag_wane. + (relax_frag_narrow): Rename to ... + (relax_frag_for_align): ... this function. Extend to handle + RELAX_FILL_NOP and RELAX_UNREACHABLE, as well as RELAX_SLOTS with + RELAX_NARROW for the first slot. + (find_address_of_next_align_frag, bytes_to_stretch): New. + (future_alignment_required): Use find_address_of_next_align_frag and + bytes_to_stretch. Look ahead to subsequent frags to make smarter + alignment decisions. + (relax_frag_immed): Add format, slot, and estimate_only parameters. + Check if transformations are enabled for b_j_loop_end workaround. + Use new xtensa-isa.h functions and handle multislot instructions. + Update call to xg_assembly_relax. + (md_convert_frag): Handle new RELAX_SLOTS, RELAX_UNREACHABLE, + RELAX_MAYBE_UNREACHABLE, RELAX_MAYBE_DESIRE_ALIGN, and RELAX_FILL_NOP + frag types. + (convert_frag_narrow): Add segP, format and slot parameters. Call + convert_frag_immed for branch instructions. Adjust calls to + tinsn_from_chars, tinsn_immed_from_frag, and xg_emit_insn_to_buf. Use + xg_get_single_size and xg_get_single_format. + (convert_frag_fill_nop): New. + (convert_frag_immed): Add format and slot parameters. Handle multislot + instructions and use new xtensa-isa.h functions. Update calls to + tinsn_immed_from_frag and xg_assembly_relax. Check if transformations + enabled for b_j_loop_end workaround. Use build_nop instead of + assemble_nop. Check is_specific_opcode flag. Check for unreachable + frags. Use xg_get_single_size. Handle O_pltrel. + (fix_new_exp_in_seg): Remove check for old plt flag. + (convert_frag_immed_finish_loop): Update calls to tinsn_from_chars and + xtensa_insnbuf_to_chars. Call tinsn_immed_from_frag. Change check + for loop opcode to an assertion. Mark all frags up to the end of the + loop as not transformable. + (get_last_insn_flags, set_last_insn_flags): Use get_subseg_info. + (get_subseg_info): New. + (xtensa_move_literals): Call xtensa_set_frag_assembly_state. Add null + check for dest_seg. + (xtensa_switch_to_literal_fragment): Rewrite to handle absolute + literals and use xtensa_switch_to_non_abs_literal_fragment otherwise. + (xtensa_switch_to_non_abs_literal_fragment): New. + (cache_literal_section): Add is_code parameter and pass it through to + retrieve_literal_seg. + (retrieve_literal_seg): Add is_code parameter and use it to set the + flags on the literal section. Handle case where head parameter is 0. + (get_frag_is_no_transform, set_frag_is_specific_opcode, + set_frag_is_no_transform): New. + (xtensa_create_property_segments): Add end_property_function parameter + and pass it through to add_xt_block_frags. Call bfd_get_section_flags + and skip SEC_DEBUGGING and !SEC_ALLOC sections. + (xtensa_create_xproperty_segments, section_has_xproperty): New. + (add_xt_block_frags): Add end_property_function parameter and call it + if it is non-zero. Call xtensa_frag_flags_init. + (xtensa_frag_flags_is_empty, xtensa_frag_flags_init, + get_frag_property_flags, frag_flags_to_number, + xtensa_frag_flags_combinable, xt_block_aligned_size, + xtensa_xt_block_combine, add_xt_prop_frags, + init_op_placement_info_table, opcode_fits_format_slot, + xg_get_single_size, xg_get_single_format): New. + (istack_push): Inline call to tinsn_copy. + (tinsn_copy): Delete. + (tinsn_has_invalid_symbolic_operands): Handle O_hi16 and O_lo16 and + CONST16 opcodes. Handle O_big, O_illegal, and O_absent. + (tinsn_has_complex_operands): Handle O_hi16 and O_lo16. + (tinsn_to_insnbuf): Use xg_get_single_format and new xtensa-isa.h + functions. Handle invisible operands. + (tinsn_to_slotbuf): New. + (tinsn_check_arguments): Use new xtensa-isa.h functions. + (tinsn_from_chars): Add slot parameter. Rewrite using xg_init_vinsn, + vinsn_from_chars, and xg_free_vinsn. + (tinsn_from_insnbuf): New. + (tinsn_immed_from_frag): Add slot parameter and handle multislot + instructions. Handle symbol differences. + (get_num_stack_text_bytes): Use xg_get_single_size. + (xg_init_vinsn, xg_clear_vinsn, vinsn_has_specific_opcodes, + xg_free_vinsn, vinsn_to_insnbuf, vinsn_from_chars, expr_is_register, + get_expr_register, set_expr_symbol_offset_diff): New. + * config/tc-xtensa.h (MAX_SLOTS): Define. + (xtensa_relax_statesE): Move from tc-xtensa.c. Add + RELAX_CHECK_ALIGN_NEXT_OPCODE, RELAX_MAYBE_DESIRE_ALIGN, RELAX_SLOTS, + RELAX_FILL_NOP, RELAX_UNREACHABLE, RELAX_MAYBE_UNREACHABLE, and + RELAX_NONE types. + (RELAX_IMMED_MAXSTEPS): Move from tc-xtensa.c. + (xtensa_frag_type struct): Add is_assembly_state_set, + use_absolute_literals, relax_seen, is_unreachable, is_specific_opcode, + is_align, is_text_align, alignment, and is_first_loop_insn fields. + Replace is_generics and is_relax fields by is_no_transform field. + Delete is_text and is_longcalls fields. Change text_expansion and + literal_expansion to arrays of MAX_SLOTS entries. Add arrays of + per-slot information: literal_frags, slot_subtypes, slot_symbols, + slot_sub_symbols, and slot_offsets. Add fr_prev field. + (xtensa_fix_data struct): New. + (xtensa_symfield_type struct): Delete plt field. + (xtensa_block_info struct): Move definition to tc-xtensa.h. Add + forward declaration here. + (xt_section_type enum): Delete xt_insn_sec. Add xt_prop_sec. + (XTENSA_SECTION_RENAME): Undefine. + (TC_FIX_TYPE, TC_INIT_FIX_DATA, TC_FORCE_RELOCATION, NO_PSEUDO_DOT, + tc_unrecognized_line, md_do_align, md_elf_section_change_hook, + HANDLE_ALIGN, TC_LINKRELAX_FIXUP, SUB_SEGMENT_ALIGN): Define. + (TC_CONS_FIX_NEW, tc_symbol_new_hook): Delete. + (unit_num_copies_func, opcode_num_units_func, + opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func): New. + (resource_table struct): New. + * config/xtensa-istack.h (MAX_INSN_ARGS): Increase from 6 to 10. + (TInsn struct): Add keep_wide, loc, fixup, record_fix, subtype, + literal_space, symbol, sub_symbol, offset, and literal_frag fields. + (tinsn_copy): Delete prototype. + (vliw_insn struct): New. + * config/xtensa-relax.c (insn_pattern_struct): Add options field. + (widen_spec_list): Add option conditions for density and boolean + instructions. Add expansions using CONST16 and conditions for using + CONST16 vs. L32R. Use new Xtensa LX RSR/WSR syntax. Add entries for + predicted branches. + (simplify_spec_list): Add option conditions for density instructions. + Add entry for NOP instruction. + (append_transition): Add cmp function pointer parameter and use it to + insert the new entry in order. + (operand_function_LOW16U, operand_function_HI16U): New. + (xg_has_userdef_op_fn, xg_apply_userdef_op_fn): Handle + OP_OPERAND_LOW16U and OP_OPERAND_HI16U. + (enter_opname, split_string): Use xstrdup instead of strdup. + (init_insn_pattern): Initialize new options field. + (clear_req_or_option_list, clear_req_option_list, + clone_req_or_option_list, clone_req_option_list, parse_option_cond): + New. + (parse_insn_pattern): Parse option conditions. + (transition_applies): New. + (build_transition): Use new xtensa-isa.h functions. Fix incorrectly + swapped last arguments in calls to append_constant_value_condition. + Call clone_req_option_list. Add warning about invalid opcode. + Handle LOW16U and HI16U function names. + (build_transition_table): Add cmp parameter and use it in calls to + append_transition. Use new xtensa-isa.h functions. Check + transition_applies before adding entries. + (xg_build_widen_table, xg_build_simplify_table): Add cmp parameter and + pass it through to build_transition_table. + * config/xtensa-relax.h (ReqOrOptionList, ReqOrOption, ReqOptionList, + ReqOption, transition_cmp_fn): New types. + (OpType enum): Add OP_OPERAND_LOW16U and OP_OPERAND_HI16U. + (transition_rule struct): Add options field. + * doc/as.texinfo (Overview): Update Xtensa options. + * doc/c-xtensa.texi (Xtensa Options): Delete --[no-]density, + --[no-]relax, and --[no-]generics options. Update descriptions of + --text-section-literals and --[no-]longcalls. Add + --[no-]absolute-literals and --[no-]transform. + (Xtensa Syntax): Add description of syntax for FLIX instructions. + Remove use of "generic" and "specific" terminology for opcodes. + (Xtensa Registers): Generalize the syntax description to include + user-defined register files. + (Xtensa Automatic Alignment): Update. + (Xtensa Branch Relaxation): Mention limitation of unconditional jumps. + (Xtensa Call Relaxation): Linker can now remove most of the overhead. + (Xtensa Directives): Remove confusing rules about precedence. + (Density Directive, Relax Directive): Delete. + (Schedule Directive): New. + (Generics Directive): Rename to ... + (Transform Directive): ... this node. + (Literal Directive): Update for absolute literals. Missing + literal_position directive is now an error. + (Literal Position Directive): Update for absolute literals. + (Freeregs Directive): Delete. + (Absolute Literals Directive): New. + (Frame Directive): Minor editing. + * Makefile.am (DEPTC_xtensa_elf, DEPOBJ_xtensa_elf, DEP_xtensa_elf): + Update dependencies. + * Makefile.in: Regenerate. + +2004-10-07 Richard Sandiford + + * config/tc-mips.c (append_insn): Use fix_new rather than fix_new_exp + to build the second and third fixups for a composite relocation. + (macro_read_relocs): New function. + (macro_build): Use it. + (s_cpsetup): Pass all three composite relocation codes to macro_build. + Simplify fragging code accordingly. + (s_gpdword): Use fix_new rather than fix_new_exp for the second part + of the composite relocation. Set fx_tcbit in both fixups. + +2004-10-07 Richard Sandiford + + * config/tc-mips.c (append_insn): Set fx_tcbit for composite relocs. + (md_apply_fix3): Don't treat composite relocs as done. + +2004-10-07 Jan Beulich + + * macro.c (macro_expand_body): When ELF, use .LL rather than LL as + prefix for symbol names generated from the LOCAL macro directive. + + * dw2gencfi.c (select_cie_for_fde): When separating CIE out from + FDE, treat a DW_CFA_remember_state as we do a DW_CFA_advance_loc. + +2004-10-07 Tomer Levi + + * config/tc-crx.c (preprocess_reglist): Handle Co-processor + Special registers. + (md_assemble): Add error checking for Co-Processor instructions. + (get_cinv_parameters): Add 'b' option to invalidate the + branch-target cache. + +2004-10-05 Paul Brook + + * config/tc-arm.c (unwind): New variable. + (vfp_sp_encode_reg): New function. + (vfp_sp_reg_required_here): Use it. + (vfp_sp_reg_list, vfp_dp_reg_list): Remove. + (vfp_parse_reg_list): New function. + (s_arm_unwind_fnstart, s_arm_unwind_fnend, s_arm_unwind_cantunwind, + s_arm_unwind_personality, s_arm_unwind_personalityindex, + s_arm_unwind_handlerdata, s_arm_unwind_save, s_arm_unwind_movsp, + s_arm_unwind_pad, s_arm_unwind_setfp, s_arm_unwind_raw): New + functions. + (md_pseudo_table): Add them. + (do_vfp_reg2_from_sp2): Use vfp_parse_reg_list and vfp_sp_encode_reg. + (do_vfp_sp2_from_reg2, vfp_sp_ldstm, vfp_dp_ldstm): Ditto. + (set_section, add_unwind_adjustsp, flush_pending_unwind, + finish_unwind_opcodes, start_unwind_section, create_unwind_entry, + require_hashconst, add_unwind_opcode): New functions. + * doc/tc-arm.text: Document unwinding opcodes. + * NEWS: Mention the new feature. + +2004-10-04 Eric Christopher + + * config/tc-mips.c (md_apply_fix3): Remove erroneous assert. + +2004-10-01 H.J. Lu + + * config/tc-ppc.c (md_apply_fix3): Call S_SET_THREAD_LOCAL for + TLS relocations. + * config/tc-s390.c (md_apply_fix3): Likewise. + * config/tc-sparc.c (md_apply_fix3): Likewise. + +2004-10-01 Paul Brook + + * config/tc-arm.c (arm_elf_section_type): New function. + (arm_elf_change_section): Set section link for exidx sections. + * config/tc-arm.h (arm_elf_section_type): Add prototype. + (md_elf_section_type): Define. + +2004-10-01 Bill Farmer + + * config/tc-pdp11.c (md_apply_fix3): Change to sign of the SOB + instruction's offset. + +2004-10-01 Adam Nemet + + * (TARGET_FORMAT): Remove LynxOS COFF definition. + +2004-10-01 Ravi Ramaseshan + + * config/tc-arc.c (tc_gen_reloc): Don't assume fixP->fx_addsy is an + asymbol *, instead use symbol_get_bfdsym. + +2004-09-30 Linus Nielsen Feltzing + + * config/tc-m68k.c (select_control_regs): Add mcf5249. + +2004-09-30 Paul Brook + + * config/tc-arm.c (do_smi, do_nop): New functions. + (insns): Add ARMv6ZK instructions. + (md_apply_fix3): Handle BFD_RELOC_ARM_SMI. + (tc_gen_reloc): Ditto. + (arm_cpus): Add mpcore and arm1176. + (arm_archs): Add armv6{k,z,zk}. + * doc/c-arm.texi: Document new cores and architectures. + +2004-09-30 Nick Clifton + + * config/tc-arm.c: Use ISO C90 formatting. + +2004-09-30 Vladimir Ivanov + + * config/tc-arm.c (mav_reg_required_here): Allow REG_TYPE_CN + as alternative when REG_TYPE_MVF, REG_TYPE_MVD, REG_TYPE_MVFX or + REG_TYPE_MVDX is expected. + +2004-09-29 Marc Bevand + + * doc/c-i386.texi (i386-Mnemonics): Fix typo. + +2004-09-21 James E Wilson + + * config/tc-ia64.c (ENCODED_PSP_OFFSET): New. + (output_rp_psprel, output_pfs_psprel, output_preds_psprel, + output_spill_base, output_unat_psprel, output_lc_psprel, + output_fpsr_psprel, output_priunat_psprel, output_bsp_psprel, + output_bsprestore_psprel, output_rnat_psprel, output_spill_psprel, + output_spill_psprel_p): Use it. + +2004-09-20 Tomer Levi + + * config/tc-crx.c (handle_LoadStor): New function. + Handle load/stor unique instructions before parsing. + +2004-09-17 Paul Brook + + * config/tc-arm.c (s_arm_rel31): New funciton. + (md_pseudo_table): Add .rel31. + (md_apply_fix3): Handle BFD_RELOC_ARM_TARGET2, + BFD_RELOC_32_PCREL and BFD_RELOC_ARM_PREL31. + (tc_gen_reloc): Handle BFD_RELOC_ARM_PREL31 and BFD_RELOC_ARM_TARGET2. + (arm_fix_adjustable): Return 0 for BFD_RELOC_ARM_TARGET2. + (arm_parse_reloc): Add (target2). + +2004-09-17 Alan Modra + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * aclocal.m4: Regenerate. + * configure: Regenerate. + * doc/Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + * po/gas.pot: Regenerate. + +2004-09-14 Hideki IWAMOTO + + * config/tc-mmix.c [!LLONG_MIN]: Correct #elsif to #elif. + [!LLONG_MAX]: Ditto. + +2004-09-13 Paul Brook + + * config/tc-arm.c: Rename RELABS to TARGET1. + +2004-09-13 Alan Modra + + * messages.c (as_internal_value_out_of_range): Cast values passed + to as_bad_where or as_warn_where to proper type. + +2004-09-11 Theodore A. Roth + + * config/tc-avr.c: Add support for + atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128. + +2004-09-09 Alan Modra + + * dw2gencfi.c (select_cie_for_fde): When separating CIE out + from FDE, treat a CFI_escape as we do a DW_CFA_advance_loc. + +2004-09-08 Paul Brook + + * config/obj-elf.c (obj_elf_section_type): Handle init_array, + fini_array and preinit_array section types. + * config/tc-ia64.c (ia64_elf_section_type): Remove init_array + and fini_array. + * doc/as.texinfo: Document extra section types. + +2004-09-02 Mark Mitchell + + * Makefile.am (TARG_ENV_HFILES): Add te-symbian.h. + * Makefile.in: Regenerated. + * configure.in: Set em for arm*-*-symbianelf*. + * configure: Regenerated. + * config/tc-arm.c (elf32_arm_target_format): Use Symbian target + vectors when appropriate. + * config/te-symbian.h: New file. + +2004-09-03 Tomer Levi + + * config/tc-crx.c (gettrap): Exception vector can be case + insensitive. + (process_label_constant): Fix a 32-bit displacement bug in branch + instructions. + (get_operandtype) : Bug fix, wrong operand was used. + (process_label_constant): Initialize relocation type to + BFD_RELOC_NONE + +2004-09-01 Richard Earnshaw < reanrsha@arm.com> + + * tc-arm.c (arm_cpus, arm_fpus): Allow -s as well as s + for synthesizable cores. + + * doc/c-arm.texi (ARM Options): Document canonical names of CPUs. + +2004-08-25 Dmitry Diky + + * config/tc-msp430.c: Clean-up the code. + (md_relax_table): New relax table. + (mcu_types): Sort MCU types. + (md_pseudo_table): Add .profiler pseudo handler. + (pow2value): New function. + (msp430_profiler): New function. + (msp430_operands): Add new insns handlers. + (msp430_srcoperand): Add register operand handler, allow complex + expressions. + (md_estimate_size_before_relax): Rewritten. + (md_convert_frag): Rewritten. + (msp430_relax_frag): New function. + * config/tc-msp430.h (md_relax_frag): define macro + * doc/c-msp430.texi: Update information. + +2004-08-24 Nick Clifton + + * as.c (std_shortopts): Allow -g to take an optional argument. + (parse_args): Pass any switch starting with -g on to the backend + for parsing. + +2004-08-18 Mark Mitchell + + * configure.in (arm*-*-symbianelf*): New target. + (arm*-*-eabi*): Likewise. + * configure: Regenerated. + 2004-08-18 Thiemo Seufer * config/tc-mips.c (append_insn): Handle delay slots in branch likely correctly. @@ -22,7 +891,7 @@ * NEWS: Mention new feature. * doc/as.texinfo: Document new switch. * doc/internals.texi: Document behaviour of md_parse_option. - + * config/tc-arm.c (md_parse_option): Do not issue an error message if the switch is not recognised. * config/tc-m68k.c (md_parse_option): Likewise. @@ -151,7 +1020,7 @@ * config/tc-i386.c: For DefaultSize instructions, don't guess a 'q' suffix if the instruction doesn't support it. - + 2004-07-20 Maciej W. Rozycki * config/tc-mips.c (append_insn): Handle constant expressions with @@ -213,13 +1082,13 @@ declarations. Indentation fixup. [M68KCOFF]: Include "obj-coff.h" instead of declaring obj_coff_section ourselves. - + 2004-07-09 James E Wilson * config/tc-ia64.c (default_big_endian): New. (dot_byteorder, md_begin): Use it. (md_parse_option): Set it. - + 2004-07-09 Nick Clifton * configure.in: Change sh-sybmian-elf to sh-*-symbianelf. @@ -258,7 +1127,7 @@ selected define TARGET_SYMBIAN. * config/tc-sh.h (TARGET_FORMAT): Select a Symbian target format if TARGET_SYMBIAN has been defined. - + * output-file.c (output_file_create): Report the target format chosen when bfd_openw reports that it is invalid. @@ -456,7 +1325,7 @@ * config/tc-mips.c (append_insn): Use ISA-encoded addresses in MIPS16 dwarf tables. -2004-05-17 Adam Nemet +2004-05-17 Adam Nemet * configure.in: Add ppc-*-lynxos*. Update i386-*-lynxos* to ELF. * configure: Regenerate. @@ -698,7 +1567,7 @@ '>>'. (yylex): Handle '>', '<', and '&' following '+'. * config/tc-m68k.c: Set mcfmac/mcfemac on appropriate ColdFire - architectures in archs[]. + architectures in archs[]. (m68k-ip): Add '4', 'e', 'g', 'i', cases to handle mask addressing for MAC/EMAC instructions, ACC[0123], ACCEXT{01,23}, and '<<'/'>>' respectively.