X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2FChangeLog;h=a1a4224a64706b8edf075c746e372c7f3ac25cb7;hb=2c62985659da21a3fe16062d211a7158f79ad2e9;hp=84c90c8a9b09b56e2fa7051d1b6774be0ddbc61d;hpb=ea79f94a7ab96c6114b80bf78830f877325b10ff;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/ChangeLog b/gas/ChangeLog index 84c90c8a9b..a1a4224a64 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,330 @@ +2014-10-31 Andrew Pinski + Naveen H.S + + * config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3. + (mips_cpu_info_table): Octeon3 enables virt ase. + * doc/c-mips.texi: Document octeon3 as an acceptable value for + -march=. + +2014-10-30 Dr Philipp Tomsich + + * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7. + * config/tc-aarch64.c (aarch64_handle_align): Rewrite to handle + large alignments with a constant fragment size of + MAX_MEM_FOR_RS_ALIGN_CODE. + +2014-10-29 Nick Clifton + + * po/uk.po: New Ukranian translation. + +2014-10-23 Sandra Loosemore + + * config/tc-nios2.c (nios2_insn_infoS): Add constant_bits field. + (nios2_arg_infoS, nios2_arg_hash, nios2_arg_lookup): Delete. + (nios2_control_register_arg_p): Delete. + (nios2_coproc_reg): Delete. + (nios2_relax_frag): Remove hard-coded instruction size. + (md_convert_frag): Use new insn accessor macros. + (nios2_diagnose_overflow): Remove hard-coded instruction size. + (md_apply_fix): Likewise. + (bad_opcode): New. + (nios2_parse_reg): New. + (nios2_assemble_expression): Remove prev_reloc parameter. Adjust + uses and callers. + (nios2_assemble_arg_c): New. + (nios2_assemble_arg_d): New. + (nios2_assemble_arg_s): New. + (nios2_assemble_arg_t): New. + (nios2_assemble_arg_i): New. + (nios2_assemble_arg_u): New. + (nios2_assemble_arg_o): New. + (nios2_assemble_arg_j): New. + (nios2_assemble_arg_l): New. + (nios2_assemble_arg_m): New. + (nios2_assemble_args): New. + (nios2_assemble_args_dst): Delete. + (nios2_assemble_args_tsi): Delete. + (nios2_assemble_args_tsu): Delete. + (nios2_assemble_args_sto): Delete. + (nios2_assemble_args_o): Delete. + (nios2_assemble_args_is): Delete. + (nios2_assemble_args_m): Delete. + (nios2_assemble_args_s): Delete. + (nios2_assemble_args_tis): Delete. + (nios2_assemble_args_dc): Delete. + (nios2_assemble_args_cs): Delete. + (nios2_assemble_args_ds): Delete. + (nios2_assemble_args_ldst): Delete. + (nios2_assemble_args_none): Delete. + (nios2_assemble_args_dsj): Delete. + (nios2_assemble_args_d): Delete. + (nios2_assemble_args_b): Delete. + (nios2_arg_info_structs): Delete. + (NIOS2_NUM_ARGS): Delete. + (nios2_consume_arg): Remove insn parameter. Use new macros. + Don't check register arguments here. Remove 'b' case. + (nios2_consume_separator): Move check for missing separators to... + (nios2_parse_args): ...here. Remove special case for optional + arguments. + (output_insn): Avoid using hard-coded insn size. + (output_ubranch): Likewise. + (output_cbranch): Likewise. + (output_call): Use new macros. + (output_addi): Likewise. + (output_ori): Likewise. + (output_xori): Likewise. + (output_movia): Likewise. + (md_begin): Remove nios2_arg_info_structs initialization. + (md_assemble): Initialize constant_bits field. Use + nios2_parse_args instead of looking up parse function in hash table. + +2014-10-22 Matthew Fortune + + * doc/as.texinfo: Update the MIPS FP ABI descriptions. + * doc/c-mips.texi: Spell check and correct throughout. + +2014-10-21 Maciej W. Rozycki + + * config/tc-mips.c (s_insn): Set file options. + +2014-10-21 Andrew Pinski + + * config/tc-aarch64.c (aarch64_cpus): + Add thunderx. + * doc/c-aarch64.texi: Document that thunderx + is a valid processor name. + +2014-10-21 Jan Beulich + + * read.c (HANDLE_CONDITIONAL_ASSEMBLY): New parameter "num_read". + (read_a_source_file): Adjust HANDLE_CONDITIONAL_ASSEMBLY + invocations. + (_find_end_of_line): Don't issue "stray '\\'" warning when in + false branch of conditional. + +2014-10-21 Jan Beulich + + * config/tc-aarch64.c (output_operand_error_record): Move down + assertion of idx being non-negative. Use local variables when + available. + +2014-10-18 Alan Modra + + PR 17493 + * write.c (adjust_reloc_syms): Don't allow symbols in reg_section + to be reduced to reg_section section symbol. + * gas/config/tc-i386.c (i386_finalize_immediate): Reject all + reg_section immediates. + +2014-10-17 Matthew Fortune + + * doc/c-mips.texi: Fix bad @value references. + +2014-10-15 Tristan Gingold + + * configure: Regenerate. + +2014-10-15 Chen Gang + + * config/tc-tic4x.c (md_assemble): Correct strncat size. + +2014-10-14 Tristan Gingold + + * NEWS: Add marker for 2.25. + +2014-10-14 Alan Modra + + PR 17453 + * config/tc-i386.c (fits_in_signed_long): Use unsigned param and + expression to avoid signed overflow. + (fits_in_signed_byte, fits_in_unsigned_byte, fits_in_unsigned_word, + fits_in_signed_word, fits_in_unsigned_long): Similarly. + * expr.c (operand <'-'>): Avoid signed overflow. + * read.c (s_comm_internal): Likewise. + +2014-10-14 Alan Modra + + * config/tc-sparc.c (sparc_md_end): Fix unused variable warnings. + +2014-10-09 Jose E. Marchesi + + * config/tc-sparc.c (v9a_asr_table): Entry for %cps removed. + (sparc_arch_table): Remove the HWCAP_RANDOM, HWCAP_TRANS and + HWCAP_ASI_CACHE_SPARING from the architectures using them. + (HWS_V8): New define. + (HWS_V9): Likewise. + (HWS_VA): Likewise. + (HWS_VB): Likewise. + (HWS_VC): Likewise. + (HWS_VD): Likewise. + (HWS_VE): Likewise. + (HWS_VV): Likewise. + (sparc_arch): Use the HWS_* macros. Fix the `sparc4' architecture + to cover the HWCAP_ASI_BLK_INIT and HWCAP_IMA capabilities. + (hwcap_seen): Variable widened to 64 bits. + (hwcap_allowed): Likewise. + (sparc_arch): new field `hwcap2_allowed'. + (sparc_arch_table): provide hwcap2_allowed values for existing + archs. + (sparc_md_end): Add a HWCAPS2 object attribute to the elf object + in case any of the HWCAP2_* caps are used. + (sparc_ip): Take into account the new hwcaps2 bitmap to build the + list of seen/allowed hwcaps. + (get_hwcap_name): Argument widened to 64 bits to handle HWCAP2 + bits. + (HWS_VM): New define. + (HWS2_VM): Likewise. + (sparc_arch): New architectures `sparc5', `v9m' and `v8plusm'. + (v9a_asr_table): Add the %mwait (%asr28) ancillary state register + to the table. + (sparc_ip): Handle the %mcdper ancillary state register as an + operand. + (sparc_ip): Handle } arguments as fdrd floating point registers + (double) that are the same than frs1. + * doc/c-sparc.texi (Sparc-Opts): Document the -Av9e, -Av8pluse and + -xarch=v9e command line options. Also fix the description of the + -Av9v and -Av8plusv command line options. + Document the -Av9m, -Av8plusm,-Asparc5, -xarch=v9m and + -xarch=sparc5 command line options. + +2014-09-29 Terry Guo + + * as.c (create_obj_attrs_section): Move it and call it from ... + * write.c (create_obj_attrs_section): ... here. + (subsegs_finish_section): Refactored. + +2014-09-27 Alan Modra + + * dwarf2dbg.c (all_segs_hash): Delete. + (get_line_subseg): Delete last_seg, last_subseg, last_line_subseg. + Retrieve line_seg for section via seg_info. + * subsegs.h (segment_info_typet): Add dwarf2_line_seg. + +2014-09-23 H.J. Lu + + PR gas/17421 + * config/tc-i386.c (md_assemble): Disallow VEX/EVEX encoded + instructions in 16-bit mode. + +2014-09-22 Alan Modra + + * config/tc-m68k.c (md_assemble): Add assert to work around + bogus trunk gcc warning. + * config/tc-pj.h (md_convert_frag): Warning fix. + * config/tc-xtensa.c (xg_assemble_vliw_tokens): Warning fix. + +2014-09-17 Tristan Gingold + + * config/tc-arm.c (move_or_literal_pool, add_to_lit_pool): Use + bfd_int64_t instead of int64_t. + +2014-09-16 Ilya Tocar + + * config/tc-i386.c (evexrcig): New. + (build_evex_prefix): Force rounding bits. + (OPTION_MEVEXRCIG): New. + (md_longopts): Add mevexrcig. + (md_parse_option): Handle OPTION_MEVEXRCIG. + (md_show_usage): Document mevexrcig. + * doc/c-i386.texi (mevexrcig): Document new option. + +2014-09-16 Kuan-Lin Chen + + * config/tc-nds32.c (nds32_fsrs, nds32_fdrs, nds32_gprs): Remove. + (relax_table): Add new relaxation pattern. + (do_pseudo_la_internal, do_pseudo_ls_bhw): Expand for PIC suffix. + (do_pseudo_move, do_pseudo_neg, do_pseudo_pushpopm): Fix. + (get_range_type, nds32_elf_record_fixup_exp, nds32_get_align, + nds32_elf_build_relax_relation, md_assemble, invalid_prev_frag, + nds32_relax_frag, md_estimate_size_before_relax): Adjust relaxation. + (relocation_table): Remove. + (relax_ls_table): Load-store relaxation pattern. + (hint_map): Define-use chain pattern. + (nds32_find_reloc_table, nds32_match_hint_insn): Analysis + relaxation pattern. + (nds32_parse_name): Parse PIC suffix. + * config/tc-nds32.h: Declare. + +2014-09-15 H.J. Lu + + * config/tc-i386.c (OPTION_omit_lock_prefix): Renamed to ... + (OPTION_OMIT_LOCK_PREFIX): This. + (md_longopts): Updated. + (md_parse_option): Likewise. + +2014-09-15 Andrew Bennett + Matthew Fortune + + * config/tc-mips.c (mips_nan2008): New static global. + (mips_flag_nan2008): Removed. + (LL_SC_FMT): New define. + (COP12_FMT): Updated. + (ISA_IS_R6): New define. + (ISA_HAS_64BIT_REGS): Add mips64r6. + (ISA_HAS_DROR): Likewise. + (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. + (ISA_HAS_ROR): Likewise. + (ISA_HAS_ODD_SINGLE_FPR): Likewise. + (ISA_HAS_MXHC1): Likewise. + (hilo_interlocks): Likewise. + (md_longopts): Likewise. + (ISA_HAS_LEGACY_NAN): New define. + (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. + (mips_ase): Add field rem_rev. + (mips_ases): Updated to add which ISA an ASE was removed in. + (mips_isa_rev): Add support for mips32r6 and mips64r6. + (mips_check_isa_supports_ase): Add support to check if an ASE + has been removed in the specified MIPS ISA revision. + (validate_mips_insn): Skip '-' character. + (macro_build): Likewise. + (mips_check_options): Prevent R6 working with fp32, mips16, + micromips, or branch relaxation. + (file_mips_check_options): Set R6 floating point registers to + 64 bit. Also deal with the nan2008 option. + (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, + BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, + BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and + BFD_RELOC_LO16_PCREL. + (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV + and OP_NON_ZERO_REG. + (match_check_prev_operand): New static function. + (match_same_rs_rt_operand): New static function. + (match_non_zero_reg_operand): New static function. + (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV + and OP_NON_ZERO_REG. + (insns_between): Added case to deal with forbidden slots. + (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 + and BFD_RELOC_MIPS_26_PCREL_S2. + (match_insn): Add support for operands -A, -B, +' and +". Also + skip '-' character. + (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. + (md_parse_option): Add support for mips32r6 and mips64r6. Also + update the nan option handling. + (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, + BFD_RELOC_MIPS_26_PCREL_S2. + (mips_force_relocation): Prevent forced relaxation for MIPS r6. + (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, + BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, + BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and + BFD_RELOC_LO16_PCREL. + (s_mipsset): Add support for mips32r6 and mips64r6. + (s_nan): Update to support the new nan2008 framework. + (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, + BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, + BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and + BFD_RELOC_LO16_PCREL. + (mips_elf_final_processing): Updated to use the mips_nan2008. + (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. + (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref + macros for R6. + (mips_fix_adjustable): Make PC relative R6 relocations relative + to the symbol and not the section. + * configure.ac: Add support for mips32r6 and mips64r6. + * configure: Regenerate. + * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line + options. + * doc/as.texinfo: Likewise. + 2014-09-15 Matthew Fortune * tc-mips.c (check_fpabi): Move softfloat and singlefloat