X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2FChangeLog;h=e11c2c0194cb3df6429f7a43c1f4e581f843447b;hb=6f8c0c4ccc0fb354d97de2ce75b5def36d40131d;hp=5e683a3db1922fd7cf1dc306d4089edf86faf8a3;hpb=584da044d948b811ff410338a5b961527db9effb;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/ChangeLog b/gas/ChangeLog index 5e683a3db1..e11c2c0194 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,236 @@ +Wed Jan 3 16:26:52 MET 2001 Jan Hubicka + + * tc-i386.h (CpuK6, CpuAthlon, CpuSledgehammer, CpuMMX, Cpu3dnow, + CpuUnknown): Renumber + (CpuP4, CpuSSE2): New. + (CpuUnknownFlags): Add CpuP4 and CpuSSE2 + +2001-01-03 Philip Blundell + + * config/tc-alpha.c (alpha_force_relocation): Handle vtable + relocs. + (alpha_fix_adjustable): Likewise. + (md_apply_fix): Likewise. + +2000-12-31 H.J. Lu + + * listing.c (listing_message): Allocate string only if it is + used. + + * configure: Rebuild. + +2000-12-31 Hans-Peter Nilsson + + * doc/internals.texi (Relaxing with a table) : + Point out caveats with generating fixups for the opcode in a frag. + +Sat Dec 30 19:02:48 MET 2000 Jan Hubicka + + * configure.in: Add support for x86_64 and x86_64-*-linux-gnu* + * NEWS: Add x86_64. + +2000-12-29 H.J. Lu + + * listing.c (calc_hex): Print the variable part only if the + fragment type is rs_fill. + +2000-12-29 Hans-Peter Nilsson + + * doc/internals.texi (tc_conditional_pseudoop, + TC_LINKRELAX_FIXUP): Fix typos. + +2000-12-28 Richard Henderson + + * write.c (subsegs_finish): Fix thinko last change -- don't + "optimize" the alignment == 0 case. + +2000-12-28 Richard Henderson + + * as.h (rs_align_test): New. + * frags.c (NOP_OPCODE): Move default from read.c. + (MAX_MEM_FOR_RS_ALIGN_CODE): New default. + (frag_align_code): New. + * frags.h (frag_align_code): Declare. + * read.c (NOP_OPCODE): Remove. + (do_align): Use frag_align_code. + * write.c (NOP_OPCODE): Remove. + (get_recorded_alignment): New. + (cvt_frag_to_fill): Handle rs_align_test. + (relax_segment): Likewise. + (subsegs_finish): Align last subseg in section to the + section alignment. Use frag_align_code. + * write.h (get_recorded_alignment): Declare. + * config/obj-coff.c (size_section): Handle rs_align_test. + (fill_section, fixup_mdeps): Likewise. + (write_object_file): Use frag_align_code. + + * config/tc-alpha.c (alpha_align): Use frag_align_code. + (alpha_handle_align): New. + * config/tc-alpha.h (HANDLE_ALIGN): New. + (MAX_MEM_FOR_RS_ALIGN_CODE): New. + + * config/tc-i386.h (md_do_align): Use frag_align_code. + (MAX_MEM_FOR_RS_ALIGN_CODE): New. + + * config/tc-ia64.c (ia64_md_do_align): Don't do code alignment. + (ia64_handle_align): New. + * config/tc-ia64.h (HANDLE_ALIGN): New. + (MAX_MEM_FOR_RS_ALIGN_CODE): New. + + * config/tc-m32r.c (m32r_do_align): Remove. + (m32r_handle_align): New. + (fill_insn): Use frag_align_code. + * config/tc-m32r.h (md_do_align): Remove. + (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New. + * config/tc-m88k.c, config/tc-m88k.h: Similarly. + * config/tc-mips.c, config/tc-mips.h: Similarly. + + * config/tc-sh.c (sh_cons_align): Use rs_align_test. + (sh_handle_align): Likewise. Handle rs_align_code. + (sh_do_align): Remove. + * config/tc-sh.h (md_do_align): Remove. + (MAX_MEM_FOR_RS_ALIGN_CODE): New. + + * config/tc-sparc.c (sparc_cons_align): Use rs_align_test. + (sparc_handle_align): Likewise. Handle rs_align_code. + * config/tc-sparc.h (md_do_align): Remove. + (MAX_MEM_FOR_RS_ALIGN_CODE): New. + +2000-12-22 DJ Delorie + + * config/tc-d10v.c (md_assemble): set prev_seg and prev_subseg + when we assemble the first half of a pair. + +2000-12-22 H.J. Lu + + * config/tc-i386.c (reloc): Update the macro for non-bfd + assembler. + (BFD_RELOC_X86_64_GOTPCREL): Set to 0 for non-bfd assembler. + +2000-12-22 H.J. Lu + + * dwarf2dbg.c (dwarf2_finish): Remove #if BFD_ASSEMBLER. + +Wed Dec 20 14:21:22 MET 2000 Jan Hubicka + + * tc-i386.h (i386_target_format): Define even for ELFs. + (QWORD_MNEM_SUFFIX): New macro. + (CpuK6,CpuAthlon,CpuSledgehammer, Cpu64, CpuNo64, CpuUnknownFlags): + New macros + (CpuMMX,CpuSSE,Cpu3dnow, CpuUnknown): Renumber. + (IgnoreSize, DefaultSize, No_?Suf, FWait, IsString, regKludge, IsPrefix, + ImmExt): Renumber. + (Size64, No_qSuf, NoRex64, Rex64): New macros. + (Reg64, Imm32S, Imm64, Disp32S, Disp64): New macros. + (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32, + InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc, + SReg2, SReg3, Acc, JumpAbsolute, RegMMX, RegXMM, EsSeg, InvMem): + Renumber. + (Reg, WordReg): Add Reg64. + (Imm): Add Imm32S and Imm64. + (EncImm): New. + (Disp): Add Disp64 and Disp32S. + (AnyMem): Add Disp32S. + (RegRex, RegRex64): New macros. + (rex_byte): New type. + * tc-i386.c (set_16bit_code_flag): Kill. + (fits_in_unsigned_long, fits_in_signed_long): New functions. + (reloc): New parameter "signed"; support x86_64. + (set_code_flag): New. + (DEFAULT_ARCH): New macro; default to "i386". + (default_arch): New static variable. + (struct _i386_insn): New fields Operand_PCrel; rex. + (flag_16bit_code): Kill; All tests replaced to "flag_code == CODE_64BIT" + (flag_code): New enum and static variable. + (use_rela_relocations): New static variable. + (flag_code_names): New static variable. + (cpu_arch_flags): Default to CpuUnknownFlags|CpuNo64. + (cpu_arch): Add "sledgehammer"; Add CPUAthlon to Athlon and CpuK6 to + K6 and Athlon. + (i386_align_code): Return plain "nop" for x86_64. + (mode_from_disp_size): Support Disp32S. + (smallest_imm_type): Support Imm32S and Imm64. + (offset_in_range): Support size of 8. + (set_cpu_arch): Do not clobber to Cpu64/CpuNo64. + (md_pseudo_table): Add "code64"; use set_code_flat. + (md_begin): Emit sane error message on hash failure. + (tc_i386_fix_adjustable): Support x86_64 relocations. + (md_assemble): Support QWORD_MNEM_SUFFIX, REX registers, + instructions supported on particular arch just partially, + output of 64bit immediates, handling of Imm32S and Disp32S type. + (i386_immedaite): Support x86_64 relocations; support 64bit constants. + (i386_displacement): Likewise. + (i386_index_check): Cleanup; support 64bit addresses. + (md_apply_fix3): Support x86_64 relocation and rela. + (md_longopts): Add "32" and "64". + (md_parse_option): Add OPTION_32 and OPTION_64. + (i386_target_format): Call even for ELFs; choose between + elf64-x86-64 and elf32-i386. + (i386_validate_fix): Refuse GOTOFF in 64bit mode. + (tc_gen_reloc): Support rela relocations and x86_64. + (intel_e09_1): Support QWORD. + +2000-12-15 Diego Novillo + + * config/tc-i386.c (intel_e09_1): Only flag as a memory operand if + it's not an offset expression. + (intel_e10_1): Ditto. Also, if the operand is an offset expression, + keep the braces '[' and ']' in the output string. + (intel_e11): Ditto. Also remove comparison intel_parser.op_modifier + != FLAT. There is no such op_modifier. + +2000-12-14 Michael Sokolov + + * dwarf2dbg.c: If we don't have , try including + if we have it. + +2000-12-13 Kazu Hirata + + * as.h: Fix formatting. + * cgen.h: Likewise. + * dwarf2dbg.c: Likewise. + * input-scrub.c: Likewise. + * read.h: Likewise. + +2000-12-13 Mark Elbrecht + + * configure.in (i386-*-msdosdjgpp): Set bfd_gas to yes. + configure: Regenerate. + +2000-12-13 Michael Sokolov + + * dwarf2dbg.c: #include only if it exists. + +2000-12-13 Rodney Brown + + * config/tc-hppa.c (pa_ip): Correct CHECK_FIELD typo. + (md_apply_fix): Here too. + +2000-12-12 Jim Wilson + + * config/tc-ia64.h (ia64_init): Add prototype. + +2000-12-12 H.J. Lu + + * dwarf2dbg.c: Enabled only if BFD_ASSEMBLER is defined. + + * read.h (outputting_stabs_line_debug): Change it to int. + * stabs.c (outputting_stabs_line_debug): Likewise. + +2000-12-12 Geoffrey Keating + + * config/obj-bout.c (obj_crawl_symbol_chain): Don't take + the address of a function result. + +2000-12-12 Franz Sirl + + * config/tc-ppc.c (md_pseudo_table): Add .file and .loc. + (md_assemble): Call dwarf2_emit_insn. + (shlib): Fix typo SHILB -> SHLIB. + (md_parse_option): Likewise. + (ppc_elf_validate_fix): Likewise: + * config/tc-ppc.h (DWARF2_LINE_MIN_INSN_LENGTH): New. + 2000-12-12 Nick Clifton * cgen.h: Fix formatting.