X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2FChangeLog;h=f5836ac2c37234268351a85feb72bebbf3178fd5;hb=b612f4193c6119fb06933b0dabcc84a2b952d57e;hp=4593a787c823a49b541fa785982a9814d3d6d44d;hpb=98907a704908c5877d929c57b2ddb2e5f899d9a9;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/ChangeLog b/gas/ChangeLog index 4593a787c8..f5836ac2c3 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,595 @@ +2016-11-13 Anthony Green + + * config/tc-moxie.c (md_assemble): Assemble 'bad' opcode. + +2016-11-11 Nick Clifton + + PR gas/20732 + * expr.c (integer_constant): If tc_allow_L_suffix is defined and + non-zero then accept a L or LL suffix. + * testsuite/gas/sparc/pr20732.d: New test source file. + * testsuite/gas/sparc/pr20732.d: New test output file. + * testsuite/gas/sparc/sparc.exp: Run new test. + +2016-11-11 Szabolcs Nagy + + * testsuite/gas/aarch64/pac.s: Add ARMv8.3 branch instruction tests. + * testsuite/gas/aarch64/pac.d: Likewise. + +2016-11-11 Szabolcs Nagy + + * config/tc-aarch64.c (process_omitted_operand): Handle AARCH64_OPND_Rm_SP. + (parse_operands): Likewise. + * testsuite/gas/aarch64/pac.s: Add pacga. + * testsuite/gas/aarch64/pac.d: Add pacga. + +2016-11-11 Szabolcs Nagy + + * testsuite/gas/aarch64/pac.s: New. + * testsuite/gas/aarch64/pac.d: New. + +2016-11-11 Szabolcs Nagy + + * testsuite/gas/aarch64/sysreg-3.s: New. + * testsuite/gas/aarch64/sysreg-3.d: New. + * testsuite/gas/aarch64/illegal-sysreg-3.l: New. + * testsuite/gas/aarch64/illegal-sysreg-3.d: New. + +2016-11-11 Szabolcs Nagy + + * testsuite/gas/aarch64/system-3.s: New. + * testsuite/gas/aarch64/system-3.d: New. + * testsuite/gas/aarch64/system.d: Update expected output. + +2016-11-11 Szabolcs Nagy + + * config/tc-aarch64.c (aarch64_archs): Add "armv8.3-a". + * doc/c-aarch64.texi (-march): Likewise. + +2016-11-11 Szabolcs Nagy + + * config/tc-aarch64.c (aarch64_features): Fix "simd" and "crypto". + * testsuite/gas/aarch64/illegal-crypto-nofp.d: New. + * testsuite/gas/aarch64/illegal-crypto-nofp.l: New. + * testsuite/gas/aarch64/illegal-fp16-nofp.d: New. + * testsuite/gas/aarch64/illegal-fp16-nofp.l: New. + * testsuite/gas/aarch64/illegal-fp16-nofp.s: New. + +2016-11-09 H.J. Lu + + PR binutils/20799 + * testsuite/gas/i386/opcode.s: Add a test for EVEX vpextrw. + * testsuite/gas/i386/opcode-intel.d: Updated. + * testsuite/gas/i386/opcode-suffix.d: Likewise. + * testsuite/gas/i386/opcode.d: Likewise. + * testsuite/gas/i386/x86-64-avx512bw-opts.s: Remove vpextrw + tests. + * testsuite/gas/i386/x86-64-avx512bw-opts-intel.d: Updated. + * testsuite/gas/i386/x86-64-avx512bw-opts.d: Likewise. + +2016-11-09 H.J. Lu + + PR binutils/20754 + * testsuite/gas/i386/opcode-suffix.d: Updated. + +2016-11-07 H.J. Lu + + PR binutils/20775 + * testsuite/gas/i386/i386.exp: Run fpu-bad. + * testsuite/gas/i386/fpu-bad.d: New file. + * testsuite/gas/i386/fpu-bad.s: Likewise. + +2016-11-04 Nathan Sidwell + + gas/ + * input-scrub.c (partial_size): Make size_t. + (buffer_length): Likewise. Adjust meaning. + (struct input_save): Adjust partial_size type. + (input_scrub_reinit): New. + (input_scrub_push, input_scrub_begin): Use it. + (input_scrub_next_buffer): Fix buffer extension logic. Only scan + newly read buffer for newline. + +2016-11-04 Andrew Burgess + + * config/tc-arc.c (find_opcode_match): Use insert function to + validate matching address type operands. + * testsuite/gas/arc/nps400-10.d: New file. + * testsuite/gas/arc/nps400-10.s: New file. + +2016-11-04 Thomas Preud'homme + + * config/tc-arm.c (cortex-m33): Declare new processor. + * doc/c-arm.texi (-mcpu ARM command line option): Document new + Cortex-M33 processor. + * NEWS: Mention ARM Cortex-M33 support. + +2016-11-04 Thomas Preud'homme + + * config/tc-arm.c (cortex-m23): Declare new processor. + * doc/c-arm.texi (-mcpu ARM command line option): Document new + Cortex-M23 processor. + * NEWS: Mention ARM Cortex-M23 support. + +2016-11-04 Palmer Dabbelt + Andrew Waterman + + * Makefile.am (CPU_DOCS): Add c-riscv.texi. + * Makefile.in: Regenerate. + * doc/all.texi: Set RISCV. + * doc/as.texinfo: Add RISCV options. + Add RISC-V-Dependent node. + Include c-riscv.texi. + * doc/c-riscv.texi: Rename RISC-V Options to RISC-V-Opts. + +2016-11-03 Graham Markall + + * testsuite/gas/arc/nps400-6.s: Change ldbit tests so that limm + operands are out of the range of an s9, in order to fix the test. + * testsuite/gas/arc/nps400-6.d: Updated to match new expected output. + +2016-11-03 Graham Markall + + * testsuite/gas/arc/nps-400-9.d: Added. + * testsuite/gas/arc/nps-400-9.s: Added. + +2016-11-03 Andrew Burgess + + * config/tc-arc.c (struct arc_insn): Change type of insn field. + (md_number_to_chars_midend): Support 6- and 8-byte values. + (emit_insn0): Update debug output. + (find_opcode_match): Likewise. + (build_fake_opcode_hash_entry): Delete. + (find_special_case_long_opcode): Delete. + (find_special_case): Remove long format special case handling. + (insert_operand): Change instruction type and update debug print + format. + (assemble_insn): Change instruction type, update debug print + formats, and remove unneeded assert. + +2016-11-03 Graham Markall + + * config/tc-arc.c (assemble_insn): Replace use of ARC_SHORT with + arc_opcode_len. + +2016-11-03 Graham Markall + + * config/tc-arc.c (struct arc_insn): Replace short_insn flag with + len field. + (apply_fixups): Update to use len field. + (emit_insn0): Simplify code, making use of len field. + (md_convert_frag): Update to use len field. + (assemble_insn): Update to use len field. + +2016-11-03 Siddhesh Poyarekar + + * config/tc-aarch64.c (aarch64_cpus): Add falkor. + * config/tc-arm.c (arm_cpus): Likewise. + * doc/c-aarch64.texi: Likewise. + * doc/c-arm.texi: Likewise. + +2016-11-03 H.J. Lu + + PR binutils/20754 + * testsuite/gas/i386/opcode.s: Add tests for opcode 0x82. + * testsuite/gas/i386/opcode-intel.d: Updated. + * testsuite/gas/i386/opcode.d: Likewise. + +2016-11-02 Jiong Wang + + * config/tc-arm.c (SBIT_SHIFT): New. + (T2_SBIT_SHIFT): Likewise. + (t32_insn_ok): Return TRUE for MOV in ARMv8-M Baseline. + (md_apply_fix): Try UINT16 encoding when ARM/Thumb modified immediate + encoding failed. + * testsuite/gas/arm/archv6t2-bad.s: New error case. + * testsuite/gas/arm/archv6t2-bad.l: New error match. + * testsuite/gas/arm/archv6t2.s: New testcase. + * testsuite/gas/arm/archv6t2.d: New expected result. + * testsuite/gas/arm/archv8m.s: New testcase. + * testsuite/gas/arm/archv8m-base.d: New expected result. + * testsuite/gas/arm/archv8m-main.d: Likewise. + * testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise. + +2016-11-02 Igor Tsimbalist + + * config/tc-i386.c: (cpu_arch) Add .avx512_4vnniw. + (cpu_noarch): Add noavx512_4vnniw. + * doc/c-i386.texi: Document avx512_4vnniw, noavx512_4vnniw. + * testsuite/gas/i386/i386.exp: Run AVX512_4VNNIW tests. + * testsuite/gas/i386/avx512_4vnniwd_vl-intel.d: New test. + * testsuite/gas/i386/avx512_4vnniwd_vl.d: Ditto. + * testsuite/gas/i386/avx512_4vnniwd_vl.s: Ditto. + * testsuite/gas/i386/avx512_4vnniwd-intel.d: Ditto. + * testsuite/gas/i386/avx512_4vnniwd.d: Ditto. + * testsuite/gas/i386/avx512_4vnniwd.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4vnniwd_vl-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4vnniwd_vl.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4vnniwd_vl.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4vnniwd-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4vnniwd.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4vnniwd.s: Ditto. + +2016-11-02 Igor Tsimbalist + + * config/tc-i386.c (cpu_arch): Add .avx512_4fmaps. + (cpu_noarch): Add noavx512_4fmaps. + (process_operands): Handle implicit quad group. + * doc/c-i386.texi: Document avx512_4fmaps, noavx512_4fmaps. + * testsuite/gas/i386/i386.exp: Add AVX512_4FMAPS tests. + * testsuite/gas/i386/avx512_4fmaps_vl-intel.d: New test. + * testsuite/gas/i386/avx512_4fmaps_vl.d: Ditto. + * testsuite/gas/i386/avx512_4fmaps_vl.s: Ditto. + * testsuite/gas/i386/avx512_4fmaps-intel.d: Ditto. + * testsuite/gas/i386/avx512_4fmaps.d: Ditto. + * testsuite/gas/i386/avx512_4fmaps.s: Ditto. + * testsuite/gas/i386/avx512_4fmaps-warn.l: Ditto. + * testsuite/gas/i386/avx512_4fmaps-warn.s: Ditto. + * testsuite/gas/i386/avx512_4fmaps_vl-warn.l: Ditto. + * testsuite/gas/i386/avx512_4fmaps_vl-warn.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps.d: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l: Ditto. + * testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s: Ditto. + +2016-11-01 Palmer Dabbelt + Andrew Waterman + + Add support for RISC-V architecture. + * Makefile.am: Add riscv files. + * Makefile.in: Regenerate. + * NEWS: Mention the support for this architecture. + * configure.in: Define a default architecture. + * configure: Regenerate. + * configure.tgt: Add entries for riscv. + * doc/as.texinfo: Likewise. + * testsuite/gas/all/gas.exp: Expect the redef tests to fail. + * testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail. + * config/tc-riscv.c: New file. + * config/tc-riscv.h: New file. + * doc/c-riscv.texi: New file. + * testsuite/gas/riscv: New directory. + * testsuite/gas/riscv/riscv.exp: New file. + * testsuite/gas/riscv/t_insns.d: New file. + * testsuite/gas/riscv/t_insns.s: New file. + +2016-10-27 Andrew Burgess + + * config/tc-arc.c (arc_target): Delete. + (arc_target_name): Delete. + (arc_features): Delete. + (arc_mach_type): Delete. + (mach_type_specified_p): Delete. + (enum mach_selection_type): New enum. + (mach_selection_mode): New static global. + (selected_cpu): New static global. + (arc_eflag): Rename to ... + (arc_initial_eflag): ...this, and make const. + (arc_select_cpu): Update comment, new parameter, check how + previous machine type selection was made, and record this + selection. Use selected_cpu instead of old globals. + (arc_option): Remove use of arc_get_mach, instead use + arc_select_cpu to validate machine type selection. Use + selected_cpu over old globals. + (allocate_tok): Use selected_cpu over old globals. + (find_opcode_match): Likewise. + (assemble_tokens): Likewise. + (arc_cons_fix_new): Likewise. + (arc_extinsn): Likewise. + (arc_extcorereg): Likewise. + (md_begin): Update default machine type selection, use + selected_cpu over old globals. + (md_parse_option): Update machine type selection option handling, + use selected_cpu over old globals. + * testsuite/gas/arc/nps400-0.s: Add .cpu directive. + +2016-10-26 Alan Modra + + Revert 2016-10-06 Alan Modra + * config/rl78-parse.y: Do use old %name-prefix syntax. + * config/rx-parse.y: Likewise. + +2016-10-21 H.J. Lu + + * config/tc-i386.c (cpu_arch): Remove .pcommit. + * doc/c-i386.texi: Likewise. + * testsuite/gas/i386/i386.exp: Remove pcommit tests. + * testsuite/gas/i386/pcommit-intel.d: Removed. + * testsuite/gas/i386/pcommit.d: Likewise. + * testsuite/gas/i386/pcommit.s: Likewise. + * testsuite/gas/i386/x86-64-pcommit-intel.d: Likewise. + * testsuite/gas/i386/x86-64-pcommit.d: Likewise. + * testsuite/gas/i386/x86-64-pcommit.s: Likewise. + +2016-10-20 H.J. Lu + + PR binutis/20705 + * testsuite/gas/i386/i386.exp: Run x86-64-opcode-bad. + * testsuite/gas/i386/x86-64-opcode-bad.d: New file. + * testsuite/gas/i386/x86-64-opcode-bad.s: Likewise. + +2016-10-19 Renlin Li + + * config/tc-arm.c (encode_arm_shift): Generate unpredictable warning + for register-shifted register instructions. + * testsuite/gas/arm/shift-bad-pc.d: New. + * testsuite/gas/arm/shift-bad-pc.l: New. + * testsuite/gas/arm/shift-bad-pc.s: New. + +2016-10-17 Cupertino Miranda + + * testsuite/arc/dis-inv.d: Fixed matching. + +2016-10-17 Cupertino Miranda + + * testsuite/arc/dis-inv.s: Test to validate patch. + * testsuite/arc/dis-inv.d: Likewise. + +2016-10-14 Claudiu Zissulescu + + * testsuite/gas/arc/shortlimm_a7.d: New file. + * testsuite/gas/arc/shortlimm_a7.s: Likewise. + * testsuite/gas/arc/shortlimm_hs.d: Likewise. + * testsuite/gas/arc/shortlimm_hs.s: Likewise. + +2016-10-11 Nick Clifton + + * gas/arm/tls.d: Adjust output to match change in objdump. + +2016-10-11 Jiong Wang + + PR target/20666 + * testsuite/gas/aarch64/alias-2.d: Update expected results. + +2016-10-10 Andreas Krebbel + + * testsuite/gas/cfi/cfi-common-1.d: Adjust regexps for mips64. + * testsuite/gas/cfi/cfi-common-2.d: Likewise. + * testsuite/gas/cfi/cfi-common-3.d: Likewise. + * testsuite/gas/cfi/cfi-common-4.d: Likewise. + * testsuite/gas/cfi/cfi-common-5.d: Likewise. + * testsuite/gas/cfi/cfi-common-7.d: Likewise. + * testsuite/gas/cfi/cfi-common-8.d: Likewise. + * testsuite/gas/cfi/cfi-common-9.d: Likewise. + * testsuite/gas/cfi/cfi-mips-1.d: Likewise. + +2016-10-08 Alan Modra + + * Makefile.am (EXTRA_as_new_SOURCES): Add config/rl78-parse.y and + config/rx-parse.y. Move config/bfin-parse.y. + (bfin-parse.@OBJEXT@, rl78-parse.@OBJEXT@, rx-parse.@OBJEXT@): Delete. + ($(srcdir)/config/rl78-defs.h): New rule. + * Makefile.in: Regenerate. + +2016-10-07 Jiong Wang + + PR target/20667 + * testsuite/gas/aarch64/sys-rt-reg.s: Test source for instructions using + SYS_Rt reg. + * testsuite/gas/aarch64/sys-rt-reg.d: New testcase. + +2016-10-06 Claudiu Zissulescu + + * testsuite/gas/arc/leave_enter.d: New file. + * testsuite/gas/arc/leave_enter.s: Likewise. + * testsuite/gas/arc/regnames.d: Likewise. + * testsuite/gas/arc/regnames.s: Likewise. + * config/tc-arc.c (arc_parse_name): Don't match reg names against + confirmed symbol names. + +2016-10-06 Alan Modra + + * app.c (do_scrub_chars): Move fall through comment. + * expr.c (operand): Likewise. + +2016-10-06 Matthew Fortune + + PR gas/20648 + * dw2gencfi.c (dot_cfi_sections): Refine the check for + inconsistent .cfi_sections to only consider compact vs non + compact forms. + * testsuite/gas/cfi/cfi-common-9.d: New file. + * testsuite/gas/cfi/cfi-common-9.s: New file. + * testsuite/gas/cfi/cfi.exp: Run new test. + +2016-10-06 Alan Modra + + * app.c: Add missing fall through comments. + * dw2gencfi.c: Likewise. + * expr.c: Likewise. + * config/tc-alpha.c: Likewise. + * config/tc-arc.c: Likewise. + * config/tc-arm.c: Likewise. + * config/tc-cr16.c: Likewise. + * config/tc-crx.c: Likewise. + * config/tc-dlx.c: Likewise. + * config/tc-h8300.c: Likewise. + * config/tc-hppa.c: Likewise. + * config/tc-i370.c: Likewise. + * config/tc-i386.c: Likewise. + * config/tc-i960.c: Likewise. + * config/tc-ia64.c: Likewise. + * config/tc-m68hc11.c: Likewise. + * config/tc-m68k.c: Likewise. + * config/tc-mep.c: Likewise. + * config/tc-metag.c: Likewise. + * config/tc-microblaze.c: Likewise. + * config/tc-mips.c: Likewise. + * config/tc-ns32k.c: Likewise. + * config/tc-rx.c: Likewise. + * config/tc-score.c: Likewise. + * config/tc-score7.c: Likewise. + * config/tc-sh.c: Likewise. + * config/tc-tic4x.c: Likewise. + * config/tc-vax.c: Likewise. + * config/tc-xstormy16.c: Likewise. + * config/tc-z80.c: Likewise. + * config/tc-z8k.c: Likewise. + * config/obj-elf.c: Likewise. + * config/tc-i386.c: Likewise. + * depend.c: Spell fall through comments consistently. + * config/tc-arm.c: Likewise. + * config/tc-d10v.c: Likewise. + * config/tc-i960.c: Likewise. + * config/tc-ia64.c: Likewise. + * config/tc-m68k.c: Likewise. + * config/tc-mcore.c: Likewise. + * config/tc-mep.c: Likewise. + * config/tc-ns32k.c: Likewise. + * config/tc-visium.c: Likewise. + * config/tc-xstormy16.c: Likewise. + * config/tc-z8k.c: Likewise. + +2016-10-06 Alan Modra + + * as.h (as_assert): Add ATTRIBUTE_NORETURN. + +2016-10-06 Alan Modra + + * config/tc-arc.c (find_opcode_match): Add missing break. + * config/tc-i960.c (get_cdisp): Likewise. + * config/tc-metag.c (parse_swap, md_apply_fix): Likewise. + * config/tc-mt.c (md_parse_option): Likewise. + * config/tc-nds32.c (nds32_apply_fix): Likewise. + * config/tc-hppa.c (pa_ip): Assert rather than testing last + condition of multiple if statements. + * config/tc-s390.c (s390_exp_compare): Return 0 on error. + * config/tc-tic4x.c (tic4x_operand_parse): Add as_bad and break + out of case rather than falling into next case. Formatting. + +2016-10-06 Alan Modra + + * config/rl78-parse.y: Don't use deprecated %name-prefix. + * config/rx-parse.y: Likewise. + +2016-09-29 Jiong Wang + + PR target/20553 + * testsuite/gas/aarch64/advsimd-fp16.s (indexed_elem): New high index + testcases for H and S variants. New low index testcases for D variant. + * testsuite/gas/aarch64/advsimd-fp16.d: Update expected results. + +2016-09-29 Alan Modra + + * config/tc-ppc.c (md_assemble): Handle PPC_OPERAND_OPTIONAL32. + * testsuite/gas/ppc/power8.s: Provide tbegin. operand. + * testsuite/gas/ppc/power9.d: Update cmprb disassembly. + +2016-09-26 Trevor Saunders + + * config/tc-xtensa.c (xg_reverse_shift_count): Pass cnt_arg instead of + cnt_argp to concat. + +2016-09-26 Vlad Zakharov + + * Makefile.in: Regenerate. + * configure: Likewise. + * doc/Makefile.in: Likewise. + +2016-09-26 Alan Modra + + * config/tc-ppc.c (ppc_elf_gnu_attribute): New function. + (md_pseudo_table ): Handle "gnu_attribute". + +2016-09-22 Thomas Preud'homme + + * config/tc-arm.c (v7m_psrs): Remove BASEPRI_MASK MRS/MSR special + register and redundant basepri_max. + +2016-09-21 Richard Sandiford + + * config/tc-aarch64.c (print_operands): Print spaces between + operands. + * testsuite/gas/aarch64/ilp32-basic.d: Expect spaces after "," + in addresses. + * testsuite/gas/aarch64/ldst-reg-imm-post-ind.d: Likewise. + * testsuite/gas/aarch64/ldst-reg-imm-pre-ind.d: Likewise. + * testsuite/gas/aarch64/ldst-reg-pair.d: Likewise. + * testsuite/gas/aarch64/ldst-reg-reg-offset.d: Likewise. + * testsuite/gas/aarch64/ldst-reg-uns-imm.d: Likewise. + * testsuite/gas/aarch64/ldst-reg-unscaled-imm.d: Likewise. + * testsuite/gas/aarch64/reloc-insn.d: Likewise. + * testsuite/gas/aarch64/sve.d: Likewise. + * testsuite/gas/aarch64/symbol.d: Likewise. + * testsuite/gas/aarch64/system.d: Likewise. + * testsuite/gas/aarch64/tls-desc.d: Likewise. + * testsuite/gas/aarch64/sve-invalid.l: Expect spaces after "," + in suggested alternatives. + * testsuite/gas/aarch64/verbose-error.l: Likewise. + +2016-09-21 Richard Sandiford + + * config/tc-aarch64.c (output_operand_error_record): Use "must be" + rather than "should be" or "expected to be" in error messages. + (parse_operands): Likewise. + * testsuite/gas/aarch64/diagnostic.l: Likewise. + * testsuite/gas/aarch64/legacy_reg_names.l: Likewise. + * testsuite/gas/aarch64/sve-invalid.l: Likewise. + * testsuite/gas/aarch64/sve-reg-diagnostic.l: Likewise. + +2016-09-21 Richard Sandiford + + * config/tc-aarch64.c (opcode_lookup): Search for the end of + a condition name, rather than assuming that it will have exactly + 2 characters. + (parse_operands): Likewise. + * testsuite/gas/aarch64/alias.d: Add new condition-code comments + to the expected output. + * testsuite/gas/aarch64/beq_1.d: Likewise. + * testsuite/gas/aarch64/float-fp16.d: Likewise. + * testsuite/gas/aarch64/int-insns.d: Likewise. + * testsuite/gas/aarch64/no-aliases.d: Likewise. + * testsuite/gas/aarch64/programmer-friendly.d: Likewise. + * testsuite/gas/aarch64/reloc-insn.d: Likewise. + * testsuite/gas/aarch64/b_c_1.d, testsuite/gas/aarch64/b_c_1.s: + New test. + +2016-09-21 Richard Sandiford + + * testsuite/gas/aarch64/diagnostic.s, + testsuite/gas/aarch64/diagnostic.l: Add tests for + invalid uses of MUL VL and MUL in base AArch64 instructions. + * testsuite/gas/aarch64/sve-add.s, testsuite/gas/aarch64/sve-add.d, + testsuite/gas/aarch64/sve-dup.s, testsuite/gas/aarch64/sve-dup.d, + testsuite/gas/aarch64/sve-invalid.s, + testsuite/gas/aarch64/sve-invalid.d, + testsuite/gas/aarch64/sve-invalid.l, + testsuite/gas/aarch64/sve-reg-diagnostic.s, + testsuite/gas/aarch64/sve-reg-diagnostic.d, + testsuite/gas/aarch64/sve-reg-diagnostic.l, + testsuite/gas/aarch64/sve.s, testsuite/gas/aarch64/sve.d: New tests. + +2016-09-21 Richard Sandiford + + * doc/c-aarch64.texi: Document the "sve" feature. + * config/tc-aarch64.c (REG_TYPE_R_Z_BHSDQ_VZP): New register type. + (get_reg_expected_msg): Handle it. + (parse_operands): When parsing operands of an SVE instruction, + disallow immediates that match REG_TYPE_R_Z_BHSDQ_VZP. + (aarch64_features): Add an entry for SVE. + +2016-09-21 Richard Sandiford + + * config/tc-aarch64.c (parse_operands): Handle the new SVE core + and FP register operands. + +2016-09-21 Richard Sandiford + + * config/tc-aarch64.c (double_precision_operand_p): New function. + (parse_operands): Use it to calculate the dp_p input to + parse_aarch64_imm_float. Handle the new SVE FP immediate operands. + +2016-09-21 Richard Sandiford + + * config/tc-aarch64.c (parse_operands): Handle the new SVE integer + immediate operands. + 2016-09-21 Richard Sandiford * config/tc-aarch64.c (SHIFTED_NONE, SHIFTED_MUL_VL): New