X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2FNEWS;h=bf278ef65a888f738f16f5a7479d484fc5ec9b56;hb=6e29ef6d2828415f5ee2d6e1690d13bc40a8d5d4;hp=5a92f3cf2f03ac7c7c495361eeecdd5be29108ed;hpb=e16bb312f5bec8b2305f400898523122a6fdad63;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/NEWS b/gas/NEWS index 5a92f3cf2f..bf278ef65a 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,4 +1,122 @@ -*- text -*- +* Support for the National Semiconductor CR16 target has been added. + +* Added gas .reloc pseudo. This is a low-level interface for creating + relocations. + +* Add support for x86_64 PE+ target. + +* Add support for Score target. + +* Support for the Infineon XC16X has been added by KPIT Cummins Infosystems. + +* Support for ms2 architecture has been added. + +* Support for the Z80 processor family has been added. + +* Add support for the "@" syntax to the command line, so that extra + switches can be read from . + +* The SH target supports a new command line switch --enable-reg-prefix which, + if enabled, will allow register names to be optionally prefixed with a $ + character. This allows register names to be distinguished from label names. + +* Macros with a variable number of arguments are now supported. See the + documentation for how this works. + +* Added --reduce-memory-overheads switch to reduce the size of the hash + tables used, at the expense of longer assembly times, and + --hash-size= to set the size of the hash tables used by gas. + +* Macro names and macro parameter names can now be any identifier that would + also be legal as a symbol elsewhere. For macro parameter names, this is + known to cause problems in certain sources when the respective target uses + characters inconsistently, and thus macro parameter references may no longer + be recognized as such (see the documentation for details). + +* Support the .f_floating, .d_floating, .g_floating and .h_floating directives + for the VAX target in order to be more compatible with the VAX MACRO + assembler. + +* New command line option -mtune=[itanium1|itanium2] for IA64 targets. + +Changes in 2.16: + +* Redefinition of macros now results in an error. + +* New command line option -mhint.b=[ok|warning|error] for IA64 targets. + +* New command line option -munwind-check=[warning|error] for IA64 + targets. + +* The IA64 port now uses automatic dependency violation removal as its default + mode. + +* Port to MAXQ processor contributed by HCL Tech. + +* Added support for generating unwind tables for ARM ELF targets. + +* Add a -g command line option to generate debug information in the target's + preferred debug format. + +* Support for the crx-elf target added. + +* Support for the sh-symbianelf target added. + +* Added a pseudo-op (.secrel32) to generate 32 bit section relative relocations + on pe[i]-i386; required for this target's DWARF 2 support. + +* Support for Motorola MCF521x/5249/547x/548x added. + +* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC + instrucitons. + +* New command line option -mno-shared for MIPS ELF targets. + +* New command line option --alternate and pseudo-ops .altmacro and .noaltmacro + added to enter (and leave) alternate macro syntax mode. + +Changes in 2.15: + +* The MIPS -membedded-pic option (Embedded-PIC code generation) is + deprecated and will be removed in a future release. + +* Added PIC m32r Linux (ELF) and support to M32R assembler. + +* Added support for ARM V6. + +* Added support for sh4a and variants. + +* Support for Renesas M32R2 added. + +* Limited support for Mapping Symbols as specified in the ARM ELF + specification has been added to the arm assembler. + +* On ARM architectures, added a new gas directive ".unreq" that undoes + definitions created by ".req". + +* Support for Motorola ColdFire MCF528x added. + +* Added --gstabs+ switch to enable the generation of STABS debug format + information with GNU extensions. + +* Added support for MIPS64 Release 2. + +* Added support for v850e1. + +* Added -n switch for x86 assembler. By default, x86 GAS replaces + multiple nop instructions used for alignment within code sections + with multi-byte nop instructions such as leal 0(%esi,1),%esi. This + switch disables the optimization. + +* Removed -n option from MIPS assembler. It was not useful, and confused the + existing -non_shared option. + +Changes in 2.14: + +* Added support for MIPS32 Release 2. + +* Added support for Xtensa architecture. * Support for Intel's iWMMXt processor (an ARM variant) added.