X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2Fconfig%2Fbfin-parse.y;h=3484448f4195e7f5be57269af79be32520053d05;hb=f42f1a1d6ca0cc84e43d7f2b85044a2565ca00f2;hp=75d1b1e37947fd28b7a165e2fe08f8fd8e02a315;hpb=8d3842cd156eb6cd6cd6c68c49c090b8f9452a2d;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y index 75d1b1e379..3484448f41 100644 --- a/gas/config/bfin-parse.y +++ b/gas/config/bfin-parse.y @@ -1,5 +1,5 @@ /* bfin-parse.y ADI Blackfin parser - Copyright (C) 2005-2015 Free Software Foundation, Inc. + Copyright (C) 2005-2017 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -22,7 +22,6 @@ #include "as.h" #include "bfin-aux.h" /* Opcode generating auxiliaries. */ -#include "libbfd.h" #include "elf/common.h" #include "elf/bfin.h" @@ -158,16 +157,15 @@ extern INSTR_T insn; static Expr_Node *binary (Expr_Op_Type, Expr_Node *, Expr_Node *); static Expr_Node *unary (Expr_Op_Type, Expr_Node *); -static void notethat (char *, ...); +static void notethat (const char *, ...); -char *current_inputline; extern char *yytext; -int yyerror (char *); +int yyerror (const char *); /* Used to set SRCx fields to all 1s as described in the PRM. */ static Register reg7 = {REG_R7, 0}; -void error (char *format, ...) +void error (const char *format, ...) { va_list ap; static char buffer[2000]; @@ -180,7 +178,7 @@ void error (char *format, ...) } int -yyerror (char *msg) +yyerror (const char *msg) { if (msg[0] == '\0') error ("%s", msg); @@ -668,7 +666,7 @@ asm: asm_1 SEMICOLON else if (is_group2 ($3) && is_group1 ($5)) $$ = gen_multi_instr_1 ($1, $5, $3); else - return yyerror ("Wrong 16 bit instructions groups, slot 2 and slot 3 must be 16-bit instrution group"); + return yyerror ("Wrong 16 bit instructions groups, slot 2 and slot 3 must be 16-bit instruction group"); } else if (($3->value & 0xf800) == 0xc000) { @@ -677,7 +675,7 @@ asm: asm_1 SEMICOLON else if (is_group2 ($1) && is_group1 ($5)) $$ = gen_multi_instr_1 ($3, $5, $1); else - return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 3 must be 16-bit instrution group"); + return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 3 must be 16-bit instruction group"); } else if (($5->value & 0xf800) == 0xc000) { @@ -686,7 +684,7 @@ asm: asm_1 SEMICOLON else if (is_group2 ($1) && is_group1 ($3)) $$ = gen_multi_instr_1 ($5, $3, $1); else - return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 2 must be 16-bit instrution group"); + return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 2 must be 16-bit instruction group"); } else error ("\nIllegal Multi Issue Construct, at least any one of the slot must be DSP32 instruction group\n"); @@ -4495,7 +4493,7 @@ expr_1: expr_1 STAR expr_1 EXPR_T mkexpr (int x, SYMBOL_T s) { - EXPR_T e = (EXPR_T) ALLOCATE (sizeof (struct expression_cell)); + EXPR_T e = XNEW (struct expression_cell); e->value = x; EXPR_SYMBOL(e) = s; return e; @@ -4651,7 +4649,7 @@ unary (Expr_Op_Type op, Expr_Node *x) int debug_codeselection = 0; static void -notethat (char *format, ...) +notethat (const char *format, ...) { va_list ap; va_start (ap, format);