X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2Fconfig%2Ftc-arm.c;h=50a658b8c158bfad6965af857ff1f430d1ee1a74;hb=6610dc6daa661b7cd042bc6313a29859b87263d9;hp=2ccc053c15d87d93bbaff416a02956a7ba5ec980;hpb=6d4af3c269e64b0093b23bd63d302bd9f90de6a9;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 2ccc053c15..50a658b8c1 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -155,10 +155,10 @@ static const arm_feature_set *object_arch = NULL; /* Constants for known architecture features. */ static const arm_feature_set fpu_default = FPU_DEFAULT; -static const arm_feature_set fpu_arch_vfp_v1 = FPU_ARCH_VFP_V1; +static const arm_feature_set fpu_arch_vfp_v1 ATTRIBUTE_UNUSED = FPU_ARCH_VFP_V1; static const arm_feature_set fpu_arch_vfp_v2 = FPU_ARCH_VFP_V2; -static const arm_feature_set fpu_arch_vfp_v3 = FPU_ARCH_VFP_V3; -static const arm_feature_set fpu_arch_neon_v1 = FPU_ARCH_NEON_V1; +static const arm_feature_set fpu_arch_vfp_v3 ATTRIBUTE_UNUSED = FPU_ARCH_VFP_V3; +static const arm_feature_set fpu_arch_neon_v1 ATTRIBUTE_UNUSED = FPU_ARCH_NEON_V1; static const arm_feature_set fpu_arch_fpa = FPU_ARCH_FPA; static const arm_feature_set fpu_any_hard = FPU_ANY_HARD; static const arm_feature_set fpu_arch_maverick = FPU_ARCH_MAVERICK; @@ -201,7 +201,8 @@ static const arm_feature_set arm_ext_v7r = ARM_FEATURE_CORE_LOW (ARM_EXT_V7R); static const arm_feature_set arm_ext_v7m = ARM_FEATURE_CORE_LOW (ARM_EXT_V7M); static const arm_feature_set arm_ext_v8 = ARM_FEATURE_CORE_LOW (ARM_EXT_V8); static const arm_feature_set arm_ext_m = - ARM_FEATURE_CORE (ARM_EXT_V6M | ARM_EXT_OS | ARM_EXT_V7M, ARM_EXT2_V8M); + ARM_FEATURE_CORE (ARM_EXT_V6M | ARM_EXT_OS | ARM_EXT_V7M, + ARM_EXT2_V8M | ARM_EXT2_V8M_MAIN); static const arm_feature_set arm_ext_mp = ARM_FEATURE_CORE_LOW (ARM_EXT_MP); static const arm_feature_set arm_ext_sec = ARM_FEATURE_CORE_LOW (ARM_EXT_SEC); static const arm_feature_set arm_ext_os = ARM_FEATURE_CORE_LOW (ARM_EXT_OS); @@ -209,11 +210,19 @@ static const arm_feature_set arm_ext_adiv = ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV); static const arm_feature_set arm_ext_virt = ARM_FEATURE_CORE_LOW (ARM_EXT_VIRT); static const arm_feature_set arm_ext_pan = ARM_FEATURE_CORE_HIGH (ARM_EXT2_PAN); static const arm_feature_set arm_ext_v8m = ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M); +static const arm_feature_set arm_ext_v8m_main = + ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M_MAIN); +/* Instructions in ARMv8-M only found in M profile architectures. */ +static const arm_feature_set arm_ext_v8m_m_only = + ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8M | ARM_EXT2_V8M_MAIN); static const arm_feature_set arm_ext_v6t2_v8m = ARM_FEATURE_CORE_HIGH (ARM_EXT2_V6T2_V8M); /* Instructions shared between ARMv8-A and ARMv8-M. */ static const arm_feature_set arm_ext_atomics = ARM_FEATURE_CORE_HIGH (ARM_EXT2_ATOMICS); +/* DSP instructions Tag_DSP_extension refers to. */ +static const arm_feature_set arm_ext_dsp = + ARM_FEATURE_CORE_LOW (ARM_EXT_V5E | ARM_EXT_V5ExP | ARM_EXT_V6_DSP); static const arm_feature_set arm_ext_v8_2 = ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_2A); /* FP16 instructions. */ @@ -221,7 +230,7 @@ static const arm_feature_set arm_ext_fp16 = ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST); static const arm_feature_set arm_arch_any = ARM_ANY; -static const arm_feature_set arm_arch_full = ARM_FEATURE (-1, -1, -1); +static const arm_feature_set arm_arch_full ATTRIBUTE_UNUSED = ARM_FEATURE (-1, -1, -1); static const arm_feature_set arm_arch_t2 = ARM_ARCH_THUMB2; static const arm_feature_set arm_arch_none = ARM_ARCH_NONE; static const arm_feature_set arm_arch_v6m_only = ARM_ARCH_V6M_ONLY; @@ -1988,6 +1997,10 @@ parse_neon_el_struct_list (char **str, unsigned *pbase, const char *const incr_error = _("register stride must be 1 or 2"); const char *const type_error = _("mismatched element/structure types in list"); struct neon_typed_alias firsttype; + firsttype.defined = 0; + firsttype.eltype.type = NT_invtype; + firsttype.eltype.size = -1; + firsttype.index = -1; if (skip_past_char (&ptr, '{') == SUCCESS) leading_brace = 1; @@ -2180,7 +2193,7 @@ insert_reg_alias (char *str, unsigned number, int type) } name = xstrdup (str); - new_reg = (struct reg_entry *) xmalloc (sizeof (struct reg_entry)); + new_reg = XNEW (struct reg_entry); new_reg->name = name; new_reg->number = number; @@ -2208,8 +2221,7 @@ insert_neon_reg_alias (char *str, int number, int type, if (atype) { - reg->neon = (struct neon_typed_alias *) - xmalloc (sizeof (struct neon_typed_alias)); + reg->neon = XNEW (struct neon_typed_alias); *reg->neon = *atype; } } @@ -2255,9 +2267,7 @@ create_register_alias (char * newname, char *p) nlen = strlen (newname); #endif - nbuf = xmalloc (nlen + 1); - memcpy (nbuf, newname, nlen); - nbuf[nlen] = '\0'; + nbuf = xmemdup0 (newname, nlen); /* Create aliases under the new name as stated; an all-lowercase version of the new name; and an all-uppercase version of the new @@ -2420,9 +2430,7 @@ create_neon_reg_alias (char *newname, char *p) namelen = strlen (newname); #endif - namebuf = xmalloc (namelen + 1); - strncpy (namebuf, newname, namelen); - namebuf[namelen] = '\0'; + namebuf = xmemdup0 (newname, namelen); insert_neon_reg_alias (namebuf, basereg->number, basetype, typeinfo.defined != 0 ? &typeinfo : NULL); @@ -3138,7 +3146,7 @@ find_or_make_literal_pool (void) if (pool == NULL) { /* Create a new pool. */ - pool = (literal_pool *) xmalloc (sizeof (* pool)); + pool = XNEW (literal_pool); if (! pool) return NULL; @@ -3276,6 +3284,7 @@ add_to_lit_pool (unsigned int nbytes) } pool->literals[entry] = inst.reloc.exp; + pool->literals[entry].X_op = O_constant; pool->literals[entry].X_add_number = 0; pool->literals[entry++].X_md = (PADDING_SLOT << 8) | 4; pool->next_free_entry += 1; @@ -3535,7 +3544,7 @@ s_arm_elf_cons (int nbytes) XXX Surely there is a cleaner way to do this. */ char *p = input_line_pointer; int offset; - char *save_buf = xmalloc (input_line_pointer - base); + char *save_buf = XNEWVEC (char, input_line_pointer - base); memcpy (save_buf, base, input_line_pointer - base); memmove (base + (input_line_pointer - before_reloc), @@ -8174,6 +8183,12 @@ do_rd (void) inst.instruction |= inst.operands[0].reg << 12; } +static void +do_rn (void) +{ + inst.instruction |= inst.operands[0].reg << 16; +} + static void do_rd_rm (void) { @@ -10971,7 +10986,7 @@ do_t_branch (void) { int opcode; int cond; - int reloc; + bfd_reloc_code_real_type reloc; cond = inst.cond; set_it_insn_type (IF_INSIDE_IT_LAST_INSN); @@ -14993,7 +15008,7 @@ do_neon_mac_maybe_scalar (void) { enum neon_shape rs = neon_select_shape (NS_DDS, NS_QQS, NS_NULL); struct neon_type_el et = neon_check_type (3, rs, - N_EQK, N_EQK, N_I16 | N_I32 | N_F32 | N_KEY); + N_EQK, N_EQK, N_I16 | N_I32 | N_F_16_32 | N_KEY); NEON_ENCODE (SCALAR, inst); neon_mul_mac (et, neon_quad (rs)); } @@ -18186,8 +18201,8 @@ known_t32_only_insn (const struct asm_opcode *opcode) || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_barrier)) return TRUE; - /* Wide-only instruction added to ARMv8-M. */ - if (ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_v8m) + /* Wide-only instruction added to ARMv8-M Baseline. */ + if (ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_v8m_m_only) || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_atomics) || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_v6t2_v8m) || ARM_CPU_HAS_FEATURE (*opcode->tvariant, arm_ext_div)) @@ -18763,14 +18778,16 @@ static const struct asm_psr v7m_psrs[] = {"ipsr", 5 }, {"IPSR", 5 }, {"epsr", 6 }, {"EPSR", 6 }, {"iepsr", 7 }, {"IEPSR", 7 }, - {"msp", 8 }, {"MSP", 8 }, - {"psp", 9 }, {"PSP", 9 }, + {"msp", 8 }, {"MSP", 8 }, {"msp_s", 8 }, {"MSP_S", 8 }, + {"psp", 9 }, {"PSP", 9 }, {"psp_s", 9 }, {"PSP_S", 9 }, {"primask", 16}, {"PRIMASK", 16}, {"basepri", 17}, {"BASEPRI", 17}, {"basepri_max", 18}, {"BASEPRI_MAX", 18}, {"basepri_max", 18}, {"BASEPRI_MASK", 18}, /* Typo, preserved for backwards compatibility. */ {"faultmask", 19}, {"FAULTMASK", 19}, - {"control", 20}, {"CONTROL", 20} + {"control", 20}, {"CONTROL", 20}, + {"msp_ns", 0x88}, {"MSP_NS", 0x88}, + {"psp_ns", 0x89}, {"PSP_NS", 0x89} }; /* Table of all shift-in-operand names. */ @@ -20945,12 +20962,25 @@ static const struct asm_opcode insns[] = cCE("cfmadda32", e200600, 4, (RMAX, RMAX, RMFX, RMFX), mav_quad), cCE("cfmsuba32", e300600, 4, (RMAX, RMAX, RMFX, RMFX), mav_quad), + /* ARMv8-M instructions. */ #undef ARM_VARIANT #define ARM_VARIANT NULL #undef THUMB_VARIANT #define THUMB_VARIANT & arm_ext_v8m + TUE("sg", 0, e97fe97f, 0, (), 0, noargs), + TUE("blxns", 0, 4784, 1, (RRnpc), 0, t_blx), + TUE("bxns", 0, 4704, 1, (RRnpc), 0, t_bx), TUE("tt", 0, e840f000, 2, (RRnpc, RRnpc), 0, tt), TUE("ttt", 0, e840f040, 2, (RRnpc, RRnpc), 0, tt), + TUE("tta", 0, e840f080, 2, (RRnpc, RRnpc), 0, tt), + TUE("ttat", 0, e840f0c0, 2, (RRnpc, RRnpc), 0, tt), + + /* FP for ARMv8-M Mainline. Enabled for ARMv8-M Mainline because the + instructions behave as nop if no VFP is present. */ +#undef THUMB_VARIANT +#define THUMB_VARIANT & arm_ext_v8m_main + TUEc("vlldm", 0, ec300a00, 1, (RRnpc), rn), + TUEc("vlstm", 0, ec200a00, 1, (RRnpc), rn), }; #undef ARM_VARIANT #undef THUMB_VARIANT @@ -21760,10 +21790,10 @@ add_unwind_opcode (valueT op, int length) { unwind.opcode_alloc += ARM_OPCODE_CHUNK_SIZE; if (unwind.opcodes) - unwind.opcodes = (unsigned char *) xrealloc (unwind.opcodes, - unwind.opcode_alloc); + unwind.opcodes = XRESIZEVEC (unsigned char, unwind.opcodes, + unwind.opcode_alloc); else - unwind.opcodes = (unsigned char *) xmalloc (unwind.opcode_alloc); + unwind.opcodes = XNEWVEC (unsigned char, unwind.opcode_alloc); } while (length > 0) { @@ -21867,10 +21897,7 @@ start_unwind_section (const segT text_seg, int idx) const char * prefix; const char * prefix_once; const char * group_name; - size_t prefix_len; - size_t text_len; char * sec_name; - size_t sec_name_len; int type; int flags; int linkonce; @@ -21899,13 +21926,7 @@ start_unwind_section (const segT text_seg, int idx) text_name += strlen (".gnu.linkonce.t."); } - prefix_len = strlen (prefix); - text_len = strlen (text_name); - sec_name_len = prefix_len + text_len; - sec_name = (char *) xmalloc (sec_name_len + 1); - memcpy (sec_name, prefix, prefix_len); - memcpy (sec_name + prefix_len, text_name, text_len); - sec_name[prefix_len + text_len] = '\0'; + sec_name = concat (prefix, text_name, (char *) NULL); flags = SHF_ALLOC; linkonce = 0; @@ -24012,9 +24033,9 @@ tc_gen_reloc (asection *section, fixS *fixp) arelent * reloc; bfd_reloc_code_real_type code; - reloc = (arelent *) xmalloc (sizeof (arelent)); + reloc = XNEW (arelent); - reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); + reloc->sym_ptr_ptr = XNEW (asymbol *); *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; @@ -24661,8 +24682,8 @@ arm_adjust_symtab (void) /* If it's a .thumb_func, declare it as so, otherwise tag label as .code 16. */ if (THUMB_IS_FUNC (sym)) - elf_sym->internal_elf_sym.st_target_internal - = ST_BRANCH_TO_THUMB; + ARM_SET_SYM_BRANCH_TYPE (elf_sym->internal_elf_sym.st_target_internal, + ST_BRANCH_TO_THUMB); else if (EF_ARM_EABI_VERSION (meabi_flags) < EF_ARM_EABI_VER4) elf_sym->internal_elf_sym.st_info = ELF_ST_INFO (bind, STT_ARM_16BIT); @@ -25440,12 +25461,16 @@ struct arm_option_extension_value_table size_t name_len; const arm_feature_set merge_value; const arm_feature_set clear_value; - const arm_feature_set allowed_archs; + /* List of architectures for which an extension is available. ARM_ARCH_NONE + indicates that an extension is available for all architectures while + ARM_ANY marks an empty entry. */ + const arm_feature_set allowed_archs[2]; }; /* The following table must be in alphabetical order with a NULL last entry. */ -#define ARM_EXT_OPT(N, M, C, AA) { N, sizeof (N) - 1, M, C, AA } +#define ARM_EXT_OPT(N, M, C, AA) { N, sizeof (N) - 1, M, C, { AA, ARM_ANY } } +#define ARM_EXT_OPT2(N, M, C, AA1, AA2) { N, sizeof (N) - 1, M, C, {AA1, AA2} } static const struct arm_option_extension_value_table arm_extensions[] = { ARM_EXT_OPT ("crc", ARCH_CRC_ARMV8, ARM_FEATURE_COPROC (CRC_EXT_ARMV8), @@ -25453,23 +25478,28 @@ static const struct arm_option_extension_value_table arm_extensions[] = ARM_EXT_OPT ("crypto", FPU_ARCH_CRYPTO_NEON_VFP_ARMV8, ARM_FEATURE_COPROC (FPU_CRYPTO_ARMV8), ARM_FEATURE_CORE_LOW (ARM_EXT_V8)), + ARM_EXT_OPT ("dsp", ARM_FEATURE_CORE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP), + ARM_FEATURE_CORE_LOW (ARM_EXT_V5ExP | ARM_EXT_V6_DSP), + ARM_FEATURE_CORE (ARM_EXT_V7M, ARM_EXT2_V8M)), ARM_EXT_OPT ("fp", FPU_ARCH_VFP_ARMV8, ARM_FEATURE_COPROC (FPU_VFP_ARMV8), ARM_FEATURE_CORE_LOW (ARM_EXT_V8)), ARM_EXT_OPT ("fp16", ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST), ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST), ARM_ARCH_V8_2A), - ARM_EXT_OPT ("idiv", ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV | ARM_EXT_DIV), + ARM_EXT_OPT2 ("idiv", ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV | ARM_EXT_DIV), ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV | ARM_EXT_DIV), - ARM_FEATURE_CORE_LOW (ARM_EXT_V7A | ARM_EXT_V7R)), + ARM_FEATURE_CORE_LOW (ARM_EXT_V7A), + ARM_FEATURE_CORE_LOW (ARM_EXT_V7R)), ARM_EXT_OPT ("iwmmxt",ARM_FEATURE_COPROC (ARM_CEXT_IWMMXT), - ARM_FEATURE_COPROC (ARM_CEXT_IWMMXT), ARM_ANY), + ARM_FEATURE_COPROC (ARM_CEXT_IWMMXT), ARM_ARCH_NONE), ARM_EXT_OPT ("iwmmxt2", ARM_FEATURE_COPROC (ARM_CEXT_IWMMXT2), - ARM_FEATURE_COPROC (ARM_CEXT_IWMMXT2), ARM_ANY), + ARM_FEATURE_COPROC (ARM_CEXT_IWMMXT2), ARM_ARCH_NONE), ARM_EXT_OPT ("maverick", ARM_FEATURE_COPROC (ARM_CEXT_MAVERICK), - ARM_FEATURE_COPROC (ARM_CEXT_MAVERICK), ARM_ANY), - ARM_EXT_OPT ("mp", ARM_FEATURE_CORE_LOW (ARM_EXT_MP), + ARM_FEATURE_COPROC (ARM_CEXT_MAVERICK), ARM_ARCH_NONE), + ARM_EXT_OPT2 ("mp", ARM_FEATURE_CORE_LOW (ARM_EXT_MP), ARM_FEATURE_CORE_LOW (ARM_EXT_MP), - ARM_FEATURE_CORE_LOW (ARM_EXT_V7A | ARM_EXT_V7R)), + ARM_FEATURE_CORE_LOW (ARM_EXT_V7A), + ARM_FEATURE_CORE_LOW (ARM_EXT_V7R)), ARM_EXT_OPT ("os", ARM_FEATURE_CORE_LOW (ARM_EXT_OS), ARM_FEATURE_CORE_LOW (ARM_EXT_OS), ARM_FEATURE_CORE_LOW (ARM_EXT_V6M)), @@ -25479,9 +25509,10 @@ static const struct arm_option_extension_value_table arm_extensions[] = ARM_EXT_OPT ("rdma", FPU_ARCH_NEON_VFP_ARMV8_1, ARM_FEATURE_COPROC (FPU_NEON_ARMV8 | FPU_NEON_EXT_RDMA), ARM_FEATURE_CORE_LOW (ARM_EXT_V8)), - ARM_EXT_OPT ("sec", ARM_FEATURE_CORE_LOW (ARM_EXT_SEC), + ARM_EXT_OPT2 ("sec", ARM_FEATURE_CORE_LOW (ARM_EXT_SEC), ARM_FEATURE_CORE_LOW (ARM_EXT_SEC), - ARM_FEATURE_CORE_LOW (ARM_EXT_V6K | ARM_EXT_V7A)), + ARM_FEATURE_CORE_LOW (ARM_EXT_V6K), + ARM_FEATURE_CORE_LOW (ARM_EXT_V7A)), ARM_EXT_OPT ("simd", FPU_ARCH_NEON_VFP_ARMV8, ARM_FEATURE_COPROC (FPU_NEON_ARMV8), ARM_FEATURE_CORE_LOW (ARM_EXT_V8)), @@ -25490,8 +25521,8 @@ static const struct arm_option_extension_value_table arm_extensions[] = ARM_FEATURE_CORE_LOW (ARM_EXT_VIRT), ARM_FEATURE_CORE_LOW (ARM_EXT_V7A)), ARM_EXT_OPT ("xscale",ARM_FEATURE_COPROC (ARM_CEXT_XSCALE), - ARM_FEATURE_COPROC (ARM_CEXT_XSCALE), ARM_ANY), - { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE, ARM_ARCH_NONE } + ARM_FEATURE_COPROC (ARM_CEXT_XSCALE), ARM_ARCH_NONE), + { NULL, 0, ARM_ARCH_NONE, ARM_ARCH_NONE, { ARM_ARCH_NONE, ARM_ARCH_NONE } } }; #undef ARM_EXT_OPT @@ -25588,8 +25619,7 @@ struct arm_long_option_table static bfd_boolean arm_parse_extension (const char *str, const arm_feature_set **opt_p) { - arm_feature_set *ext_set = (arm_feature_set *) - xmalloc (sizeof (arm_feature_set)); + arm_feature_set *ext_set = XNEW (arm_feature_set); /* We insist on extensions being specified in alphabetical order, and with extensions being added before being removed. We achieve this by having @@ -25598,6 +25628,7 @@ arm_parse_extension (const char *str, const arm_feature_set **opt_p) or removing it (0) and only allowing it to change in the order -1 -> 1 -> 0. */ const struct arm_option_extension_value_table * opt = NULL; + const arm_feature_set arm_any = ARM_ANY; int adding_value = -1; /* Copy the feature set, so that we can modify it. */ @@ -25662,8 +25693,18 @@ arm_parse_extension (const char *str, const arm_feature_set **opt_p) for (; opt->name != NULL; opt++) if (opt->name_len == len && strncmp (opt->name, str, len) == 0) { + int i, nb_allowed_archs = + sizeof (opt->allowed_archs) / sizeof (opt->allowed_archs[0]); /* Check we can apply the extension to this architecture. */ - if (!ARM_CPU_HAS_FEATURE (*ext_set, opt->allowed_archs)) + for (i = 0; i < nb_allowed_archs; i++) + { + /* Empty entry. */ + if (ARM_FEATURE_EQUAL (opt->allowed_archs[i], arm_any)) + continue; + if (ARM_FSET_CPU_SUBSET (opt->allowed_archs[i], *ext_set)) + break; + } + if (i == nb_allowed_archs) { as_bad (_("extension does not apply to the base architecture")); return FALSE; @@ -26077,6 +26118,7 @@ aeabi_set_public_attributes (void) char profile; int virt_sec = 0; int fp16_optional = 0; + arm_feature_set arm_arch = ARM_ARCH_NONE; arm_feature_set flags; arm_feature_set tmp; arm_feature_set arm_arch_v8m_base = ARM_ARCH_V8M_BASE; @@ -26116,6 +26158,7 @@ aeabi_set_public_attributes (void) if (ARM_CPU_HAS_FEATURE (tmp, p->flags)) { arch = p->val; + arm_arch = p->flags; ARM_CLEAR_FEATURE (tmp, tmp, p->flags); } } @@ -26132,18 +26175,27 @@ aeabi_set_public_attributes (void) && !ARM_CPU_HAS_FEATURE (flags, arm_ext_v7a) && ARM_CPU_HAS_FEATURE (flags, arm_ext_v7m) && ARM_CPU_HAS_FEATURE (flags, arm_ext_v6_dsp)) - arch = TAG_CPU_ARCH_V7E_M; + { + arch = TAG_CPU_ARCH_V7E_M; + arm_arch = (arm_feature_set) ARM_ARCH_V7EM; + } ARM_CLEAR_FEATURE (tmp, flags, arm_arch_v8m_base); if (arch == TAG_CPU_ARCH_V8M_BASE && ARM_CPU_HAS_FEATURE (tmp, arm_arch_any)) - arch = TAG_CPU_ARCH_V8M_MAIN; + { + arch = TAG_CPU_ARCH_V8M_MAIN; + arm_arch = (arm_feature_set) ARM_ARCH_V8M_MAIN; + } /* In cpu_arch_ver ARMv8-A is before ARMv8-M for atomics to be detected as coming from ARMv8-A. However, since ARMv8-A has more instructions than ARMv8-M, -march=all must be detected as ARMv8-A. */ if (arch == TAG_CPU_ARCH_V8M_MAIN && ARM_FEATURE_CORE_EQUAL (selected_cpu, arm_arch_any)) - arch = TAG_CPU_ARCH_V8; + { + arch = TAG_CPU_ARCH_V8; + arm_arch = (arm_feature_set) ARM_ARCH_V8A; + } /* Tag_CPU_name. */ if (selected_cpu_name[0]) @@ -26169,7 +26221,7 @@ aeabi_set_public_attributes (void) if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v7a) || ARM_CPU_HAS_FEATURE (flags, arm_ext_v8) || (ARM_CPU_HAS_FEATURE (flags, arm_ext_atomics) - && !ARM_CPU_HAS_FEATURE (flags, arm_ext_v8m))) + && !ARM_CPU_HAS_FEATURE (flags, arm_ext_v8m_m_only))) profile = 'A'; else if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v7r)) profile = 'R'; @@ -26181,6 +26233,17 @@ aeabi_set_public_attributes (void) if (profile != '\0') aeabi_set_attribute_int (Tag_CPU_arch_profile, profile); + /* Tag_DSP_extension. */ + if (ARM_CPU_HAS_FEATURE (flags, arm_ext_dsp)) + { + arm_feature_set ext; + + /* DSP instructions not in architecture. */ + ARM_CLEAR_FEATURE (ext, flags, arm_arch); + if (ARM_CPU_HAS_FEATURE (ext, arm_ext_dsp)) + aeabi_set_attribute_int (Tag_DSP_extension, 1); + } + /* Tag_ARM_ISA_use. */ if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v1) || arch == 0) @@ -26193,7 +26256,7 @@ aeabi_set_public_attributes (void) int thumb_isa_use; if (!ARM_CPU_HAS_FEATURE (flags, arm_ext_v8) - && ARM_CPU_HAS_FEATURE (flags, arm_ext_v8m)) + && ARM_CPU_HAS_FEATURE (flags, arm_ext_v8m_m_only)) thumb_isa_use = 3; else if (ARM_CPU_HAS_FEATURE (flags, arm_arch_t2)) thumb_isa_use = 2; @@ -26419,6 +26482,7 @@ static void s_arm_arch_extension (int ignored ATTRIBUTE_UNUSED) { const struct arm_option_extension_value_table *opt; + const arm_feature_set arm_any = ARM_ANY; char saved_char; char *name; int adding_value = 1; @@ -26439,7 +26503,18 @@ s_arm_arch_extension (int ignored ATTRIBUTE_UNUSED) for (opt = arm_extensions; opt->name != NULL; opt++) if (streq (opt->name, name)) { - if (!ARM_CPU_HAS_FEATURE (*mcpu_cpu_opt, opt->allowed_archs)) + int i, nb_allowed_archs = + sizeof (opt->allowed_archs) / sizeof (opt->allowed_archs[i]); + for (i = 0; i < nb_allowed_archs; i++) + { + /* Empty entry. */ + if (ARM_FEATURE_EQUAL (opt->allowed_archs[i], arm_any)) + continue; + if (ARM_FSET_CPU_SUBSET (opt->allowed_archs[i], *mcpu_cpu_opt)) + break; + } + + if (i == nb_allowed_archs) { as_bad (_("architectural extension `%s' is not allowed for the " "current base architecture"), name); @@ -26564,6 +26639,7 @@ arm_convert_symbolic_attribute (const char *name) T (Tag_conformance), T (Tag_T2EE_use), T (Tag_Virtualization_use), + T (Tag_DSP_extension), /* We deliberately do not include Tag_MPextension_use_legacy. */ #undef T };