X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2Fconfig%2Ftc-crx.c;h=f0b32466dc72dafa60ed44ee995d7ae658a04478;hb=bd920864f3dc2cad376989a642ab774aef6b2fce;hp=4b829c2560f7906065fe921d31c60da9efb7ca1d;hpb=add39d2344036db9334bdeb1ec20a90beaa3ca49;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/config/tc-crx.c b/gas/config/tc-crx.c index 4b829c2560..f0b32466dc 100644 --- a/gas/config/tc-crx.c +++ b/gas/config/tc-crx.c @@ -1,5 +1,5 @@ /* tc-crx.c -- Assembler code for the CRX CPU core. - Copyright (C) 2004-2016 Free Software Foundation, Inc. + Copyright (C) 2004-2020 Free Software Foundation, Inc. Contributed by Tomer Levi, NSC, Israel. Originally written for GAS 2.12 by Tomer Levi, NSC, Israel. @@ -69,21 +69,21 @@ static struct hash_control *reg_hash; /* CRX coprocessor registers hash table. */ static struct hash_control *copreg_hash; /* Current instruction we're assembling. */ -const inst *instruction; +static const inst *instruction; /* Global variables. */ /* Array to hold an instruction encoding. */ -long output_opcode[2]; +static long output_opcode[2]; /* Nonzero means a relocatable symbol. */ -int relocatable; +static int relocatable; /* A copy of the original instruction (used in error messages). */ -char ins_parse[MAX_INST_LEN]; +static char ins_parse[MAX_INST_LEN]; /* The current processed argument number. */ -int cur_arg_num; +static int cur_arg_num; /* Generic assembler global variables which must be defined by all targets. */ @@ -153,7 +153,7 @@ static void handle_LoadStor (const char *); static int get_cinv_parameters (const char *); static long getconstant (long, int); static op_err check_range (long *, int, unsigned int, int); -static int getreg_image (reg); +static int getreg_image (int); static void parse_operands (ins *, char *); static void parse_insn (ins *, char *); static void print_operand (int, int, argument *); @@ -402,7 +402,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, fragS *fragP) { /* 'opcode' points to the start of the instruction, whether we need to change the instruction's fixed encoding. */ - char *opcode = fragP->fr_literal + fragP->fr_fix; + char *opcode = &fragP->fr_literal[0] + fragP->fr_fix; bfd_reloc_code_real_type reloc; subseg_change (sec, 0); @@ -569,7 +569,7 @@ md_begin (void) { hashret = hash_insert (reg_hash, regtab->name, (void *) regtab); if (hashret) - as_fatal (_("Internal Error: Can't hash %s: %s"), + as_fatal (_("Internal error: Can't hash %s: %s"), regtab->name, hashret); } @@ -588,7 +588,7 @@ md_begin (void) hashret = hash_insert (copreg_hash, copregtab->name, (void *) copregtab); if (hashret) - as_fatal (_("Internal Error: Can't hash %s: %s"), + as_fatal (_("Internal error: Can't hash %s: %s"), copregtab->name, hashret); } @@ -715,8 +715,8 @@ exponent2scale (int val) static void set_operand (char *operand, ins * crx_ins) { - char *operandS; /* Pointer to start of sub-opearand. */ - char *operandE; /* Pointer to end of sub-opearand. */ + char *operandS; /* Pointer to start of sub-operand. */ + char *operandE; /* Pointer to end of sub-operand. */ expressionS scale; int scale_val; char *input_save, c; @@ -730,6 +730,7 @@ set_operand (char *operand, ins * crx_ins) case arg_sc: /* Case *+0x18. */ case arg_ic: /* Case $0x18. */ operandS++; + /* Fall through. */ case arg_c: /* Case 0x18. */ /* Set constant. */ process_label_constant (operandS, crx_ins); @@ -747,6 +748,7 @@ set_operand (char *operand, ins * crx_ins) *operandE = '\0'; process_label_constant (operandS, crx_ins); operandS = operandE; + /* Fall through. */ case arg_rbase: /* Case (r1). */ operandS++; /* Set register base. */ @@ -754,7 +756,7 @@ set_operand (char *operand, ins * crx_ins) operandE++; *operandE = '\0'; if ((cur_arg->r = get_register (operandS)) == nullregister) - as_bad (_("Illegal register `%s' in Instruction `%s'"), + as_bad (_("Illegal register `%s' in instruction `%s'"), operandS, ins_parse); if (cur_arg->type != arg_rbase) @@ -774,7 +776,7 @@ set_operand (char *operand, ins * crx_ins) operandE++; *operandE++ = '\0'; if ((cur_arg->r = get_register (operandS)) == nullregister) - as_bad (_("Illegal register `%s' in Instruction `%s'"), + as_bad (_("Illegal register `%s' in instruction `%s'"), operandS, ins_parse); /* Skip leading white space. */ @@ -789,7 +791,7 @@ set_operand (char *operand, ins * crx_ins) *operandE++ = '\0'; if ((cur_arg->i_r = get_register (operandS)) == nullregister) - as_bad (_("Illegal register `%s' in Instruction `%s'"), + as_bad (_("Illegal register `%s' in instruction `%s'"), operandS, ins_parse); /* Skip leading white space. */ @@ -898,8 +900,8 @@ parse_operand (char *operand, ins * crx_ins) cur_arg->type = arg_c; goto set_params; -/* Parse an operand according to its type. */ -set_params: + /* Parse an operand according to its type. */ + set_params: cur_arg->constant = 0; set_operand (operand, crx_ins); } @@ -1041,9 +1043,9 @@ parse_insn (ins *insn, char *operands) int i; /* Handle instructions with no operands. */ - for (i = 0; no_op_insn[i] != NULL; i++) + for (i = 0; crx_no_op_insn[i] != NULL; i++) { - if (streq (no_op_insn[i], instruction->mnemonic)) + if (streq (crx_no_op_insn[i], instruction->mnemonic)) { insn->nargs = 0; return; @@ -1105,7 +1107,7 @@ get_cinv_parameters (const char *operand) issue an error. */ static int -getreg_image (reg r) +getreg_image (int r) { const reg_entry *rreg; char *reg_name; @@ -1132,9 +1134,8 @@ getreg_image (reg r) /* Issue a error message when register is illegal. */ #define IMAGE_ERR \ - as_bad (_("Illegal register (`%s') in Instruction: `%s'"), \ - reg_name, ins_parse); \ - break; + as_bad (_("Illegal register (`%s') in instruction: `%s'"), \ + reg_name, ins_parse); switch (rreg->type) { @@ -1143,18 +1144,21 @@ getreg_image (reg r) return rreg->image; else IMAGE_ERR; + break; case CRX_CFG_REGTYPE: if (is_procreg) return rreg->image; else IMAGE_ERR; + break; case CRX_R_REGTYPE: if (! is_procreg) return rreg->image; else IMAGE_ERR; + break; case CRX_C_REGTYPE: case CRX_CS_REGTYPE: @@ -1163,6 +1167,7 @@ getreg_image (reg r) default: IMAGE_ERR; + break; } return 0; @@ -1259,14 +1264,14 @@ print_operand (int nbits, int shift, argument *arg) case arg_copr: if (arg->cr < c0 || arg->cr > c15) - as_bad (_("Illegal Co-processor register in Instruction `%s' "), + as_bad (_("Illegal co-processor register in instruction `%s'"), ins_parse); CRX_PRINT (0, getreg_image (arg->cr), shift); break; case arg_copsr: if (arg->cr < cs0 || arg->cr > cs15) - as_bad (_("Illegal Co-processor special register in Instruction `%s' "), + as_bad (_("Illegal co-processor special register in instruction `%s'"), ins_parse); CRX_PRINT (0, getreg_image (arg->cr), shift); break; @@ -1279,6 +1284,7 @@ print_operand (int nbits, int shift, argument *arg) CRX_PRINT (0, getreg_image (arg->r), 12); CRX_PRINT (0, getreg_image (arg->i_r), 8); CRX_PRINT (0, arg->scale, 6); + /* Fall through. */ case arg_ic: case arg_c: print_constant (nbits, shift, arg); @@ -1325,7 +1331,7 @@ static op_err check_range (long *num, int bits, int unsigned flags, int update) { uint32_t max; - int retval = OP_LEGAL; + op_err retval = OP_LEGAL; int bin; uint32_t upper_64kb = 0xffff0000; uint32_t value = *num; @@ -1384,7 +1390,7 @@ check_range (long *num, int bits, int unsigned flags, int update) : instruction->flags & DISPUD4 ? 4 : 0); - for (bin = 0; bin < cst4_maps; bin++) + for (bin = 0; bin < crx_cst4_maps; bin++) { if (value == mul * bin) { @@ -1401,9 +1407,9 @@ check_range (long *num, int bits, int unsigned flags, int update) { int is_cst4 = 0; - for (bin = 0; bin < cst4_maps; bin++) + for (bin = 0; bin < crx_cst4_maps; bin++) { - if (value == (uint32_t) cst4_map[bin]) + if (value == (uint32_t) crx_cst4_map[bin]) { is_cst4 = 1; if (update) @@ -1564,8 +1570,8 @@ assemble_insn (char *mnemonic, ins *insn) match = 1; break; -/* Try again with next instruction. */ -next_insn: + /* Try again with next instruction. */ + next_insn: instruction++; } @@ -1607,7 +1613,7 @@ next_insn: else /* Full match - print the encoding to output file. */ { - /* Make further checkings (such that couldn't be made earlier). + /* Make further checking (such that couldn't be made earlier). Warn the user if necessary. */ warn_if_needed (insn); @@ -1645,7 +1651,7 @@ next_insn: return 1; } -/* Bunch of error checkings. +/* Bunch of error checking. The checks are made after a matching instruction was found. */ void @@ -1730,7 +1736,7 @@ mask_reg (int r, unsigned short int *mask) { if ((reg)r > (reg)sp) { - as_bad (_("Invalid Register in Register List")); + as_bad (_("Invalid register in register list")); return; } @@ -1749,7 +1755,7 @@ preprocess_reglist (char *param, int *allocated) int reg_counter = 0; /* Count number of parsed registers. */ unsigned short int mask = 0; /* Mask for 16 general purpose registers. */ char *new_param; /* New created operands string. */ - char *paramP = param; /* Pointer to original opearands string. */ + char *paramP = param; /* Pointer to original operands string. */ char maskstring[10]; /* Array to print the mask as a string. */ int hi_found = 0, lo_found = 0; /* Boolean flags for hi/lo registers. */ reg r; @@ -1839,7 +1845,7 @@ preprocess_reglist (char *param, int *allocated) as_bad (_("Maximum %d bits may be set in `mask16' operand"), MAX_REGS_IN_MASK16); -next_inst: + next_inst: while (!ISALNUM (*paramP) && *paramP != '}') paramP++; } @@ -1894,7 +1900,7 @@ print_insn (ins *insn) words[j++] = output_opcode[i] & 0xFFFF; } - /* Handle relaxtion. */ + /* Handle relaxation. */ if ((instruction->flags & RELAXABLE) && relocatable) { int relax_subtype;