X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2Fconfig%2Ftc-i386.h;h=5f881369f188d519dea0699c0c61237ae9ce7a58;hb=87a918e2022c6fce422fc0906c1fe7377d502d37;hp=2fc21d953dcaeefc97a040f03fe120ceb9c677c1;hpb=55cf6793d851ffd0f14d851eb6d75cac2fe400ff;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index 2fc21d953d..5f881369f1 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -1,6 +1,6 @@ /* tc-i386.h -- Header file for tc-i386.c Copyright 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004 + 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -23,13 +23,7 @@ #ifndef TC_I386 #define TC_I386 1 -#ifndef BFD_ASSEMBLER -#error So, do you know what you are doing? -#endif - -#ifdef ANSI_PROTOTYPES struct fix; -#endif #define TARGET_BYTES_BIG_ENDIAN 0 @@ -61,6 +55,7 @@ extern unsigned long i386_mach (void); #ifdef TE_FreeBSD #define ELF_TARGET_FORMAT "elf32-i386-freebsd" +#define ELF_TARGET_FORMAT64 "elf64-x86-64-freebsd" #elif defined (TE_VXWORKS) #define ELF_TARGET_FORMAT "elf32-i386-vxworks" #endif @@ -69,6 +64,10 @@ extern unsigned long i386_mach (void); #define ELF_TARGET_FORMAT "elf32-i386" #endif +#ifndef ELF_TARGET_FORMAT64 +#define ELF_TARGET_FORMAT64 "elf64-x86-64" +#endif + #if ((defined (OBJ_MAYBE_COFF) && defined (OBJ_MAYBE_AOUT)) \ || defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) extern const char *i386_target_format PARAMS ((void)); @@ -94,18 +93,23 @@ extern void i386_elf_emit_arch_note PARAMS ((void)); extern const char extra_symbol_chars[]; #define tc_symbol_chars extra_symbol_chars -#define MAX_OPERANDS 3 /* max operands per insn */ -#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn (lcall, ljmp) */ +extern const char *i386_comment_chars; +#define tc_comment_chars i386_comment_chars + +#define MAX_OPERANDS 4 /* max operands per insn */ +#define MAX_IMMEDIATE_OPERANDS 2/* max immediates per insn (lcall, ljmp, insertq, extrq) */ #define MAX_MEMORY_OPERANDS 2 /* max memory refs per insn (string ops) */ /* Prefixes will be emitted in the order defined below. WAIT_PREFIX must be the first prefix since FWAIT is really is an - instruction, and so must come before any prefixes. */ + instruction, and so must come before any prefixes. + The preferred prefix order is SEG_PREFIX, ADDR_PREFIX, DATA_PREFIX, + LOCKREP_PREFIX. */ #define WAIT_PREFIX 0 -#define LOCKREP_PREFIX 1 +#define SEG_PREFIX 1 #define ADDR_PREFIX 2 #define DATA_PREFIX 3 -#define SEG_PREFIX 4 +#define LOCKREP_PREFIX 4 #define REX_PREFIX 5 /* must come last. */ #define MAX_PREFIXES 6 /* max prefixes per opcode */ @@ -165,32 +169,37 @@ typedef struct /* cpu feature flags */ unsigned int cpu_flags; -#define Cpu086 0x1 /* Any old cpu will do, 0 does the same */ -#define Cpu186 0x2 /* i186 or better required */ -#define Cpu286 0x4 /* i286 or better required */ -#define Cpu386 0x8 /* i386 or better required */ -#define Cpu486 0x10 /* i486 or better required */ -#define Cpu586 0x20 /* i585 or better required */ -#define Cpu686 0x40 /* i686 or better required */ -#define CpuP4 0x80 /* Pentium4 or better required */ -#define CpuK6 0x100 /* AMD K6 or better required*/ -#define CpuAthlon 0x200 /* AMD Athlon or better required*/ -#define CpuSledgehammer 0x400 /* Sledgehammer or better required */ -#define CpuMMX 0x800 /* MMX support required */ -#define CpuMMX2 0x1000 /* extended MMX support (with SSE or 3DNow!Ext) required */ -#define CpuSSE 0x2000 /* Streaming SIMD extensions required */ -#define CpuSSE2 0x4000 /* Streaming SIMD extensions 2 required */ -#define Cpu3dnow 0x8000 /* 3dnow! support required */ -#define Cpu3dnowA 0x10000 /* 3dnow!Extensions support required */ -#define CpuPNI 0x20000 /* Prescott New Instructions required */ -#define CpuPadLock 0x40000 /* VIA PadLock required */ +#define Cpu186 0x1 /* i186 or better required */ +#define Cpu286 0x2 /* i286 or better required */ +#define Cpu386 0x4 /* i386 or better required */ +#define Cpu486 0x8 /* i486 or better required */ +#define Cpu586 0x10 /* i585 or better required */ +#define Cpu686 0x20 /* i686 or better required */ +#define CpuP4 0x40 /* Pentium4 or better required */ +#define CpuK6 0x80 /* AMD K6 or better required*/ +#define CpuSledgehammer 0x100 /* Sledgehammer or better required */ +#define CpuMMX 0x200 /* MMX support required */ +#define CpuMMX2 0x400 /* extended MMX support (with SSE or 3DNow!Ext) required */ +#define CpuSSE 0x800 /* Streaming SIMD extensions required */ +#define CpuSSE2 0x1000 /* Streaming SIMD extensions 2 required */ +#define Cpu3dnow 0x2000 /* 3dnow! support required */ +#define Cpu3dnowA 0x4000 /* 3dnow!Extensions support required */ +#define CpuSSE3 0x8000 /* Streaming SIMD extensions 3 required */ +#define CpuPadLock 0x10000 /* VIA PadLock required */ +#define CpuSVME 0x20000 /* AMD Secure Virtual Machine Ext-s required */ +#define CpuVMX 0x40000 /* VMX Instructions required */ +#define CpuSSSE3 0x80000 /* Supplemental Streaming SIMD extensions 3 required */ +#define CpuSSE4a 0x100000 /* SSE4a New Instuctions required */ +#define CpuABM 0x200000 /* ABM New Instructions required */ /* These flags are set by gas depending on the flag_code. */ #define Cpu64 0x4000000 /* 64bit support required */ #define CpuNo64 0x8000000 /* Not supported in the 64bit mode */ /* The default value for unknown CPUs - enable all features to avoid problems. */ -#define CpuUnknownFlags (Cpu086|Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuPNI|Cpu3dnow|Cpu3dnowA|CpuK6|CpuAthlon|CpuPadLock) +#define CpuUnknownFlags (Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686 \ + |CpuP4|CpuSledgehammer|CpuMMX|CpuMMX2|CpuSSE|CpuSSE2|CpuSSE3|CpuVMX \ + |Cpu3dnow|Cpu3dnowA|CpuK6|CpuPadLock|CpuSVME|CpuSSSE3|CpuABM|CpuSSE4a) /* the bits in opcode_modifier are used to generate the final opcode from the base_opcode. These bits also are used to detect alternate forms of @@ -215,7 +224,7 @@ typedef struct #define Seg3ShortForm 0x1000 /* fs/gs segment register insns. */ #define Size16 0x2000 /* needs size prefix if in 32-bit mode */ #define Size32 0x4000 /* needs size prefix if in 16-bit mode */ -#define Size64 0x8000 /* needs size prefix if in 16-bit mode */ +#define Size64 0x8000 /* needs size prefix if in 64-bit mode */ #define IgnoreSize 0x10000 /* instruction ignores operand size prefix */ #define DefaultSize 0x20000 /* default insn size depends on mode */ #define No_bSuf 0x40000 /* b suffix on instruction illegal */ @@ -237,7 +246,7 @@ typedef struct by OR'ing together all of the possible type masks. (e.g. 'operand_types[i] = Reg|Imm' specifies that operand i can be either a register or an immediate operand. */ - unsigned int operand_types[3]; + unsigned int operand_types[MAX_OPERANDS]; /* operand_types[i] bits */ /* register */ @@ -268,7 +277,7 @@ typedef struct #define Disp64 0x10000 /* 64 bit displacement */ /* specials */ #define InOutPortReg 0x20000 /* register to hold in/out port addr = dx */ -#define ShiftCount 0x40000 /* register to hold shift cound = cl */ +#define ShiftCount 0x40000 /* register to hold shift count = cl */ #define Control 0x80000 /* Control register */ #define Debug 0x100000 /* Debug register */ #define Test 0x200000 /* Test register */ @@ -305,7 +314,7 @@ typedef struct #define LLongMem AnyMem /* 64 bits (or more) */ #define LongMem AnyMem /* 32 bit memory ref */ #define ShortMem AnyMem /* 16 bit memory ref */ -#define WordMem AnyMem /* 16 or 32 bit memory ref */ +#define WordMem AnyMem /* 16, 32 or 64 bit memory ref */ #define ByteMem AnyMem /* 8 bit memory ref */ } template; @@ -374,11 +383,30 @@ typedef struct } sib_byte; -/* x86 arch names and features */ +enum processor_type +{ + PROCESSOR_UNKNOWN, + PROCESSOR_I486, + PROCESSOR_PENTIUM, + PROCESSOR_PENTIUMPRO, + PROCESSOR_PENTIUM4, + PROCESSOR_NOCONA, + PROCESSOR_CORE, + PROCESSOR_CORE2, + PROCESSOR_K6, + PROCESSOR_ATHLON, + PROCESSOR_K8, + PROCESSOR_GENERIC32, + PROCESSOR_GENERIC64, + PROCESSOR_AMDFAM10 +}; + +/* x86 arch names, types and features */ typedef struct { - const char *name; /* arch name */ - unsigned int flags; /* cpu feature flags */ + const char *name; /* arch name */ + enum processor_type type; /* arch type */ + unsigned int flags; /* cpu feature flags */ } arch_entry; @@ -388,20 +416,14 @@ arch_entry; #define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_" #endif -#ifndef LEX_AT +#if (defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && !defined (LEX_AT) #define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) x86_cons (EXP, NBYTES) extern void x86_cons PARAMS ((expressionS *, int)); +#endif #define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) x86_cons_fix_new(FRAG, OFF, LEN, EXP) extern void x86_cons_fix_new PARAMS ((fragS *, unsigned int, unsigned int, expressionS *)); -#endif - -#ifdef TE_PE -#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) x86_pe_cons_fix_new(FRAG, OFF, LEN, EXP) -extern void x86_pe_cons_fix_new - PARAMS ((fragS *, unsigned int, unsigned int, expressionS *)); -#endif #define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */ @@ -441,7 +463,8 @@ extern int tc_i386_fix_adjustable PARAMS ((struct fix *)); || (FIX)->fx_r_type == BFD_RELOC_386_GOTPC \ || TC_FORCE_RELOCATION (FIX)) -#define md_operand(x) +extern int i386_parse_name (char *, expressionS *, char *); +#define md_parse_name(s, e, m, c) i386_parse_name (s, e, c) extern const struct relax_type md_relax_table[]; #define TC_GENERIC_RELAX_TABLE md_relax_table @@ -490,7 +513,7 @@ extern int x86_cie_data_alignment; #define DWARF2_CIE_DATA_ALIGNMENT x86_cie_data_alignment #define tc_regname_to_dw2regnum tc_x86_regname_to_dw2regnum -extern int tc_x86_regname_to_dw2regnum PARAMS ((const char *regname)); +extern int tc_x86_regname_to_dw2regnum PARAMS ((char *regname)); #define tc_cfi_frame_initial_instructions tc_x86_frame_initial_instructions extern void tc_x86_frame_initial_instructions PARAMS ((void)); @@ -498,6 +521,12 @@ extern void tc_x86_frame_initial_instructions PARAMS ((void)); #define md_elf_section_type(str,len) i386_elf_section_type (str, len) extern int i386_elf_section_type PARAMS ((const char *, size_t len)); +/* Support for SHF_X86_64_LARGE */ +extern int x86_64_section_word PARAMS ((char *, size_t)); +extern int x86_64_section_letter PARAMS ((int letter, char **ptr_msg)); +#define md_elf_section_letter(LETTER, PTR_MSG) x86_64_section_letter (LETTER, PTR_MSG) +#define md_elf_section_word(STR, LEN) x86_64_section_word (STR, LEN) + #ifdef TE_PE #define O_secrel O_md1