X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2Fconfig%2Ftc-mep.c;h=4a03c5bf21ce7a29d4c7a37f7e35307ad41fa7ee;hb=f42f1a1d6ca0cc84e43d7f2b85044a2565ca00f2;hp=6128b6e66901db6111c1eb84dceeaf633d7c9a13;hpb=e6c7cdec063514bb9ffe2a62fb280e5ec676cac0;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/config/tc-mep.c b/gas/config/tc-mep.c index 6128b6e669..4a03c5bf21 100644 --- a/gas/config/tc-mep.c +++ b/gas/config/tc-mep.c @@ -1,5 +1,5 @@ /* tc-mep.c -- Assembler for the Toshiba Media Processor. - Copyright (C) 2001-2016 Free Software Foundation, Inc. + Copyright (C) 2001-2017 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -28,7 +28,6 @@ #include "cgen.h" #include "elf/common.h" #include "elf/mep.h" -#include "libbfd.h" #include "xregex.h" /* Structure to hold all of the different components describing @@ -443,7 +442,7 @@ mep_machine (void) /* The MeP version of the cgen parse_operand function. The only difference from the standard version is that we want to avoid treating '$foo' and '($foo...)' as references to a symbol called '$foo'. The chances are - that '$foo' is really a misspelt register. */ + that '$foo' is really a misspelled register. */ static const char * mep_parse_operand (CGEN_CPU_DESC cd, enum cgen_parse_operand_type want, @@ -583,7 +582,7 @@ mep_check_parallel32_scheduling (void) an internally parallel core or an internally parallel coprocessor, neither of which are supported at this time. */ if ( num_insns_saved > 2 ) - as_fatal("Internally paralled cores and coprocessors not supported."); + as_fatal("Internally paralleled cores and coprocessors not supported."); /* If there are no insns saved, that's ok. Just return. This will happen when mep_process_saved_insns is called when the end of the @@ -622,7 +621,7 @@ mep_check_parallel32_scheduling (void) 1. The instruction is a 32 bit core or coprocessor insn and can be executed by itself. Valid. - 2. The instrucion is a core instruction for which a cop nop + 2. The instruction is a core instruction for which a cop nop exists. In this case, insert the cop nop into the saved insn array after the core insn and return. Valid. @@ -658,7 +657,7 @@ mep_check_parallel32_scheduling (void) mep_insn insn; /* Move the insn and it's fixups to the second element of the - saved insns arrary and insert a 16 bit core nope into the + saved insns array and insert a 16 bit core nope into the first element. */ insn.insn = mep_cgen_assemble_insn (gas_cgen_cpu_desc, "nop", &insn.fields, insn.buffer, @@ -759,7 +758,7 @@ mep_check_parallel64_scheduling (void) 1. The instruction is a 64 bit coprocessor insn and can be executed by itself. Valid. - 2. The instrucion is a core instruction for which a cop nop + 2. The instruction is a core instruction for which a cop nop exists. In this case, insert the cop nop into the saved insn array after the core insn and return. Valid. @@ -774,7 +773,7 @@ mep_check_parallel64_scheduling (void) we have to abort. */ /* If the insn is 64 bits long, it can run alone. The size check - is done indepependantly of whether the insn is core or copro + is done independently of whether the insn is core or copro in case 64 bit coprocessor insns are added later. */ if (insn0length == 64) return; @@ -1146,8 +1145,8 @@ mep_check_ivc2_scheduling (void) #endif /* MEP_IVC2_SUPPORTED */ /* The scheduling functions are just filters for invalid combinations. - If there is a violation, they terminate assembly. Otherise they - just fall through. Succesful combinations cause no side effects + If there is a violation, they terminate assembly. Otherwise they + just fall through. Successful combinations cause no side effects other than valid nop insertion. */ static void @@ -1220,7 +1219,7 @@ md_assemble (char * str) + copro insn We want to handle the general case where more than - one instruction can be preceeded by a +. This will + one instruction can be preceded by a +. This will happen later if we add support for internally parallel coprocessors. We'll make the parsing nice and general so that it can handle an arbitrary number of insns @@ -1300,7 +1299,7 @@ md_assemble (char * str) /* Check for a + with a core insn and abort if found. */ if (!thisInsnIsCopro) { - as_fatal("A core insn cannot be preceeded by a +.\n"); + as_fatal("A core insn cannot be preceded by a +.\n"); return; } @@ -1709,7 +1708,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, operand = MEP_OPERAND_PCREL17A2; break; } - /* ...FALLTHROUGH... */ + /* Fall through. */ case MEP_INSN_JMP: addend = target_address_for (fragP); @@ -1724,6 +1723,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, case MEP_INSN_BNEZ: bit = 1; + /* Fall through. */ case MEP_INSN_BEQZ: fragP->fr_opcode[1^e] = bit | (addend & 0xfe); operand = MEP_OPERAND_PCREL8A2; @@ -1731,6 +1731,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, case MEP_INSN_BNEI: bit = 4; + /* Fall through. */ case MEP_INSN_BEQI: if (subtype_mappings[fragP->fr_subtype].growth) { @@ -1799,7 +1800,7 @@ mep_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) break; } - /* Now call cgen's md_aply_fix. */ + /* Now call cgen's md_apply_fix. */ gas_cgen_md_apply_fix (fixP, valP, seg); } @@ -2184,7 +2185,7 @@ mep_cleanup (void) { /* Take care of any insns left to be parallelized when the file ends. This is mainly here to handle the case where the file ends with an - insn preceeded by a + or the file ends unexpectedly. */ + insn preceded by a + or the file ends unexpectedly. */ if (mode == VLIW) mep_process_saved_insns (); }