X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2Fdoc%2Fc-aarch64.texi;h=8a116a40acb7e3041d7601ca219050181013a257;hb=68dfbb92ef5f013a315d652c88ede2082c16a88e;hp=7d872b0049f9e466f4d2aa7e4a82276cfb9755a5;hpb=68ffd9368a020fb685520da51f8c672c720869e4;p=deliverable%2Fbinutils-gdb.git

diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 7d872b0049..8a116a40ac 100644
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -1,4 +1,4 @@
-@c Copyright (C) 2009-2017 Free Software Foundation, Inc.
+@c Copyright (C) 2009-2018 Free Software Foundation, Inc.
 @c Contributed by ARM Ltd.
 @c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo.
@@ -34,23 +34,23 @@
 @c man begin OPTIONS
 @table @gcctabopt
 
-@cindex @option{-EB} command line option, AArch64
+@cindex @option{-EB} command-line option, AArch64
 @item -EB
 This option specifies that the output generated by the assembler should
 be marked as being encoded for a big-endian processor.
 
-@cindex @option{-EL} command line option, AArch64
+@cindex @option{-EL} command-line option, AArch64
 @item -EL
 This option specifies that the output generated by the assembler should
 be marked as being encoded for a little-endian processor.
 
-@cindex @option{-mabi=} command line option, AArch64
+@cindex @option{-mabi=} command-line option, AArch64
 @item -mabi=@var{abi}
 Specify which ABI the source code uses.  The recognized arguments
 are: @code{ilp32} and @code{lp64}, which decides the generated object
 file in ELF32 and ELF64 format respectively.  The default is @code{lp64}.
 
-@cindex @option{-mcpu=} command line option, AArch64
+@cindex @option{-mcpu=} command-line option, AArch64
 @item -mcpu=@var{processor}[+@var{extension}@dots{}]
 This option specifies the target processor.  The assembler will issue an error
 message if an attempt is made to assemble an instruction which will not execute
@@ -62,6 +62,7 @@ on the target processor.  The following processor names are recognized:
 @code{cortex-a72},
 @code{cortex-a73},
 @code{cortex-a75},
+@code{cortex-a76},
 @code{exynos-m1},
 @code{falkor},
 @code{qdf24xx},
@@ -84,13 +85,14 @@ extension, then then those extensions are automatically enabled.
 Consequently, you will not normally have to specify any additional
 extensions.
 
-@cindex @option{-march=} command line option, AArch64
+@cindex @option{-march=} command-line option, AArch64
 @item -march=@var{architecture}[+@var{extension}@dots{}]
 This option specifies the target architecture.  The assembler will
 issue an error message if an attempt is made to assemble an
 instruction which will not execute on the target architecture.  The
 following architecture names are recognized: @code{armv8-a},
-@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a} and @code{armv8.4-a}.
+@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
+and @code{armv8.5-a}.
 
 If both @option{-mcpu} and @option{-march} are specified, the
 assembler will use the setting for @option{-mcpu}.  If neither are
@@ -101,12 +103,12 @@ extension options as the @option{-mcpu} option.  Unlike
 @option{-mcpu}, extensions are not always enabled by default,
 @xref{AArch64 Extensions}.
 
-@cindex @code{-mverbose-error} command line option, AArch64
+@cindex @code{-mverbose-error} command-line option, AArch64
 @item -mverbose-error
 This option enables verbose error messages for AArch64 gas.  This option
 is enabled by default.
 
-@cindex @code{-mno-verbose-error} command line option, AArch64
+@cindex @code{-mno-verbose-error} command-line option, AArch64
 @item -mno-verbose-error
 This option disables verbose error messages in AArch64 gas.
 
@@ -176,6 +178,11 @@ automatically cause those extensions to be disabled.
  @code{simd} and @code{compnum}.
 @item @code{dotprod} @tab ARMv8.2-A @tab ARMv8.4-A or later
  @tab Enable the Dot Product extension.  This implies @code{simd}.
+@item @code{fp16fml} @tab ARMv8.2-A @tab ARMv8.4-A or later
+ @tab Enable ARMv8.2 16-bit floating-point multiplication variant support.
+ This implies @code{fp16}.
+@item @code{sb} @tab ARMv8-A @tab ARMv8.5-A or later
+ @tab Enable the speculation barrier instruction sb.
 @end multitable
 
 @node AArch64 Syntax
@@ -281,7 +288,7 @@ The AArch64 architecture uses @sc{ieee} floating-point numbers.
 @cindex @code{.arch} directive, AArch64
 @item .arch @var{name}
 Select the target architecture.  Valid values for @var{name} are the same as
-for the @option{-march} commandline option.
+for the @option{-march} command-line option.
 
 Specifying @code{.arch} clears any previously selected architecture
 extensions.
@@ -290,7 +297,7 @@ extensions.
 @item .arch_extension @var{name}
 Add or remove an architecture extension to the target architecture.  Valid
 values for @var{name} are the same as those accepted as architectural
-extensions by the @option{-mcpu} commandline option.
+extensions by the @option{-mcpu} command-line option.
 
 @code{.arch_extension} may be used multiple times to add or remove extensions
 incrementally to the architecture being compiled for.
@@ -306,7 +313,7 @@ This directive switches to the @code{.bss} section.
 @cindex @code{.cpu} directive, AArch64
 @item .cpu @var{name}
 Set the target processor.  Valid values for @var{name} are the same as
-those accepted by the @option{-mcpu=} command line option.
+those accepted by the @option{-mcpu=} command-line option.
 
 @c DDDDDDDDDDDDDDDDDDDDDDDDDD