X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2Fdoc%2Fc-alpha.texi;h=dd484138ff81175db7bf569c4833f609be7626c3;hb=34bca50861dd6a0d59b8f8b215865e3a52895191;hp=f426b822828d7ab691710c0db72c7a9e14c510c0;hpb=04fe8f58aea4ab08cfaf21329373d251d6e317a7;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/doc/c-alpha.texi b/gas/doc/c-alpha.texi index f426b82282..dd484138ff 100644 --- a/gas/doc/c-alpha.texi +++ b/gas/doc/c-alpha.texi @@ -1,7 +1,8 @@ -@c Copyright 2002, 2003 +@c Copyright 2002, 2003, 2005, 2009, 2011 @c Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. +@c man end @ifset GENERIC @page @@ -38,7 +39,8 @@ features specific to these formats are not yet documented. @cindex Alpha options @cindex options for Alpha -@table @option +@c man begin OPTIONS +@table @gcctabopt @cindex @code{-m@var{cpu}} command line option, Alpha @item -m@var{cpu} This option specifies the target processor. If an attempt is made to @@ -46,7 +48,7 @@ assemble an instruction which will not execute on the target processor, the assembler may either expand the instruction as a macro or issue an error message. This option is equivalent to the @code{.arch} directive. -The following processor names are recognized: +The following processor names are recognized: @code{21064}, @code{21064a}, @code{21066}, @@ -90,6 +92,15 @@ this option does not propagate all symbol arithmetic into the object file, because not all symbol arithmetic can be represented. However, the option can still be useful in specific applications. +@cindex @code{-replace} command line option, Alpha +@cindex @code{-noreplace} command line option, Alpha +@item -replace +@itemx -noreplace +Enables or disables the optimization of procedure calls, both at assemblage +and at link time. These options are only available for VMS targets and +@code{-replace} is the default. See section 1.4.1 of the OpenVMS Linker +Utility Manual. + @cindex @code{-g} command line option, Alpha @item -g This option is used when the compiler generates debug information. When @@ -108,6 +119,7 @@ while smaller symbols are placed in @code{.sbss}. @itemx -32addr These options are ignored for backward compatibility. @end table +@c man end @cindex Alpha Syntax @node Alpha Syntax @@ -127,7 +139,10 @@ OpenVMS syntax, with a few differences for ELF. @cindex line comment character, Alpha @cindex Alpha line comment character -@samp{#} is the line comment character. +@samp{#} is the line comment character. Note that if @samp{#} is the +first character on a line then it can also be a logical line number +directive (@pxref{Comments}) or a preprocessor control +command (@pxref{Preprocessing}). @cindex line separator, Alpha @cindex statement separator, Alpha @@ -152,7 +167,7 @@ The 32 floating-point registers are referred to as @samp{$f@var{n}}. @cindex relocations, Alpha Some of these relocations are available for ECOFF, but mostly -only for ELF. They are modeled after the relocation format +only for ELF. They are modeled after the relocation format introduced in Digital Unix 4.0, but there are additions. The format is @samp{!@var{tag}} or @samp{!@var{tag}!@var{number}} @@ -228,13 +243,13 @@ jsr $26,($27),foo !lituse_jsr!1 @item !lituse_tlsgd!@var{N} Used with a register branch format instruction to indicate that the -literal is the call to @code{__tls_get_addr} used to compute the +literal is the call to @code{__tls_get_addr} used to compute the address of the thread-local storage variable whose descriptor was loaded with @code{!tlsgd!@var{N}}. @item !lituse_tlsldm!@var{N} Used with a register branch format instruction to indicate that the -literal is the call to @code{__tls_get_addr} used to compute the +literal is the call to @code{__tls_get_addr} used to compute the address of the base of the thread-local storage block for the current module. The descriptor for the module must have been loaded with @code{!tlsldm!@var{N}}. @@ -244,7 +259,7 @@ Used with @code{ldah} and @code{lda} to load the GP from the current address, a-la the @code{ldgp} macro. The source register for the @code{ldah} instruction must contain the address of the @code{ldah} instruction. There must be exactly one @code{lda} instruction paired -with the @code{ldah} instruction, though it may appear anywhere in +with the @code{ldah} instruction, though it may appear anywhere in the instruction stream. The immediate operands must be zero. @example @@ -386,8 +401,8 @@ used in some non-standard way and so the linker cannot elide the load of the procedure vector during relaxation. @item .usepv @var{function}, @var{which} -Used to indicate the use of the @code{$27} register, similar to -@code{.prologue}, but without the other semantics of needing to +Used to indicate the use of the @code{$27} register, similar to +@code{.prologue}, but without the other semantics of needing to be inside an open @code{.ent}/@code{.end} block. The @var{which} argument should be either @code{no}, indicating that