X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gas%2Fdoc%2Fc-m68hc11.texi;h=abd6ee19adaafb6aa94cd229a53ecc602597b18b;hb=fe779266b39080e49b04e61160e6af8be439c182;hp=8e2ba0004b905d750ead316068ddd397896ed748;hpb=35b55ed2130551c6ba7a5e164be92e8de8101b64;p=deliverable%2Fbinutils-gdb.git diff --git a/gas/doc/c-m68hc11.texi b/gas/doc/c-m68hc11.texi index 8e2ba0004b..abd6ee19ad 100644 --- a/gas/doc/c-m68hc11.texi +++ b/gas/doc/c-m68hc11.texi @@ -1,5 +1,4 @@ -@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000 -@c Free Software Foundation, Inc. +@c Copyright (C) 1991-2016 Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. @ifset GENERIC @@ -34,24 +33,40 @@ dependent options. @cindex @samp{-m68hc11} @item -m68hc11 -This option switches the assembler in the M68HC11 mode. In this mode, +This option switches the assembler into the M68HC11 mode. In this mode, the assembler only accepts 68HC11 operands and mnemonics. It produces code for the 68HC11. @cindex @samp{-m68hc12} @item -m68hc12 -This option switches the assembler in the M68HC12 mode. In this mode, +This option switches the assembler into the M68HC12 mode. In this mode, the assembler also accepts 68HC12 operands and mnemonics. It produces code for the 68HC12. A few 68HC11 instructions are replaced by some 68HC12 instructions as recommended by Motorola specifications. @cindex @samp{-m68hcs12} @item -m68hcs12 -This option switches the assembler in the M68HCS12 mode. This mode is +This option switches the assembler into the M68HCS12 mode. This mode is similar to @samp{-m68hc12} but specifies to assemble for the 68HCS12 series. The only difference is on the assembling of the @samp{movb} and @samp{movw} instruction when a PC-relative operand is used. +@cindex @samp{-mm9s12x} +@item -mm9s12x +This option switches the assembler into the M9S12X mode. This mode is +similar to @samp{-m68hc12} but specifies to assemble for the S12X +series which is a superset of the HCS12. + +@cindex @samp{-mm9s12xg} +@item -mm9s12xg +This option switches the assembler into the XGATE mode for the RISC +co-processor featured on some S12X-family chips. + +@cindex @samp{--xgate-ramoffset} +@item --xgate-ramoffset +This option instructs the linker to offset RAM addresses from S12X address +space into XGATE address space. + @cindex @samp{-mshort} @item -mshort This option controls the ABI and indicates to use a 16-bit integer ABI. @@ -82,9 +97,9 @@ mode addressing. When it is used with the direct page mode, This option prevents @code{@value{AS}} from doing this, and the wrong usage of the direct page mode will raise an error. -@cindex @samp{--short-branchs} -@item --short-branchs -The @samp{--short-branchs} option turns off the translation of +@cindex @samp{--short-branches} +@item --short-branches +The @samp{--short-branches} option turns off the translation of relative branches into absolute branches when the branch offset is out of range. By default @code{@value{AS}} transforms the relative branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne}, @@ -93,18 +108,18 @@ branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne}, an absolute branch when the offset is out of the -128 .. 127 range. In that case, the @samp{bsr} instruction is translated into a @samp{jsr}, the @samp{bra} instruction is translated into a -@samp{jmp} and the conditional branchs instructions are inverted and +@samp{jmp} and the conditional branches instructions are inverted and followed by a @samp{jmp}. This option disables these translations and @code{@value{AS}} will generate an error if a relative branch is out of range. This option does not affect the optimization associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes. -@cindex @samp{--force-long-branchs} -@item --force-long-branchs -The @samp{--force-long-branchs} option forces the translation of +@cindex @samp{--force-long-branches} +@item --force-long-branches +The @samp{--force-long-branches} option forces the translation of relative branches into absolute branches. This option does not affect the optimization associated to the @samp{jbra}, @samp{jbsr} and -@samp{jbXX} pseudo opcodes. +@samp{jbXX} pseudo opcodes. @cindex @samp{--print-insn-syntax} @item --print-insn-syntax @@ -146,6 +161,25 @@ bset 2,x #4 brclr *bot #8 foo @end smallexample +@cindex line comment character, M68HC11 +@cindex M68HC11 line comment character +The presence of a @samp{;} character or a @samp{!} character anywhere +on a line indicates the start of a comment that extends to the end of +that line. + +A @samp{*} or a @samp{#} character at the start of a line also +introduces a line comment, but these characters do not work elsewhere +on the line. If the first character of the line is a @samp{#} then as +well as starting a comment, the line could also be logical line number +directive (@pxref{Comments}) or a preprocessor control command +(@pxref{Preprocessing}). + +@cindex line separator, M68HC11 +@cindex statement separator, M68HC11 +@cindex M68HC11 line separator +The M68HC11 assembler does not currently support a line separator +character. + @cindex M68HC11 addressing modes @cindex addressing modes, M68HC11 The following addressing modes are understood for 68HC11 and 68HC12: @@ -382,7 +416,7 @@ Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instruction that reach the target. Generally these mnemonics are made by prepending @samp{j} to the start of Motorola mnemonic. These pseudo opcodes are not affected -by the @samp{--short-branchs} or @samp{--force-long-branchs} options. +by the @samp{--short-branches} or @samp{--force-long-branches} options. The following table summarizes the pseudo-operations. @@ -390,7 +424,7 @@ The following table summarizes the pseudo-operations. Displacement Width +-------------------------------------------------------------+ | Options | - | --short-branchs --force-long-branchs | + | --short-branches --force-long-branches | +--------------------------+----------------------------------+ Op |BYTE WORD | BYTE WORD | +--------------------------+----------------------------------+ @@ -398,7 +432,7 @@ The following table summarizes the pseudo-operations. bra | bra | jmp | jbsr | bsr jsr | bsr jsr | jbra | bra jmp | bra jmp | - bXX | bXX | bNX +3; jmp | + bXX | bXX | bNX +3; jmp | jbXX | bXX bNX +3; | bXX bNX +3; jmp | | jmp | | +--------------------------+----------------------------------+