X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Faarch64-tdep.h;h=f6ebabeaeb95b49010c0e70cfd9ca714e554a52f;hb=a435742a7fb32f6320ce0e6074e2500e28378104;hp=625282070480017cd1e960ae3bd62c94f9163aa3;hpb=187f5d00acf0ffe5390f282fd4d6285bcd6fccb9;p=deliverable%2Fbinutils-gdb.git

diff --git a/gdb/aarch64-tdep.h b/gdb/aarch64-tdep.h
index 6252820704..f6ebabeaeb 100644
--- a/gdb/aarch64-tdep.h
+++ b/gdb/aarch64-tdep.h
@@ -1,6 +1,6 @@
 /* Common target dependent code for GDB on AArch64 systems.
 
-   Copyright (C) 2009-2016 Free Software Foundation, Inc.
+   Copyright (C) 2009-2020 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
    This file is part of GDB.
@@ -22,6 +22,9 @@
 #ifndef AARCH64_TDEP_H
 #define AARCH64_TDEP_H
 
+#include "arch/aarch64.h"
+#include "infrun.h"
+
 /* Forward declarations.  */
 struct gdbarch;
 struct regset;
@@ -29,33 +32,14 @@ struct regset;
 /* AArch64 Dwarf register numbering.  */
 #define AARCH64_DWARF_X0   0
 #define AARCH64_DWARF_SP  31
+#define AARCH64_DWARF_PAUTH_RA_STATE  34
+#define AARCH64_DWARF_PAUTH_DMASK  35
+#define AARCH64_DWARF_PAUTH_CMASK  36
 #define AARCH64_DWARF_V0  64
-
-/* Register numbers of various important registers.  */
-enum aarch64_regnum
-{
-  AARCH64_X0_REGNUM,		/* First integer register */
-
-  /* Frame register in AArch64 code, if used.  */
-  AARCH64_FP_REGNUM = AARCH64_X0_REGNUM + 29,
-  AARCH64_LR_REGNUM = AARCH64_X0_REGNUM + 30,	/* Return address */
-  AARCH64_SP_REGNUM,		/* Stack pointer */
-  AARCH64_PC_REGNUM,		/* Program counter */
-  AARCH64_CPSR_REGNUM,		/* Contains status register */
-  AARCH64_V0_REGNUM,		/* First floating point / vector register */
-
-  /* Last floating point / vector register */
-  AARCH64_V31_REGNUM = AARCH64_V0_REGNUM + 31,
-  AARCH64_FPSR_REGNUM,		/* Floating point status register */
-  AARCH64_FPCR_REGNUM,		/* Floating point control register */
-
-  /* Other useful registers.  */
-
-  /* Last integer-like argument */
-  AARCH64_LAST_X_ARG_REGNUM = AARCH64_X0_REGNUM + 7,
-  AARCH64_STRUCT_RETURN_REGNUM = AARCH64_X0_REGNUM + 8,
-  AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
-};
+#define AARCH64_DWARF_SVE_VG   46
+#define AARCH64_DWARF_SVE_FFR  47
+#define AARCH64_DWARF_SVE_P0   48
+#define AARCH64_DWARF_SVE_Z0   96
 
 /* Size of integer registers.  */
 #define X_REGISTER_SIZE  8
@@ -73,7 +57,7 @@ enum aarch64_regnum
 
 /* The maximum number of modified instructions generated for one
    single-stepped instruction.  */
-#define DISPLACED_MODIFIED_INSNS 1
+#define AARCH64_DISPLACED_MODIFIED_INSNS 1
 
 /* Target-dependent structure in gdbarch.  */
 struct gdbarch_tdep
@@ -94,17 +78,36 @@ struct gdbarch_tdep
   struct type *vns_type;
   struct type *vnh_type;
   struct type *vnb_type;
+  struct type *vnv_type;
 
   /* syscall record.  */
   int (*aarch64_syscall_record) (struct regcache *regcache, unsigned long svc_number);
+
+  /* The VQ value for SVE targets, or zero if SVE is not supported.  */
+  uint64_t vq;
+
+  /* Returns true if the target supports SVE.  */
+  bool has_sve () const
+  {
+    return vq != 0;
+  }
+
+  int pauth_reg_base;
+  int pauth_ra_state_regnum;
+
+  /* Returns true if the target supports pauth.  */
+  bool has_pauth () const
+  {
+    return pauth_reg_base != -1;
+  }
 };
 
-extern struct target_desc *tdesc_aarch64;
+const target_desc *aarch64_read_description (uint64_t vq, bool pauth_p);
 
 extern int aarch64_process_record (struct gdbarch *gdbarch,
                                struct regcache *regcache, CORE_ADDR addr);
 
-struct displaced_step_closure *
+displaced_step_closure_up
   aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch,
 				    CORE_ADDR from, CORE_ADDR to,
 				    struct regcache *regs);