X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Falpha-tdep.c;h=06ee90cbc7785d8277e773bdb6b98065e2e19568;hb=2f91880f3afb3cc521111dfcc99b214c77aa97a1;hp=ca0e10990b0b559d0bf4ac1cf2b97e2588ef374c;hpb=d09f2c3fc15dd4491e9cfa455191045c0729a3c3;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/alpha-tdep.c b/gdb/alpha-tdep.c index ca0e10990b..06ee90cbc7 100644 --- a/gdb/alpha-tdep.c +++ b/gdb/alpha-tdep.c @@ -1,6 +1,6 @@ /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. - Copyright (C) 1993-2015 Free Software Foundation, Inc. + Copyright (C) 1993-2017 Free Software Foundation, Inc. This file is part of GDB. @@ -43,6 +43,7 @@ #include "elf-bfd.h" #include "alpha-tdep.h" +#include /* Instruction decoding. The notations for registers, immediates and opcodes are the same as the one used in Compaq's Alpha architecture @@ -226,7 +227,7 @@ alpha_sts (struct gdbarch *gdbarch, void *out, const void *in) /* The alpha needs a conversion between register and memory format if the register is a floating point register and memory format is float, as the register format must be double or memory format is an integer with 4 - bytes or less, as the representation of integers in floating point + bytes, as the representation of integers in floating point registers is different. */ static int @@ -234,7 +235,7 @@ alpha_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type) { return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31 - && TYPE_LENGTH (type) != 8); + && TYPE_LENGTH (type) == 4); } static int @@ -243,38 +244,40 @@ alpha_register_to_value (struct frame_info *frame, int regnum, int *optimizedp, int *unavailablep) { struct gdbarch *gdbarch = get_frame_arch (frame); - gdb_byte in[MAX_REGISTER_SIZE]; + struct value *value = get_frame_register_value (frame, regnum); - /* Convert to TYPE. */ - if (!get_frame_register_bytes (frame, regnum, 0, - register_size (gdbarch, regnum), - in, optimizedp, unavailablep)) - return 0; + gdb_assert (value != NULL); + *optimizedp = value_optimized_out (value); + *unavailablep = !value_entirely_available (value); - if (TYPE_LENGTH (valtype) == 4) + if (*optimizedp || *unavailablep) { - alpha_sts (gdbarch, out, in); - *optimizedp = *unavailablep = 0; - return 1; + release_value (value); + value_free (value); + return 0; } - error (_("Cannot retrieve value from floating point register")); + /* Convert to VALTYPE. */ + + gdb_assert (TYPE_LENGTH (valtype) == 4); + alpha_sts (gdbarch, out, value_contents_all (value)); + + release_value (value); + value_free (value); + return 1; } static void alpha_value_to_register (struct frame_info *frame, int regnum, struct type *valtype, const gdb_byte *in) { - gdb_byte out[MAX_REGISTER_SIZE]; + gdb_byte out[ALPHA_REGISTER_SIZE]; + + gdb_assert (TYPE_LENGTH (valtype) == 4); + gdb_assert (register_size (get_frame_arch (frame), regnum) + <= ALPHA_REGISTER_SIZE); + alpha_lds (get_frame_arch (frame), out, in); - switch (TYPE_LENGTH (valtype)) - { - case 4: - alpha_lds (get_frame_arch (frame), out, in); - break; - default: - error (_("Cannot store value in floating point register")); - } put_frame_register (frame, regnum, out); } @@ -644,14 +647,10 @@ alpha_return_in_memory_always (struct type *type) return 1; } -static const gdb_byte * -alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len) -{ - static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */ - *len = sizeof(break_insn); - return break_insn; -} +constexpr gdb_byte alpha_break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */ + +typedef BP_MANIPULATION (alpha_break_insn) alpha_breakpoint; /* This returns the PC of the first insn after the prologue. @@ -721,7 +720,7 @@ alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) post_prologue_pc = alpha_after_prologue (pc); if (post_prologue_pc != 0) - return max (pc, post_prologue_pc); + return std::max (pc, post_prologue_pc); /* Can't determine prologue from the symbol table, need to examine instructions. */ @@ -768,12 +767,11 @@ static const int stq_c_opcode = 0x2f; is found, attempt to step through it. A breakpoint is placed at the end of the sequence. */ -static int -alpha_deal_with_atomic_sequence (struct frame_info *frame) +static std::vector +alpha_deal_with_atomic_sequence (struct regcache *regcache) { - struct gdbarch *gdbarch = get_frame_arch (frame); - struct address_space *aspace = get_frame_address_space (frame); - CORE_ADDR pc = get_frame_pc (frame); + struct gdbarch *gdbarch = get_regcache_arch (regcache); + CORE_ADDR pc = regcache_read_pc (regcache); CORE_ADDR breaks[2] = {-1, -1}; CORE_ADDR loc = pc; CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */ @@ -787,7 +785,7 @@ alpha_deal_with_atomic_sequence (struct frame_info *frame) /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */ if (INSN_OPCODE (insn) != ldl_l_opcode && INSN_OPCODE (insn) != ldq_l_opcode) - return 0; + return {}; /* Assume that no atomic sequence is longer than "atomic_sequence_length" instructions. */ @@ -806,8 +804,8 @@ alpha_deal_with_atomic_sequence (struct frame_info *frame) immediate = (immediate ^ 0x400000) - 0x400000; if (bc_insn_count >= 1) - return 0; /* More than one branch found, fallback - to the standard single-step code. */ + return {}; /* More than one branch found, fallback + to the standard single-step code. */ breaks[1] = loc + ALPHA_INSN_SIZE + immediate; @@ -823,7 +821,7 @@ alpha_deal_with_atomic_sequence (struct frame_info *frame) /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */ if (INSN_OPCODE (insn) != stl_c_opcode && INSN_OPCODE (insn) != stq_c_opcode) - return 0; + return {}; closing_insn = loc; loc += ALPHA_INSN_SIZE; @@ -838,11 +836,12 @@ alpha_deal_with_atomic_sequence (struct frame_info *frame) || (breaks[1] >= pc && breaks[1] <= closing_insn))) last_breakpoint = 0; - /* Effectively inserts the breakpoints. */ + std::vector next_pcs; + for (index = 0; index <= last_breakpoint; index++) - insert_single_step_breakpoint (gdbarch, aspace, breaks[index]); + next_pcs.push_back (breaks[index]); - return 1; + return next_pcs; } @@ -1601,9 +1600,9 @@ fp_register_sign_bit (LONGEST reg) the target of the coming instruction and breakpoint it. */ static CORE_ADDR -alpha_next_pc (struct frame_info *frame, CORE_ADDR pc) +alpha_next_pc (struct regcache *regcache, CORE_ADDR pc) { - struct gdbarch *gdbarch = get_frame_arch (frame); + struct gdbarch *gdbarch = get_regcache_arch (regcache); unsigned int insn; unsigned int op; int regno; @@ -1619,7 +1618,7 @@ alpha_next_pc (struct frame_info *frame, CORE_ADDR pc) { /* Jump format: target PC is: RB & ~3 */ - return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3); + return (regcache_raw_get_unsigned (regcache, (insn >> 16) & 0x1f) & ~3); } if ((op & 0x30) == 0x30) @@ -1650,7 +1649,7 @@ alpha_next_pc (struct frame_info *frame, CORE_ADDR pc) regno += gdbarch_fp0_regnum (gdbarch); } - rav = get_frame_register_signed (frame, regno); + rav = regcache_raw_get_signed (regcache, regno); switch (op) { @@ -1721,18 +1720,15 @@ alpha_next_pc (struct frame_info *frame, CORE_ADDR pc) return (pc + ALPHA_INSN_SIZE); } -int -alpha_software_single_step (struct frame_info *frame) +std::vector +alpha_software_single_step (struct regcache *regcache) { - struct gdbarch *gdbarch = get_frame_arch (frame); - struct address_space *aspace = get_frame_address_space (frame); - CORE_ADDR pc, next_pc; + struct gdbarch *gdbarch = get_regcache_arch (regcache); + CORE_ADDR pc; - pc = get_frame_pc (frame); - next_pc = alpha_next_pc (frame, pc); + pc = alpha_next_pc (regcache, regcache_read_pc (regcache)); - insert_single_step_breakpoint (gdbarch, aspace, next_pc); - return 1; + return {pc}; } @@ -1754,7 +1750,7 @@ alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) if (arches != NULL) return arches->gdbarch; - tdep = XNEW (struct gdbarch_tdep); + tdep = XCNEW (struct gdbarch_tdep); gdbarch = gdbarch_alloc (&info, tdep); /* Lowest text address. This is used by heuristic_proc_start() @@ -1776,6 +1772,8 @@ alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_int_bit (gdbarch, 32); set_gdbarch_long_bit (gdbarch, 64); set_gdbarch_long_long_bit (gdbarch, 64); + set_gdbarch_wchar_bit (gdbarch, 64); + set_gdbarch_wchar_signed (gdbarch, 0); set_gdbarch_float_bit (gdbarch, 32); set_gdbarch_double_bit (gdbarch, 64); set_gdbarch_long_double_bit (gdbarch, 64); @@ -1802,9 +1800,6 @@ alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Prologue heuristics. */ set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); - /* Disassembler. */ - set_gdbarch_print_insn (gdbarch, print_insn_alpha); - /* Call info. */ set_gdbarch_return_value (gdbarch, alpha_return_value); @@ -1821,7 +1816,10 @@ alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_inner_than (gdbarch, core_addr_lessthan); set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); - set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); + set_gdbarch_breakpoint_kind_from_pc (gdbarch, + alpha_breakpoint::kind_from_pc); + set_gdbarch_sw_breakpoint_from_kind (gdbarch, + alpha_breakpoint::bp_from_kind); set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE); set_gdbarch_cannot_step_breakpoint (gdbarch, 1); @@ -1857,7 +1855,6 @@ extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ void _initialize_alpha_tdep (void) { - struct cmd_list_element *c; gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);