X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Farm-tdep.h;h=f8ba122b35a34796b07ef1ff5438f5cfc57cfcd2;hb=ee01b6652ad55437e777fb7e6b1745782dc205a4;hp=fe27c7f1087c5ddf3d2d034545f2b5ad55ee8664;hpb=bd18283a08463e34d632cb27a21c2962eecf65cd;p=deliverable%2Fbinutils-gdb.git

diff --git a/gdb/arm-tdep.h b/gdb/arm-tdep.h
index fe27c7f108..f8ba122b35 100644
--- a/gdb/arm-tdep.h
+++ b/gdb/arm-tdep.h
@@ -1,6 +1,5 @@
 /* Common target dependent code for GDB on ARM systems.
-   Copyright (C) 2002, 2003, 2007, 2008, 2009, 2010, 2011
-   Free Software Foundation, Inc.
+   Copyright (C) 2002-2014 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -72,6 +71,10 @@ enum gdb_regnum {
    bits.  DWORD aligned they use 96 bits.  */
 #define FP_REGISTER_SIZE	12
 
+/* Say how long VFP double precision registers are.  Used for documentation
+   purposes and code readability.  These are fixed at 64 bits.  */
+#define VFP_REGISTER_SIZE	8
+
 /* Number of machine registers.  The only define actually required 
    is gdbarch_num_regs.  The other definitions are used for documentation
    purposes and code readability.  */
@@ -170,16 +173,16 @@ struct gdbarch_tdep
   CORE_ADDR lowest_pc;		/* Lowest address at which instructions 
 				   will appear.  */
 
-  const char *arm_breakpoint;	/* Breakpoint pattern for an ARM insn.  */
+  const gdb_byte *arm_breakpoint;	/* Breakpoint pattern for an ARM insn.  */
   int arm_breakpoint_size;	/* And its size.  */
-  const char *thumb_breakpoint;	/* Breakpoint pattern for a Thumb insn.  */
+  const gdb_byte *thumb_breakpoint;	/* Breakpoint pattern for a Thumb insn.  */
   int thumb_breakpoint_size;	/* And its size.  */
 
   /* If the Thumb breakpoint is an undefined instruction (which is
      affected by IT blocks) rather than a BKPT instruction (which is
      not), then we need a 32-bit Thumb breakpoint to preserve the
      instruction count in IT blocks.  */
-  const char *thumb2_breakpoint;
+  const gdb_byte *thumb2_breakpoint;
   int thumb2_breakpoint_size;
 
   int jb_pc;			/* Offset to PC value in jump buffer.
@@ -191,7 +194,7 @@ struct gdbarch_tdep
   enum struct_return struct_return;
 
   /* Cached core file helpers.  */
-  struct regset *gregset, *fpregset;
+  struct regset *gregset, *fpregset, *vfpregset;
 
   /* ISA-specific data types.  */
   struct type *arm_ext_type;
@@ -201,6 +204,9 @@ struct gdbarch_tdep
   /* Return the expected next PC if FRAME is stopped at a syscall
      instruction.  */
   CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
+
+   /* syscall record.  */
+  int (*arm_syscall_record) (struct regcache *regcache, unsigned long svc_number);
 };
 
 /* Structures used for displaced stepping.  */
@@ -313,6 +319,7 @@ CORE_ADDR arm_skip_stub (struct frame_info *, CORE_ADDR);
 CORE_ADDR arm_get_next_pc (struct frame_info *, CORE_ADDR);
 void arm_insert_single_step_breakpoint (struct gdbarch *,
 					struct address_space *, CORE_ADDR);
+int arm_deal_with_atomic_sequence (struct frame_info *);
 int arm_software_single_step (struct frame_info *);
 int arm_frame_is_thumb (struct frame_info *frame);
 
@@ -330,6 +337,8 @@ extern int arm_psr_thumb_bit (struct gdbarch *);
    instruction?  */
 extern int arm_pc_is_thumb (struct gdbarch *, CORE_ADDR);
 
+extern int arm_process_record (struct gdbarch *gdbarch, 
+                               struct regcache *regcache, CORE_ADDR addr);
 /* Functions exported from armbsd-tdep.h.  */
 
 /* Return the appropriate register set for the core section identified
@@ -339,4 +348,11 @@ extern const struct regset *
   armbsd_regset_from_core_section (struct gdbarch *gdbarch,
 				   const char *sect_name, size_t sect_size);
 
+/* Target descriptions.  */
+extern struct target_desc *tdesc_arm_with_m;
+extern struct target_desc *tdesc_arm_with_iwmmxt;
+extern struct target_desc *tdesc_arm_with_vfpv2;
+extern struct target_desc *tdesc_arm_with_vfpv3;
+extern struct target_desc *tdesc_arm_with_neon;
+
 #endif /* arm-tdep.h */