X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Fi386-tdep.c;h=4e63832b0e6f6ec0017d234e5aa8f85691be3466;hb=1163a4b7a38a79ebd153dc5ee76ce93877d21dbd;hp=83a48818ccd2ee8dd0afabcee94da75c0e244e66;hpb=2b863f512dce3c2469cf40e4559fb571b1b01658;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c index 83a48818cc..4e63832b0e 100644 --- a/gdb/i386-tdep.c +++ b/gdb/i386-tdep.c @@ -1,6 +1,6 @@ /* Intel 386 target-dependent stuff. - Copyright (C) 1988-2016 Free Software Foundation, Inc. + Copyright (C) 1988-2019 Free Software Foundation, Inc. This file is part of GDB. @@ -23,7 +23,6 @@ #include "command.h" #include "dummy-frame.h" #include "dwarf2-frame.h" -#include "doublest.h" #include "frame.h" #include "frame-base.h" #include "frame-unwind.h" @@ -40,22 +39,20 @@ #include "symfile.h" #include "symtab.h" #include "target.h" +#include "target-float.h" #include "value.h" #include "dis-asm.h" #include "disasm.h" #include "remote.h" #include "i386-tdep.h" #include "i387-tdep.h" -#include "x86-xstate.h" +#include "common/x86-xstate.h" +#include "x86-tdep.h" #include "record.h" #include "record-full.h" -#include "features/i386/i386.c" -#include "features/i386/i386-avx.c" -#include "features/i386/i386-mpx.c" -#include "features/i386/i386-avx-mpx.c" -#include "features/i386/i386-avx512.c" -#include "features/i386/i386-mmx.c" +#include "target-descriptions.h" +#include "arch/i386.h" #include "ax.h" #include "ax-gdb.h" @@ -66,6 +63,7 @@ #include "expression.h" #include "parser-defs.h" #include +#include /* Register names. */ @@ -119,6 +117,11 @@ static const char *i386_mpx_names[] = "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus" }; +static const char* i386_pkeys_names[] = +{ + "pkru" +}; + /* Register names for MPX pseudo-registers. */ static const char *i386_bnd_names[] = @@ -413,6 +416,21 @@ i386_mpx_ctrl_regnum_p (struct gdbarch *gdbarch, int regnum) return regnum >= 0 && regnum < I387_NUM_MPX_CTRL_REGS; } +/* PKRU register? */ + +bool +i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + int pkru_regnum = tdep->pkru_regnum; + + if (pkru_regnum < 0) + return false; + + regnum -= pkru_regnum; + return regnum >= 0 && regnum < I387_NUM_PKEYS_REGS; +} + /* Return the name of register REGNUM, or the empty string if it is an anonymous register. */ @@ -500,7 +518,7 @@ i386_dbx_reg_to_regnum (struct gdbarch *gdbarch, int reg) } /* This will hopefully provoke a warning. */ - return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch); + return gdbarch_num_cooked_regs (gdbarch); } /* Convert SVR4 DWARF register number REG to the appropriate register number @@ -551,13 +569,13 @@ i386_svr4_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) /* Wrapper on i386_svr4_dwarf_reg_to_regnum to return num_regs + num_pseudo_regs for other debug formats. */ -static int +int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg) { int regnum = i386_svr4_dwarf_reg_to_regnum (gdbarch, reg); if (regnum == -1) - return gdbarch_num_regs (gdbarch) + gdbarch_num_pseudo_regs (gdbarch); + return gdbarch_num_cooked_regs (gdbarch); return regnum; } @@ -587,14 +605,10 @@ static const char *disassembly_flavor = att_flavor; This function is 64-bit safe. */ -static const gdb_byte * -i386_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len) -{ - static gdb_byte break_insn[] = { 0xcc }; /* int 3 */ +constexpr gdb_byte i386_break_insn[] = { 0xcc }; /* int 3 */ + +typedef BP_MANIPULATION (i386_break_insn) i386_breakpoint; - *len = sizeof (break_insn); - return break_insn; -} /* Displaced instruction handling. */ @@ -781,8 +795,7 @@ i386_insn_is_jump (struct gdbarch *gdbarch, CORE_ADDR addr) return i386_jmp_p (insn); } -/* Some kernels may run one past a syscall insn, so we have to cope. - Otherwise this is just simple_displaced_step_copy_insn. */ +/* Some kernels may run one past a syscall insn, so we have to cope. */ struct displaced_step_closure * i386_displaced_step_copy_insn (struct gdbarch *gdbarch, @@ -790,7 +803,8 @@ i386_displaced_step_copy_insn (struct gdbarch *gdbarch, struct regcache *regs) { size_t len = gdbarch_max_insn_length (gdbarch); - gdb_byte *buf = (gdb_byte *) xmalloc (len); + i386_displaced_step_closure *closure = new i386_displaced_step_closure (len); + gdb_byte *buf = closure->buf.data (); read_memory (from, buf, len); @@ -815,7 +829,7 @@ i386_displaced_step_copy_insn (struct gdbarch *gdbarch, displaced_step_dump_bytes (gdb_stdlog, buf, len); } - return (struct displaced_step_closure *) buf; + return closure; } /* Fix up the state of registers and memory after having single-stepped @@ -823,7 +837,7 @@ i386_displaced_step_copy_insn (struct gdbarch *gdbarch, void i386_displaced_step_fixup (struct gdbarch *gdbarch, - struct displaced_step_closure *closure, + struct displaced_step_closure *closure_, CORE_ADDR from, CORE_ADDR to, struct regcache *regs) { @@ -835,9 +849,9 @@ i386_displaced_step_fixup (struct gdbarch *gdbarch, applying it. */ ULONGEST insn_offset = to - from; - /* Since we use simple_displaced_step_copy_insn, our closure is a - copy of the instruction. */ - gdb_byte *insn = (gdb_byte *) closure; + i386_displaced_step_closure *closure + = (i386_displaced_step_closure *) closure_; + gdb_byte *insn = closure->buf.data (); /* The start of the insn, needed in case we see some prefixes. */ gdb_byte *insn_start = insn; @@ -1365,7 +1379,7 @@ i386_analyze_stack_align (CORE_ADDR pc, CORE_ADDR current_pc, if (current_pc > pc + offset_and) cache->saved_sp_reg = regnums[reg]; - return min (pc + offset + 3, current_pc); + return std::min (pc + offset + 3, current_pc); } /* Maximum instruction length we need to handle. */ @@ -1836,7 +1850,7 @@ i386_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) && (cust != NULL && COMPUNIT_PRODUCER (cust) != NULL && startswith (COMPUNIT_PRODUCER (cust), "clang "))) - return max (start_pc, post_prologue_pc); + return std::max (start_pc, post_prologue_pc); } cache.locals = -1; @@ -2657,7 +2671,8 @@ i386_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr, static CORE_ADDR i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, - struct value **args, CORE_ADDR sp, int struct_return, + struct value **args, CORE_ADDR sp, + function_call_return_method return_method, CORE_ADDR struct_addr) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); @@ -2666,6 +2681,13 @@ i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function, int write_pass; int args_space = 0; + /* BND registers can be in arbitrary values at the moment of the + inferior call. This can cause boundary violations that are not + due to a real bug or even desired by the user. The best to be done + is set the BND registers to allow access to the whole memory, INIT + state, before pushing the inferior call. */ + i387_reset_bnd_regs (gdbarch, regcache); + /* Determine the total space required for arguments and struct return address in a first pass (allowing for 16-byte-aligned arguments), then push arguments in a second pass. */ @@ -2674,7 +2696,7 @@ i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function, { int args_space_used = 0; - if (struct_return) + if (return_method == return_method_struct) { if (write_pass) { @@ -2734,10 +2756,10 @@ i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function, /* Finally, update the stack pointer... */ store_unsigned_integer (buf, 4, byte_order, sp); - regcache_cooked_write (regcache, I386_ESP_REGNUM, buf); + regcache->cooked_write (I386_ESP_REGNUM, buf); /* ...and fake a frame pointer. */ - regcache_cooked_write (regcache, I386_EBP_REGNUM, buf); + regcache->cooked_write (I386_EBP_REGNUM, buf); /* MarkK wrote: This "+ 8" is all over the place: (i386_frame_this_id, i386_sigtramp_frame_this_id, @@ -2781,8 +2803,8 @@ i386_extract_return_value (struct gdbarch *gdbarch, struct type *type, its contents to the desired type. This is probably not exactly how it would happen on the target itself, but it is the best we can do. */ - regcache_raw_read (regcache, I386_ST0_REGNUM, buf); - convert_typed_floating (buf, i387_ext_type (gdbarch), valbuf, type); + regcache->raw_read (I386_ST0_REGNUM, buf); + target_float_convert (buf, i387_ext_type (gdbarch), valbuf, type); } else { @@ -2791,14 +2813,14 @@ i386_extract_return_value (struct gdbarch *gdbarch, struct type *type, if (len <= low_size) { - regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); + regcache->raw_read (LOW_RETURN_REGNUM, buf); memcpy (valbuf, buf, len); } else if (len <= (low_size + high_size)) { - regcache_raw_read (regcache, LOW_RETURN_REGNUM, buf); + regcache->raw_read (LOW_RETURN_REGNUM, buf); memcpy (valbuf, buf, low_size); - regcache_raw_read (regcache, HIGH_RETURN_REGNUM, buf); + regcache->raw_read (HIGH_RETURN_REGNUM, buf); memcpy (valbuf + low_size, buf, len - low_size); } else @@ -2837,8 +2859,8 @@ i386_store_return_value (struct gdbarch *gdbarch, struct type *type, floating-point format used by the FPU. This is probably not exactly how it would happen on the target itself, but it is the best we can do. */ - convert_typed_floating (valbuf, type, buf, i387_ext_type (gdbarch)); - regcache_raw_write (regcache, I386_ST0_REGNUM, buf); + target_float_convert (valbuf, type, buf, i387_ext_type (gdbarch)); + regcache->raw_write (I386_ST0_REGNUM, buf); /* Set the top of the floating-point register stack to 7. The actual value doesn't really matter, but 7 is what a normal @@ -2859,12 +2881,12 @@ i386_store_return_value (struct gdbarch *gdbarch, struct type *type, int high_size = register_size (gdbarch, HIGH_RETURN_REGNUM); if (len <= low_size) - regcache_raw_write_part (regcache, LOW_RETURN_REGNUM, 0, len, valbuf); + regcache->raw_write_part (LOW_RETURN_REGNUM, 0, len, valbuf); else if (len <= (low_size + high_size)) { - regcache_raw_write (regcache, LOW_RETURN_REGNUM, valbuf); - regcache_raw_write_part (regcache, HIGH_RETURN_REGNUM, 0, - len - low_size, valbuf + low_size); + regcache->raw_write (LOW_RETURN_REGNUM, valbuf); + regcache->raw_write_part (HIGH_RETURN_REGNUM, 0, len - low_size, + valbuf + low_size); } else internal_error (__FILE__, __LINE__, @@ -3019,7 +3041,7 @@ i386_bnd_type (struct gdbarch *gdbarch) if (!tdep->i386_bnd_type) { - struct type *t, *bound_t; + struct type *t; const struct builtin_type *bt = builtin_type (gdbarch); /* The type we're building is described bellow: */ @@ -3228,15 +3250,15 @@ i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum) the MMX registers need to be mapped onto floating point registers. */ static int -i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) +i386_mmx_regnum_to_fp_regnum (readable_regcache *regcache, int regnum) { - struct gdbarch_tdep *tdep = gdbarch_tdep (get_regcache_arch (regcache)); + struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ()); int mmxreg, fpreg; ULONGEST fstat; int tos; mmxreg = regnum - tdep->mm0_regnum; - regcache_raw_read_unsigned (regcache, I387_FSTAT_REGNUM (tdep), &fstat); + regcache->raw_read (I387_FSTAT_REGNUM (tdep), &fstat); tos = (fstat >> 11) & 0x7; fpreg = (mmxreg + tos) % 8; @@ -3249,11 +3271,11 @@ i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, - struct regcache *regcache, + readable_regcache *regcache, int regnum, struct value *result_value) { - gdb_byte raw_buf[MAX_REGISTER_SIZE]; + gdb_byte raw_buf[I386_MAX_REGISTER_SIZE]; enum register_status status; gdb_byte *buf = value_contents_raw (result_value); @@ -3262,7 +3284,7 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); /* Extract (always little endian). */ - status = regcache_raw_read (regcache, fpnum, raw_buf); + status = regcache->raw_read (fpnum, raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, TYPE_LENGTH (value_type (result_value))); @@ -3277,9 +3299,8 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, regnum -= tdep->bnd0_regnum; /* Extract (always little endian). Read lower 128bits. */ - status = regcache_raw_read (regcache, - I387_BND0R_REGNUM (tdep) + regnum, - raw_buf); + status = regcache->raw_read (I387_BND0R_REGNUM (tdep) + regnum, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, 16); else @@ -3301,9 +3322,7 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, regnum -= tdep->k0_regnum; /* Extract (always little endian). */ - status = regcache_raw_read (regcache, - tdep->k0_regnum + regnum, - raw_buf); + status = regcache->raw_read (tdep->k0_regnum + regnum, raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, 8); else @@ -3316,18 +3335,16 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, if (regnum < num_lower_zmm_regs) { /* Extract (always little endian). Read lower 128bits. */ - status = regcache_raw_read (regcache, - I387_XMM0_REGNUM (tdep) + regnum, - raw_buf); + status = regcache->raw_read (I387_XMM0_REGNUM (tdep) + regnum, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, 16); else memcpy (buf, raw_buf, 16); /* Extract (always little endian). Read upper 128bits. */ - status = regcache_raw_read (regcache, - tdep->ymm0h_regnum + regnum, - raw_buf); + status = regcache->raw_read (tdep->ymm0h_regnum + regnum, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 16, 16); else @@ -3336,20 +3353,18 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, else { /* Extract (always little endian). Read lower 128bits. */ - status = regcache_raw_read (regcache, - I387_XMM16_REGNUM (tdep) + regnum - - num_lower_zmm_regs, - raw_buf); + status = regcache->raw_read (I387_XMM16_REGNUM (tdep) + regnum + - num_lower_zmm_regs, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, 16); else memcpy (buf, raw_buf, 16); /* Extract (always little endian). Read upper 128bits. */ - status = regcache_raw_read (regcache, - I387_YMM16H_REGNUM (tdep) + regnum - - num_lower_zmm_regs, - raw_buf); + status = regcache->raw_read (I387_YMM16H_REGNUM (tdep) + regnum + - num_lower_zmm_regs, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 16, 16); else @@ -3357,9 +3372,8 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, } /* Read upper 256bits. */ - status = regcache_raw_read (regcache, - tdep->zmm0h_regnum + regnum, - raw_buf); + status = regcache->raw_read (tdep->zmm0h_regnum + regnum, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 32, 32); else @@ -3370,17 +3384,15 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, regnum -= tdep->ymm0_regnum; /* Extract (always little endian). Read lower 128bits. */ - status = regcache_raw_read (regcache, - I387_XMM0_REGNUM (tdep) + regnum, - raw_buf); + status = regcache->raw_read (I387_XMM0_REGNUM (tdep) + regnum, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, 16); else memcpy (buf, raw_buf, 16); /* Read upper 128bits. */ - status = regcache_raw_read (regcache, - tdep->ymm0h_regnum + regnum, - raw_buf); + status = regcache->raw_read (tdep->ymm0h_regnum + regnum, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 16, 32); else @@ -3390,17 +3402,15 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, { regnum -= tdep->ymm16_regnum; /* Extract (always little endian). Read lower 128bits. */ - status = regcache_raw_read (regcache, - I387_XMM16_REGNUM (tdep) + regnum, - raw_buf); + status = regcache->raw_read (I387_XMM16_REGNUM (tdep) + regnum, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, 16); else memcpy (buf, raw_buf, 16); /* Read upper 128bits. */ - status = regcache_raw_read (regcache, - tdep->ymm16h_regnum + regnum, - raw_buf); + status = regcache->raw_read (tdep->ymm16h_regnum + regnum, + raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 16, 16); else @@ -3411,7 +3421,7 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, int gpnum = regnum - tdep->ax_regnum; /* Extract (always little endian). */ - status = regcache_raw_read (regcache, gpnum, raw_buf); + status = regcache->raw_read (gpnum, raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, TYPE_LENGTH (value_type (result_value))); @@ -3424,7 +3434,7 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, /* Extract (always little endian). We read both lower and upper registers. */ - status = regcache_raw_read (regcache, gpnum % 4, raw_buf); + status = regcache->raw_read (gpnum % 4, raw_buf); if (status != REG_VALID) mark_value_bytes_unavailable (result_value, 0, TYPE_LENGTH (value_type (result_value))); @@ -3440,7 +3450,7 @@ i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, static struct value * i386_pseudo_register_read_value (struct gdbarch *gdbarch, - struct regcache *regcache, + readable_regcache *regcache, int regnum) { struct value *result; @@ -3458,18 +3468,18 @@ void i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf) { - gdb_byte raw_buf[MAX_REGISTER_SIZE]; + gdb_byte raw_buf[I386_MAX_REGISTER_SIZE]; if (i386_mmx_regnum_p (gdbarch, regnum)) { int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); /* Read ... */ - regcache_raw_read (regcache, fpnum, raw_buf); + regcache->raw_read (fpnum, raw_buf); /* ... Modify ... (always little endian). */ memcpy (raw_buf, buf, register_size (gdbarch, regnum)); /* ... Write. */ - regcache_raw_write (regcache, fpnum, raw_buf); + regcache->raw_write (fpnum, raw_buf); } else { @@ -3487,9 +3497,8 @@ i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, upper = extract_unsigned_integer (buf + size, size, byte_order); /* Fetching register buffer. */ - regcache_raw_read (regcache, - I387_BND0R_REGNUM (tdep) + regnum, - raw_buf); + regcache->raw_read (I387_BND0R_REGNUM (tdep) + regnum, + raw_buf); upper = ~upper; @@ -3497,18 +3506,13 @@ i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, memcpy (raw_buf, &lower, 8); memcpy (raw_buf + 8, &upper, 8); - - regcache_raw_write (regcache, - I387_BND0R_REGNUM (tdep) + regnum, - raw_buf); + regcache->raw_write (I387_BND0R_REGNUM (tdep) + regnum, raw_buf); } else if (i386_k_regnum_p (gdbarch, regnum)) { regnum -= tdep->k0_regnum; - regcache_raw_write (regcache, - tdep->k0_regnum + regnum, - buf); + regcache->raw_write (tdep->k0_regnum + regnum, buf); } else if (i386_zmm_regnum_p (gdbarch, regnum)) { @@ -3517,82 +3521,64 @@ i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, if (regnum < num_lower_zmm_regs) { /* Write lower 128bits. */ - regcache_raw_write (regcache, - I387_XMM0_REGNUM (tdep) + regnum, - buf); + regcache->raw_write (I387_XMM0_REGNUM (tdep) + regnum, buf); /* Write upper 128bits. */ - regcache_raw_write (regcache, - I387_YMM0_REGNUM (tdep) + regnum, - buf + 16); + regcache->raw_write (I387_YMM0_REGNUM (tdep) + regnum, buf + 16); } else { /* Write lower 128bits. */ - regcache_raw_write (regcache, - I387_XMM16_REGNUM (tdep) + regnum - - num_lower_zmm_regs, - buf); + regcache->raw_write (I387_XMM16_REGNUM (tdep) + regnum + - num_lower_zmm_regs, buf); /* Write upper 128bits. */ - regcache_raw_write (regcache, - I387_YMM16H_REGNUM (tdep) + regnum - - num_lower_zmm_regs, - buf + 16); + regcache->raw_write (I387_YMM16H_REGNUM (tdep) + regnum + - num_lower_zmm_regs, buf + 16); } /* Write upper 256bits. */ - regcache_raw_write (regcache, - tdep->zmm0h_regnum + regnum, - buf + 32); + regcache->raw_write (tdep->zmm0h_regnum + regnum, buf + 32); } else if (i386_ymm_regnum_p (gdbarch, regnum)) { regnum -= tdep->ymm0_regnum; /* ... Write lower 128bits. */ - regcache_raw_write (regcache, - I387_XMM0_REGNUM (tdep) + regnum, - buf); + regcache->raw_write (I387_XMM0_REGNUM (tdep) + regnum, buf); /* ... Write upper 128bits. */ - regcache_raw_write (regcache, - tdep->ymm0h_regnum + regnum, - buf + 16); + regcache->raw_write (tdep->ymm0h_regnum + regnum, buf + 16); } else if (i386_ymm_avx512_regnum_p (gdbarch, regnum)) { regnum -= tdep->ymm16_regnum; /* ... Write lower 128bits. */ - regcache_raw_write (regcache, - I387_XMM16_REGNUM (tdep) + regnum, - buf); + regcache->raw_write (I387_XMM16_REGNUM (tdep) + regnum, buf); /* ... Write upper 128bits. */ - regcache_raw_write (regcache, - tdep->ymm16h_regnum + regnum, - buf + 16); + regcache->raw_write (tdep->ymm16h_regnum + regnum, buf + 16); } else if (i386_word_regnum_p (gdbarch, regnum)) { int gpnum = regnum - tdep->ax_regnum; /* Read ... */ - regcache_raw_read (regcache, gpnum, raw_buf); + regcache->raw_read (gpnum, raw_buf); /* ... Modify ... (always little endian). */ memcpy (raw_buf, buf, 2); /* ... Write. */ - regcache_raw_write (regcache, gpnum, raw_buf); + regcache->raw_write (gpnum, raw_buf); } else if (i386_byte_regnum_p (gdbarch, regnum)) { int gpnum = regnum - tdep->al_regnum; /* Read ... We read both lower and upper registers. */ - regcache_raw_read (regcache, gpnum % 4, raw_buf); + regcache->raw_read (gpnum % 4, raw_buf); /* ... Modify ... (always little endian). */ if (gpnum >= 4) memcpy (raw_buf + 1, buf, 1); else memcpy (raw_buf, buf, 1); /* ... Write. */ - regcache_raw_write (regcache, gpnum % 4, raw_buf); + regcache->raw_write (gpnum % 4, raw_buf); } else internal_error (__FILE__, __LINE__, _("invalid regnum")); @@ -3819,7 +3805,7 @@ void i386_supply_gregset (const struct regset *regset, struct regcache *regcache, int regnum, const void *gregs, size_t len) { - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); const gdb_byte *regs = (const gdb_byte *) gregs; int i; @@ -3830,7 +3816,7 @@ i386_supply_gregset (const struct regset *regset, struct regcache *regcache, { if ((regnum == i || regnum == -1) && tdep->gregset_reg_offset[i] != -1) - regcache_raw_supply (regcache, i, regs + tdep->gregset_reg_offset[i]); + regcache->raw_supply (i, regs + tdep->gregset_reg_offset[i]); } } @@ -3844,7 +3830,7 @@ i386_collect_gregset (const struct regset *regset, const struct regcache *regcache, int regnum, void *gregs, size_t len) { - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); gdb_byte *regs = (gdb_byte *) gregs; int i; @@ -3855,7 +3841,7 @@ i386_collect_gregset (const struct regset *regset, { if ((regnum == i || regnum == -1) && tdep->gregset_reg_offset[i] != -1) - regcache_raw_collect (regcache, i, regs + tdep->gregset_reg_offset[i]); + regcache->raw_collect (i, regs + tdep->gregset_reg_offset[i]); } } @@ -3867,7 +3853,7 @@ static void i386_supply_fpregset (const struct regset *regset, struct regcache *regcache, int regnum, const void *fpregs, size_t len) { - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); if (len == I387_SIZEOF_FXSAVE) @@ -3890,7 +3876,7 @@ i386_collect_fpregset (const struct regset *regset, const struct regcache *regcache, int regnum, void *fpregs, size_t len) { - struct gdbarch *gdbarch = get_regcache_arch (regcache); + struct gdbarch *gdbarch = regcache->arch (); const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); if (len == I387_SIZEOF_FXSAVE) @@ -3925,9 +3911,11 @@ i386_iterate_over_regset_sections (struct gdbarch *gdbarch, { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - cb (".reg", tdep->sizeof_gregset, &i386_gregset, NULL, cb_data); + cb (".reg", tdep->sizeof_gregset, tdep->sizeof_gregset, &i386_gregset, NULL, + cb_data); if (tdep->sizeof_fpregset) - cb (".reg2", tdep->sizeof_fpregset, tdep->fpregset, NULL, cb_data); + cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, tdep->fpregset, + NULL, cb_data); } @@ -3984,11 +3972,9 @@ i386_print_insn (bfd_vma pc, struct disassemble_info *info) gdb_assert (disassembly_flavor == att_flavor || disassembly_flavor == intel_flavor); - /* FIXME: kettenis/20020915: Until disassembler_options is properly - constified, cast to prevent a compiler warning. */ - info->disassembler_options = (char *) disassembly_flavor; + info->disassembler_options = disassembly_flavor; - return print_insn_i386 (pc, info); + return default_print_insn (pc, info); } @@ -4415,6 +4401,15 @@ i386_gnu_triplet_regexp (struct gdbarch *gdbarch) +/* Implement the "in_indirect_branch_thunk" gdbarch function. */ + +static bool +i386_in_indirect_branch_thunk (struct gdbarch *gdbarch, CORE_ADDR pc) +{ + return x86_in_indirect_branch_thunk (pc, i386_register_names, + I386_EAX_REGNUM, I386_EIP_REGNUM); +} + /* Generic ELF. */ void @@ -4442,7 +4437,8 @@ i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) set_gdbarch_stap_parse_special_token (gdbarch, i386_stap_parse_special_token); - set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp); + set_gdbarch_in_indirect_branch_thunk (gdbarch, + i386_in_indirect_branch_thunk); } /* System V Release 4 (SVR4). */ @@ -4466,33 +4462,6 @@ i386_svr4_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) tdep->jb_pc_offset = 20; } -/* DJGPP. */ - -static void -i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) -{ - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - - /* DJGPP doesn't have any special frames for signal handlers. */ - tdep->sigtramp_p = NULL; - - tdep->jb_pc_offset = 36; - - /* DJGPP does not support the SSE registers. */ - if (! tdesc_has_registers (info.target_desc)) - tdep->tdesc = tdesc_i386_mmx; - - /* Native compiler is GCC, which uses the SVR4 register numbering - even in COFF and STABS. See the comment in i386_gdbarch_init, - before the calls to set_gdbarch_stab_reg_to_regnum and - set_gdbarch_sdb_reg_to_regnum. */ - set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum); - set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum); - - set_gdbarch_has_dos_based_file_system (gdbarch, 1); - - set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp); -} /* i386 register groups. In addition to the normal groups, add "mmx" @@ -4529,9 +4498,9 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p, ymm_regnum_p, ymmh_regnum_p, ymm_avx512_regnum_p, ymmh_avx512_regnum_p, - bndr_regnum_p, bnd_regnum_p, k_regnum_p, zmm_regnum_p, zmmh_regnum_p, - zmm_avx512_regnum_p, mpx_ctrl_regnum_p, xmm_avx512_regnum_p, - avx512_p, avx_p, sse_p; + bndr_regnum_p, bnd_regnum_p, zmm_regnum_p, zmmh_regnum_p, + mpx_ctrl_regnum_p, xmm_avx512_regnum_p, + avx512_p, avx_p, sse_p, pkru_regnum_p; /* Don't include pseudo registers, except for MMX, in any register groups. */ @@ -4548,6 +4517,7 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, if (group == i386_mmx_reggroup) return mmx_regnum_p; + pkru_regnum_p = i386_pkru_regnum_p(gdbarch, regnum); xmm_regnum_p = i386_xmm_regnum_p (gdbarch, regnum); xmm_avx512_regnum_p = i386_xmm_avx512_regnum_p (gdbarch, regnum); mxcsr_regnum_p = i386_mxcsr_regnum_p (gdbarch, regnum); @@ -4558,11 +4528,11 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, ymm_avx512_regnum_p = i386_ymm_avx512_regnum_p (gdbarch, regnum); zmm_regnum_p = i386_zmm_regnum_p (gdbarch, regnum); - avx512_p = ((tdep->xcr0 & X86_XSTATE_AVX512_MASK) - == X86_XSTATE_AVX512_MASK); - avx_p = ((tdep->xcr0 & X86_XSTATE_AVX512_MASK) + avx512_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK) + == X86_XSTATE_AVX_AVX512_MASK); + avx_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK) == X86_XSTATE_AVX_MASK) && !avx512_p; - sse_p = ((tdep->xcr0 & X86_XSTATE_AVX512_MASK) + sse_p = ((tdep->xcr0 & X86_XSTATE_AVX_AVX512_MASK) == X86_XSTATE_SSE_MASK) && !avx512_p && ! avx_p; if (group == vector_reggroup) @@ -4619,7 +4589,8 @@ i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, && !bnd_regnum_p && !mpx_ctrl_regnum_p && !zmm_regnum_p - && !zmmh_regnum_p); + && !zmmh_regnum_p + && !pkru_regnum_p); return default_register_reggroup_p (gdbarch, regnum, group); } @@ -5040,7 +5011,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, uint32_t opcode; uint8_t opcode8; ULONGEST addr; - gdb_byte buf[MAX_REGISTER_SIZE]; + gdb_byte buf[I386_MAX_REGISTER_SIZE]; struct i386_record_s ir; struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); uint8_t rex_w = -1; @@ -5504,14 +5475,36 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; - case 0x0fc7: /* cmpxchg8b */ + case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */ if (i386_record_modrm (&ir)) return -1; if (ir.mod == 3) { - ir.addr -= 2; - opcode = opcode << 8 | ir.modrm; - goto no_support; + /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as + an extended opcode. rdrand has bits 110 (/6) and rdseed + has bits 111 (/7). */ + if (ir.reg == 6 || ir.reg == 7) + { + /* The storage register is described by the 3 R/M bits, but the + REX.B prefix may be used to give access to registers + R8~R15. In this case ir.rex_b + R/M will give us the register + in the range R8~R15. + + REX.W may also be used to access 64-bit registers, but we + already record entire registers and not just partial bits + of them. */ + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rex_b + ir.rm); + /* These instructions also set conditional bits. */ + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + break; + } + else + { + /* We don't handle this particular instruction yet. */ + ir.addr -= 2; + opcode = opcode << 8 | ir.modrm; + goto no_support; + } } I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); @@ -7116,6 +7109,7 @@ Do you want to stop the program?"), else if (ir.rm == 1) break; } + /* Fall through. */ case 3: /* lidt */ if (ir.mod == 3) { @@ -8110,10 +8104,9 @@ static const int i386_record_regmap[] = static int i386_fast_tracepoint_valid_at (struct gdbarch *gdbarch, CORE_ADDR addr, - char **msg) + std::string *msg) { int len, jumplen; - static struct ui_file *gdb_null = NULL; /* Ask the target for the minimum instruction length supported. */ jumplen = target_get_min_fast_tracepoint_insn_len (); @@ -8136,31 +8129,44 @@ i386_fast_tracepoint_valid_at (struct gdbarch *gdbarch, CORE_ADDR addr, jumplen = (register_size (gdbarch, 0) == 8) ? 5 : 4; } - /* Dummy file descriptor for the disassembler. */ - if (!gdb_null) - gdb_null = ui_file_new (); - /* Check for fit. */ - len = gdb_print_insn (gdbarch, addr, gdb_null, NULL); + len = gdb_insn_length (gdbarch, addr); if (len < jumplen) { /* Return a bit of target-specific detail to add to the caller's generic failure message. */ if (msg) - *msg = xstrprintf (_("; instruction is only %d bytes long, " - "need at least %d bytes for the jump"), - len, jumplen); + *msg = string_printf (_("; instruction is only %d bytes long, " + "need at least %d bytes for the jump"), + len, jumplen); return 0; } else { if (msg) - *msg = NULL; + msg->clear (); return 1; } } +/* Return a floating-point format for a floating-point variable of + length LEN in bits. If non-NULL, NAME is the name of its type. + If no suitable type is found, return NULL. */ + +const struct floatformat ** +i386_floatformat_for_type (struct gdbarch *gdbarch, + const char *name, int len) +{ + if (len == 128 && name) + if (strcmp (name, "__float128") == 0 + || strcmp (name, "_Float128") == 0 + || strcmp (name, "complex _Float128") == 0) + return floatformats_ia64_quad; + + return default_floatformat_for_type (gdbarch, name, len); +} + static int i386_validate_tdesc_p (struct gdbarch_tdep *tdep, struct tdesc_arch_data *tdesc_data) @@ -8169,7 +8175,7 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep, const struct tdesc_feature *feature_core; const struct tdesc_feature *feature_sse, *feature_avx, *feature_mpx, - *feature_avx512; + *feature_avx512, *feature_pkeys, *feature_segments; int i, num_regs, valid_p; if (! tdesc_has_registers (tdesc)) @@ -8192,6 +8198,12 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep, /* Try AVX512 registers. */ feature_avx512 = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx512"); + /* Try segment base registers. */ + feature_segments = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.segments"); + + /* Try PKEYS */ + feature_pkeys = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.pkeys"); + valid_p = 1; /* The XCR0 bits. */ @@ -8201,7 +8213,7 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep, if (!feature_avx) return 0; - tdep->xcr0 = X86_XSTATE_MPX_AVX512_MASK; + tdep->xcr0 = X86_XSTATE_AVX_AVX512_MASK; /* It may have been set by OSABI initialization function. */ if (tdep->k0_regnum < 0) @@ -8298,10 +8310,63 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep, tdep->mpx_register_names[i]); } + if (feature_segments) + { + if (tdep->fsbase_regnum < 0) + tdep->fsbase_regnum = I386_FSBASE_REGNUM; + valid_p &= tdesc_numbered_register (feature_segments, tdesc_data, + tdep->fsbase_regnum, "fs_base"); + valid_p &= tdesc_numbered_register (feature_segments, tdesc_data, + tdep->fsbase_regnum + 1, "gs_base"); + } + + if (feature_pkeys) + { + tdep->xcr0 |= X86_XSTATE_PKRU; + if (tdep->pkru_regnum < 0) + { + tdep->pkeys_register_names = i386_pkeys_names; + tdep->pkru_regnum = I386_PKRU_REGNUM; + tdep->num_pkeys_regs = 1; + } + + for (i = 0; i < I387_NUM_PKEYS_REGS; i++) + valid_p &= tdesc_numbered_register (feature_pkeys, tdesc_data, + I387_PKRU_REGNUM (tdep) + i, + tdep->pkeys_register_names[i]); + } + return valid_p; } + +/* Implement the type_align gdbarch function. */ + +static ULONGEST +i386_type_align (struct gdbarch *gdbarch, struct type *type) +{ + type = check_typedef (type); + + if (gdbarch_ptr_bit (gdbarch) == 32) + { + if ((TYPE_CODE (type) == TYPE_CODE_INT + || TYPE_CODE (type) == TYPE_CODE_FLT) + && TYPE_LENGTH (type) > 4) + return 4; + + /* Handle x86's funny long double. */ + if (TYPE_CODE (type) == TYPE_CODE_FLT + && gdbarch_long_double_bit (gdbarch) == TYPE_LENGTH (type) * 8) + return 4; + } + + return 0; +} + + +/* Note: This is called for both i386 and amd64. */ + static struct gdbarch * i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { @@ -8313,15 +8378,13 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) int ymm0_regnum; int bnd0_regnum; int num_bnd_cooked; - int k0_regnum; - int zmm0_regnum; /* If there is already a candidate, use it. */ arches = gdbarch_list_lookup_by_info (arches, &info); if (arches != NULL) return arches->gdbarch; - /* Allocate space for the new architecture. */ + /* Allocate space for the new architecture. Assume i386 for now. */ tdep = XCNEW (struct gdbarch_tdep); gdbarch = gdbarch_alloc (&info, tdep); @@ -8359,7 +8422,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->record_regmap = i386_record_regmap; - set_gdbarch_long_long_align_bit (gdbarch, 32); + set_gdbarch_type_align (gdbarch, i386_type_align); /* The format used for `long double' on almost all i386 targets is the i387 extended floating-point format. In fact, of all targets @@ -8372,6 +8435,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) alignment. */ set_gdbarch_long_double_bit (gdbarch, 96); + /* Support for floating-point data type variants. */ + set_gdbarch_floatformat_for_type (gdbarch, i386_floatformat_for_type); + /* Register numbers of various important registers. */ set_gdbarch_sp_regnum (gdbarch, I386_ESP_REGNUM); /* %esp */ set_gdbarch_pc_regnum (gdbarch, I386_EIP_REGNUM); /* %eip */ @@ -8439,7 +8505,9 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Stack grows downward. */ set_gdbarch_inner_than (gdbarch, core_addr_lessthan); - set_gdbarch_breakpoint_from_pc (gdbarch, i386_breakpoint_from_pc); + set_gdbarch_breakpoint_kind_from_pc (gdbarch, i386_breakpoint::kind_from_pc); + set_gdbarch_sw_breakpoint_from_kind (gdbarch, i386_breakpoint::bp_from_kind); + set_gdbarch_decr_pc_after_break (gdbarch, 1); set_gdbarch_max_insn_length (gdbarch, I386_MAX_INSN_LEN); @@ -8488,14 +8556,14 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Even though the default ABI only includes general-purpose registers, floating-point registers and the SSE registers, we have to leave a gap for the upper AVX, MPX and AVX512 registers. */ - set_gdbarch_num_regs (gdbarch, I386_AVX512_NUM_REGS); + set_gdbarch_num_regs (gdbarch, I386_NUM_REGS); set_gdbarch_gnu_triplet_regexp (gdbarch, i386_gnu_triplet_regexp); /* Get the x86 target description from INFO. */ tdesc = info.target_desc; if (! tdesc_has_registers (tdesc)) - tdesc = tdesc_i386; + tdesc = i386_target_description (X86_XSTATE_SSE_MASK, false); tdep->tdesc = tdesc; tdep->num_core_regs = I386_NUM_GREGS + I387_NUM_REGS; @@ -8533,6 +8601,13 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->num_ymm_avx512_regs = 0; tdep->num_xmm_avx512_regs = 0; + /* No PKEYS registers */ + tdep->pkru_regnum = -1; + tdep->num_pkeys_regs = 0; + + /* No segment base registers. */ + tdep->fsbase_regnum = -1; + tdesc_data = tdesc_data_alloc (); set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction); @@ -8543,8 +8618,10 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_insn_is_ret (gdbarch, i386_insn_is_ret); set_gdbarch_insn_is_jump (gdbarch, i386_insn_is_jump); - /* Hook in ABI-specific overrides, if they have been registered. */ - info.tdep_info = tdesc_data; + /* Hook in ABI-specific overrides, if they have been registered. + Note: If INFO specifies a 64 bit arch, this is where we turn + a 32-bit i386 into a 64-bit amd64. */ + info.tdesc_data = tdesc_data; gdbarch_init_osabi (info, gdbarch); if (!i386_validate_tdesc_p (tdep, tdesc_data)) @@ -8651,36 +8728,28 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) return gdbarch; } -static enum gdb_osabi -i386_coff_osabi_sniffer (bfd *abfd) -{ - if (strcmp (bfd_get_target (abfd), "coff-go32-exe") == 0 - || strcmp (bfd_get_target (abfd), "coff-go32") == 0) - return GDB_OSABI_GO32; - - return GDB_OSABI_UNKNOWN; -} /* Return the target description for a specified XSAVE feature mask. */ const struct target_desc * -i386_target_description (uint64_t xcr0) -{ - switch (xcr0 & X86_XSTATE_ALL_MASK) - { - case X86_XSTATE_MPX_AVX512_MASK: - case X86_XSTATE_AVX512_MASK: - return tdesc_i386_avx512; - case X86_XSTATE_AVX_MPX_MASK: - return tdesc_i386_avx_mpx; - case X86_XSTATE_MPX_MASK: - return tdesc_i386_mpx; - case X86_XSTATE_AVX_MASK: - return tdesc_i386_avx; - default: - return tdesc_i386; - } +i386_target_description (uint64_t xcr0, bool segments) +{ + static target_desc *i386_tdescs \ + [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {}; + target_desc **tdesc; + + tdesc = &i386_tdescs[(xcr0 & X86_XSTATE_SSE) ? 1 : 0] + [(xcr0 & X86_XSTATE_AVX) ? 1 : 0] + [(xcr0 & X86_XSTATE_MPX) ? 1 : 0] + [(xcr0 & X86_XSTATE_AVX512) ? 1 : 0] + [(xcr0 & X86_XSTATE_PKRU) ? 1 : 0] + [segments ? 1 : 0]; + + if (*tdesc == NULL) + *tdesc = i386_create_target_description (xcr0, false, segments); + + return *tdesc; } #define MPX_BASE_MASK (~(ULONGEST) 0xfff) @@ -8694,10 +8763,9 @@ i386_mpx_bd_base (void) struct gdbarch_tdep *tdep; ULONGEST ret; enum register_status regstatus; - struct gdb_exception except; rcache = get_current_regcache (); - tdep = gdbarch_tdep (get_regcache_arch (rcache)); + tdep = gdbarch_tdep (rcache->arch ()); regstatus = regcache_raw_read_unsigned (rcache, tdep->bndcfgu_regnum, &ret); @@ -8790,22 +8858,22 @@ i386_mpx_print_bounds (const CORE_ADDR bt_entry[4]) if (bounds_in_map == 1) { - ui_out_text (uiout, "Null bounds on map:"); - ui_out_text (uiout, " pointer value = "); - ui_out_field_core_addr (uiout, "pointer-value", gdbarch, bt_entry[2]); - ui_out_text (uiout, "."); - ui_out_text (uiout, "\n"); + uiout->text ("Null bounds on map:"); + uiout->text (" pointer value = "); + uiout->field_core_addr ("pointer-value", gdbarch, bt_entry[2]); + uiout->text ("."); + uiout->text ("\n"); } else { - ui_out_text (uiout, "{lbound = "); - ui_out_field_core_addr (uiout, "lower-bound", gdbarch, bt_entry[0]); - ui_out_text (uiout, ", ubound = "); + uiout->text ("{lbound = "); + uiout->field_core_addr ("lower-bound", gdbarch, bt_entry[0]); + uiout->text (", ubound = "); /* The upper bound is stored in 1's complement. */ - ui_out_field_core_addr (uiout, "upper-bound", gdbarch, ~bt_entry[1]); - ui_out_text (uiout, "}: pointer value = "); - ui_out_field_core_addr (uiout, "pointer-value", gdbarch, bt_entry[2]); + uiout->field_core_addr ("upper-bound", gdbarch, ~bt_entry[1]); + uiout->text ("}: pointer value = "); + uiout->field_core_addr ("pointer-value", gdbarch, bt_entry[2]); if (gdbarch_ptr_bit (gdbarch) == 64) size = ( (~(int64_t) bt_entry[1]) - (int64_t) bt_entry[0]); @@ -8817,19 +8885,19 @@ i386_mpx_print_bounds (const CORE_ADDR bt_entry[4]) one to the size. */ size = (size > -1 ? size + 1 : size); - ui_out_text (uiout, ", size = "); - ui_out_field_fmt (uiout, "size", "%s", plongest (size)); + uiout->text (", size = "); + uiout->field_fmt ("size", "%s", plongest (size)); - ui_out_text (uiout, ", metadata = "); - ui_out_field_core_addr (uiout, "metadata", gdbarch, bt_entry[3]); - ui_out_text (uiout, "\n"); + uiout->text (", metadata = "); + uiout->field_core_addr ("metadata", gdbarch, bt_entry[3]); + uiout->text ("\n"); } } /* Implement the command "show mpx bound". */ static void -i386_mpx_info_bounds (char *args, int from_tty) +i386_mpx_info_bounds (const char *args, int from_tty) { CORE_ADDR bd_base = 0; CORE_ADDR addr; @@ -8839,7 +8907,8 @@ i386_mpx_info_bounds (char *args, int from_tty) struct gdbarch *gdbarch = get_current_arch (); struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr; - if (!i386_mpx_enabled ()) + if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386 + || !i386_mpx_enabled ()) { printf_unfiltered (_("Intel Memory Protection Extensions not " "supported on this target.\n")); @@ -8870,7 +8939,7 @@ i386_mpx_info_bounds (char *args, int from_tty) /* Implement the command "set mpx bound". */ static void -i386_mpx_set_bounds (char *args, int from_tty) +i386_mpx_set_bounds (const char *args, int from_tty) { CORE_ADDR bd_base = 0; CORE_ADDR addr, lower, upper; @@ -8882,7 +8951,8 @@ i386_mpx_set_bounds (char *args, int from_tty) enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); struct type *data_ptr_type = builtin_type (gdbarch)->builtin_data_ptr; - if (!i386_mpx_enabled ()) + if (gdbarch_bfd_arch_info (gdbarch)->arch != bfd_arch_i386 + || !i386_mpx_enabled ()) error (_("Intel Memory Protection Extensions not supported\ on this target.")); @@ -8924,7 +8994,7 @@ static struct cmd_list_element *mpx_set_cmdlist, *mpx_show_cmdlist; /* Helper function for the CLI commands. */ static void -set_mpx_cmd (char *args, int from_tty) +set_mpx_cmd (const char *args, int from_tty) { help_list (mpx_set_cmdlist, "set mpx ", all_commands, gdb_stdout); } @@ -8932,14 +9002,11 @@ set_mpx_cmd (char *args, int from_tty) /* Helper function for the CLI commands. */ static void -show_mpx_cmd (char *args, int from_tty) +show_mpx_cmd (const char *args, int from_tty) { cmd_show_list (mpx_show_cmdlist, from_tty, ""); } -/* Provide a prototype to silence -Wmissing-prototypes. */ -void _initialize_i386_tdep (void); - void _initialize_i386_tdep (void) { @@ -8995,25 +9062,36 @@ Show Intel Memory Protection Extensions specific variables."), in the bound table.", &mpx_set_cmdlist); - gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_coff_flavour, - i386_coff_osabi_sniffer); - gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_SVR4, i386_svr4_init_abi); - gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_GO32, - i386_go32_init_abi); /* Initialize the i386-specific register groups. */ i386_init_reggroups (); - /* Initialize the standard target descriptions. */ - initialize_tdesc_i386 (); - initialize_tdesc_i386_mmx (); - initialize_tdesc_i386_avx (); - initialize_tdesc_i386_mpx (); - initialize_tdesc_i386_avx_mpx (); - initialize_tdesc_i386_avx512 (); - /* Tell remote stub that we support XML target description. */ register_remote_support_xml ("i386"); + +#if GDB_SELF_TEST + struct + { + const char *xml; + uint64_t mask; + } xml_masks[] = { + { "i386/i386.xml", X86_XSTATE_SSE_MASK }, + { "i386/i386-mmx.xml", X86_XSTATE_X87_MASK }, + { "i386/i386-avx.xml", X86_XSTATE_AVX_MASK }, + { "i386/i386-mpx.xml", X86_XSTATE_MPX_MASK }, + { "i386/i386-avx-mpx.xml", X86_XSTATE_AVX_MPX_MASK }, + { "i386/i386-avx-avx512.xml", X86_XSTATE_AVX_AVX512_MASK }, + { "i386/i386-avx-mpx-avx512-pku.xml", + X86_XSTATE_AVX_MPX_AVX512_PKU_MASK }, + }; + + for (auto &a : xml_masks) + { + auto tdesc = i386_target_description (a.mask, false); + + selftests::record_xml_tdesc (a.xml, tdesc); + } +#endif /* GDB_SELF_TEST */ }