X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Fi386-tdep.c;h=e76dcbe82a5a26f92888827cf6e5bbc4c6eb4d8e;hb=460014f572f44fe3e8deb146cb92fd312c4c3339;hp=f3862378b4f7024c497760cc7b948cb509e53506;hpb=60a1502afcd909c408239a4397b231b26c1d52c4;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c index f3862378b4..e76dcbe82a 100644 --- a/gdb/i386-tdep.c +++ b/gdb/i386-tdep.c @@ -1,8 +1,6 @@ /* Intel 386 target-dependent stuff. - Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, - 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, - 2010 Free Software Foundation, Inc. + Copyright (C) 1988-2013 Free Software Foundation, Inc. This file is part of GDB. @@ -44,17 +42,32 @@ #include "value.h" #include "dis-asm.h" #include "disasm.h" - +#include "remote.h" +#include "exceptions.h" #include "gdb_assert.h" #include "gdb_string.h" #include "i386-tdep.h" #include "i387-tdep.h" +#include "i386-xstate.h" #include "record.h" +#include "record-full.h" #include #include "features/i386/i386.c" +#include "features/i386/i386-avx.c" +#include "features/i386/i386-mmx.c" + +#include "ax.h" +#include "ax-gdb.h" + +#include "stap-probe.h" +#include "user-regs.h" +#include "cli/cli-utils.h" +#include "expression.h" +#include "parser-defs.h" +#include /* Register names. */ @@ -73,6 +86,18 @@ static const char *i386_register_names[] = "mxcsr" }; +static const char *i386_ymm_names[] = +{ + "ymm0", "ymm1", "ymm2", "ymm3", + "ymm4", "ymm5", "ymm6", "ymm7", +}; + +static const char *i386_ymmh_names[] = +{ + "ymm0h", "ymm1h", "ymm2h", "ymm3h", + "ymm4h", "ymm5h", "ymm6h", "ymm7h", +}; + /* Register names for MMX pseudo-registers. */ static const char *i386_mmx_names[] = @@ -94,7 +119,7 @@ static const char *i386_byte_names[] = static const char *i386_word_names[] = { "ax", "cx", "dx", "bx", - "sp", "bp", "si", "di" + "", "bp", "si", "di" }; /* MMX register? */ @@ -149,18 +174,47 @@ i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum) return regnum >= 0 && regnum < tdep->num_dword_regs; } +static int +i386_ymmh_regnum_p (struct gdbarch *gdbarch, int regnum) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + int ymm0h_regnum = tdep->ymm0h_regnum; + + if (ymm0h_regnum < 0) + return 0; + + regnum -= ymm0h_regnum; + return regnum >= 0 && regnum < tdep->num_ymm_regs; +} + +/* AVX register? */ + +int +i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + int ymm0_regnum = tdep->ymm0_regnum; + + if (ymm0_regnum < 0) + return 0; + + regnum -= ymm0_regnum; + return regnum >= 0 && regnum < tdep->num_ymm_regs; +} + /* SSE register? */ -static int -i386_sse_regnum_p (struct gdbarch *gdbarch, int regnum) +int +i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum) { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + int num_xmm_regs = I387_NUM_XMM_REGS (tdep); - if (I387_NUM_XMM_REGS (tdep) == 0) + if (num_xmm_regs == 0) return 0; - return (I387_XMM0_REGNUM (tdep) <= regnum - && regnum < I387_MXCSR_REGNUM (tdep)); + regnum -= I387_XMM0_REGNUM (tdep); + return regnum >= 0 && regnum < num_xmm_regs; } static int @@ -200,6 +254,19 @@ i386_fpc_regnum_p (struct gdbarch *gdbarch, int regnum) && regnum < I387_XMM0_REGNUM (tdep)); } +/* Return the name of register REGNUM, or the empty string if it is + an anonymous register. */ + +static const char * +i386_register_name (struct gdbarch *gdbarch, int regnum) +{ + /* Hide the upper YMM registers. */ + if (i386_ymmh_regnum_p (gdbarch, regnum)) + return ""; + + return tdesc_register_name (gdbarch, regnum); +} + /* Return the name of register REGNUM. */ const char * @@ -208,6 +275,8 @@ i386_pseudo_register_name (struct gdbarch *gdbarch, int regnum) struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); if (i386_mmx_regnum_p (gdbarch, regnum)) return i386_mmx_names[regnum - I387_MM0_REGNUM (tdep)]; + else if (i386_ymm_regnum_p (gdbarch, regnum)) + return i386_ymm_names[regnum - tdep->ymm0_regnum]; else if (i386_byte_regnum_p (gdbarch, regnum)) return i386_byte_names[regnum - tdep->al_regnum]; else if (i386_word_regnum_p (gdbarch, regnum)) @@ -245,7 +314,13 @@ i386_dbx_reg_to_regnum (struct gdbarch *gdbarch, int reg) else if (reg >= 21 && reg <= 28) { /* SSE registers. */ - return reg - 21 + I387_XMM0_REGNUM (tdep); + int ymm0_regnum = tdep->ymm0_regnum; + + if (ymm0_regnum >= 0 + && i386_xmm_regnum_p (gdbarch, reg)) + return reg - 21 + ymm0_regnum; + else + return reg - 21 + I387_XMM0_REGNUM (tdep); } else if (reg >= 29 && reg <= 36) { @@ -309,7 +384,7 @@ i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg) its legitimate values. */ static const char att_flavor[] = "att"; static const char intel_flavor[] = "intel"; -static const char *valid_flavors[] = +static const char *const valid_flavors[] = { att_flavor, intel_flavor, @@ -379,17 +454,17 @@ i386_skip_prefixes (gdb_byte *insn, size_t max_len) static int i386_absolute_jmp_p (const gdb_byte *insn) { - /* jmp far (absolute address in operand) */ + /* jmp far (absolute address in operand). */ if (insn[0] == 0xea) return 1; if (insn[0] == 0xff) { - /* jump near, absolute indirect (/4) */ + /* jump near, absolute indirect (/4). */ if ((insn[1] & 0x38) == 0x20) return 1; - /* jump far, absolute indirect (/5) */ + /* jump far, absolute indirect (/5). */ if ((insn[1] & 0x38) == 0x28) return 1; } @@ -400,17 +475,17 @@ i386_absolute_jmp_p (const gdb_byte *insn) static int i386_absolute_call_p (const gdb_byte *insn) { - /* call far, absolute */ + /* call far, absolute. */ if (insn[0] == 0x9a) return 1; if (insn[0] == 0xff) { - /* Call near, absolute indirect (/2) */ + /* Call near, absolute indirect (/2). */ if ((insn[1] & 0x38) == 0x10) return 1; - /* Call far, absolute indirect (/3) */ + /* Call far, absolute indirect (/3). */ if ((insn[1] & 0x38) == 0x18) return 1; } @@ -423,9 +498,9 @@ i386_ret_p (const gdb_byte *insn) { switch (insn[0]) { - case 0xc2: /* ret near, pop N bytes */ + case 0xc2: /* ret near, pop N bytes. */ case 0xc3: /* ret near */ - case 0xca: /* ret far, pop N bytes */ + case 0xca: /* ret far, pop N bytes. */ case 0xcb: /* ret far */ case 0xcf: /* iret */ return 1; @@ -441,7 +516,7 @@ i386_call_p (const gdb_byte *insn) if (i386_absolute_call_p (insn)) return 1; - /* call near, relative */ + /* call near, relative. */ if (insn[0] == 0xe8) return 1; @@ -452,9 +527,14 @@ i386_call_p (const gdb_byte *insn) length in bytes. Otherwise, return zero. */ static int -i386_syscall_p (const gdb_byte *insn, ULONGEST *lengthp) +i386_syscall_p (const gdb_byte *insn, int *lengthp) { - if (insn[0] == 0xcd) + /* Is it 'int $0x80'? */ + if ((insn[0] == 0xcd && insn[1] == 0x80) + /* Or is it 'sysenter'? */ + || (insn[0] == 0x0f && insn[1] == 0x34) + /* Or is it 'syscall'? */ + || (insn[0] == 0x0f && insn[1] == 0x05)) { *lengthp = 2; return 1; @@ -463,6 +543,43 @@ i386_syscall_p (const gdb_byte *insn, ULONGEST *lengthp) return 0; } +/* Some kernels may run one past a syscall insn, so we have to cope. + Otherwise this is just simple_displaced_step_copy_insn. */ + +struct displaced_step_closure * +i386_displaced_step_copy_insn (struct gdbarch *gdbarch, + CORE_ADDR from, CORE_ADDR to, + struct regcache *regs) +{ + size_t len = gdbarch_max_insn_length (gdbarch); + gdb_byte *buf = xmalloc (len); + + read_memory (from, buf, len); + + /* GDB may get control back after the insn after the syscall. + Presumably this is a kernel bug. + If this is a syscall, make sure there's a nop afterwards. */ + { + int syscall_length; + gdb_byte *insn; + + insn = i386_skip_prefixes (buf, len); + if (insn != NULL && i386_syscall_p (insn, &syscall_length)) + insn[syscall_length] = NOP_OPCODE; + } + + write_memory (to, buf, len); + + if (debug_displaced) + { + fprintf_unfiltered (gdb_stdlog, "displaced: copy %s->%s: ", + paddress (gdbarch, from), paddress (gdbarch, to)); + displaced_step_dump_bytes (gdb_stdlog, buf, len); + } + + return (struct displaced_step_closure *) buf; +} + /* Fix up the state of registers and memory after having single-stepped a displaced instruction. */ @@ -521,7 +638,7 @@ i386_displaced_step_fixup (struct gdbarch *gdbarch, && ! i386_ret_p (insn)) { ULONGEST orig_eip; - ULONGEST insn_len; + int insn_len; regcache_cooked_read_unsigned (regs, I386_EIP_REGNUM, &orig_eip); @@ -540,7 +657,12 @@ i386_displaced_step_fixup (struct gdbarch *gdbarch, it unrelocated. Goodness help us if there are PC-relative system calls. */ if (i386_syscall_p (insn, &insn_len) - && orig_eip != to + (insn - insn_start) + insn_len) + && orig_eip != to + (insn - insn_start) + insn_len + /* GDB can get control back after the insn after the syscall. + Presumably this is a kernel bug. + i386_displaced_step_copy_insn ensures its a nop, + we add one to the length for it. */ + && orig_eip != to + (insn - insn_start) + insn_len + 1) { if (debug_displaced) fprintf_unfiltered (gdb_stdlog, @@ -592,6 +714,93 @@ i386_displaced_step_fixup (struct gdbarch *gdbarch, paddress (gdbarch, retaddr)); } } + +static void +append_insns (CORE_ADDR *to, ULONGEST len, const gdb_byte *buf) +{ + target_write_memory (*to, buf, len); + *to += len; +} + +static void +i386_relocate_instruction (struct gdbarch *gdbarch, + CORE_ADDR *to, CORE_ADDR oldloc) +{ + enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + gdb_byte buf[I386_MAX_INSN_LEN]; + int offset = 0, rel32, newrel; + int insn_length; + gdb_byte *insn = buf; + + read_memory (oldloc, buf, I386_MAX_INSN_LEN); + + insn_length = gdb_buffered_insn_length (gdbarch, insn, + I386_MAX_INSN_LEN, oldloc); + + /* Get past the prefixes. */ + insn = i386_skip_prefixes (insn, I386_MAX_INSN_LEN); + + /* Adjust calls with 32-bit relative addresses as push/jump, with + the address pushed being the location where the original call in + the user program would return to. */ + if (insn[0] == 0xe8) + { + gdb_byte push_buf[16]; + unsigned int ret_addr; + + /* Where "ret" in the original code will return to. */ + ret_addr = oldloc + insn_length; + push_buf[0] = 0x68; /* pushq $... */ + store_unsigned_integer (&push_buf[1], 4, byte_order, ret_addr); + /* Push the push. */ + append_insns (to, 5, push_buf); + + /* Convert the relative call to a relative jump. */ + insn[0] = 0xe9; + + /* Adjust the destination offset. */ + rel32 = extract_signed_integer (insn + 1, 4, byte_order); + newrel = (oldloc - *to) + rel32; + store_signed_integer (insn + 1, 4, byte_order, newrel); + + if (debug_displaced) + fprintf_unfiltered (gdb_stdlog, + "Adjusted insn rel32=%s at %s to" + " rel32=%s at %s\n", + hex_string (rel32), paddress (gdbarch, oldloc), + hex_string (newrel), paddress (gdbarch, *to)); + + /* Write the adjusted jump into its displaced location. */ + append_insns (to, 5, insn); + return; + } + + /* Adjust jumps with 32-bit relative addresses. Calls are already + handled above. */ + if (insn[0] == 0xe9) + offset = 1; + /* Adjust conditional jumps. */ + else if (insn[0] == 0x0f && (insn[1] & 0xf0) == 0x80) + offset = 2; + + if (offset) + { + rel32 = extract_signed_integer (insn + offset, 4, byte_order); + newrel = (oldloc - *to) + rel32; + store_signed_integer (insn + offset, 4, byte_order, newrel); + if (debug_displaced) + fprintf_unfiltered (gdb_stdlog, + "Adjusted insn rel32=%s at %s to" + " rel32=%s at %s\n", + hex_string (rel32), paddress (gdbarch, oldloc), + hex_string (newrel), paddress (gdbarch, *to)); + } + + /* Write the adjusted instructions into their displaced + location. */ + append_insns (to, insn_length, buf); +} + #ifdef I386_REGNO_TO_SYMMETRY #error "The Sequent Symmetry is no longer supported." @@ -609,6 +818,7 @@ struct i386_frame_cache { /* Base address. */ CORE_ADDR base; + int base_p; LONGEST sp_offset; CORE_ADDR pc; @@ -633,6 +843,7 @@ i386_alloc_frame_cache (void) cache = FRAME_OBSTACK_ZALLOC (struct i386_frame_cache); /* Base address. */ + cache->base_p = 0; cache->base = 0; cache->sp_offset = -4; cache->pc = 0; @@ -662,7 +873,9 @@ i386_follow_jump (struct gdbarch *gdbarch, CORE_ADDR pc) long delta = 0; int data16 = 0; - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; + if (op == 0x66) { data16 = 1; @@ -728,12 +941,15 @@ i386_analyze_struct_return (CORE_ADDR pc, CORE_ADDR current_pc, if (current_pc <= pc) return pc; - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; if (op != 0x58) /* popl %eax */ return pc; - target_read_memory (pc + 1, buf, 4); + if (target_read_memory (pc + 1, buf, 4)) + return pc; + if (memcmp (buf, proto1, 3) != 0 && memcmp (buf, proto2, 4) != 0) return pc; @@ -772,7 +988,8 @@ i386_skip_probe (CORE_ADDR pc) gdb_byte buf[8]; gdb_byte op; - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; if (op == 0x68 || op == 0x6a) { @@ -923,42 +1140,90 @@ struct i386_insn gdb_byte mask[I386_MAX_MATCHED_INSN_LEN]; }; -/* Search for the instruction at PC in the list SKIP_INSNS. Return +/* Return whether instruction at PC matches PATTERN. */ + +static int +i386_match_pattern (CORE_ADDR pc, struct i386_insn pattern) +{ + gdb_byte op; + + if (target_read_memory (pc, &op, 1)) + return 0; + + if ((op & pattern.mask[0]) == pattern.insn[0]) + { + gdb_byte buf[I386_MAX_MATCHED_INSN_LEN - 1]; + int insn_matched = 1; + size_t i; + + gdb_assert (pattern.len > 1); + gdb_assert (pattern.len <= I386_MAX_MATCHED_INSN_LEN); + + if (target_read_memory (pc + 1, buf, pattern.len - 1)) + return 0; + + for (i = 1; i < pattern.len; i++) + { + if ((buf[i - 1] & pattern.mask[i]) != pattern.insn[i]) + insn_matched = 0; + } + return insn_matched; + } + return 0; +} + +/* Search for the instruction at PC in the list INSN_PATTERNS. Return the first instruction description that matches. Otherwise, return NULL. */ static struct i386_insn * -i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns) +i386_match_insn (CORE_ADDR pc, struct i386_insn *insn_patterns) { + struct i386_insn *pattern; + + for (pattern = insn_patterns; pattern->len > 0; pattern++) + { + if (i386_match_pattern (pc, *pattern)) + return pattern; + } + + return NULL; +} + +/* Return whether PC points inside a sequence of instructions that + matches INSN_PATTERNS. */ + +static int +i386_match_insn_block (CORE_ADDR pc, struct i386_insn *insn_patterns) +{ + CORE_ADDR current_pc; + int ix, i; struct i386_insn *insn; - gdb_byte op; - target_read_memory (pc, &op, 1); + insn = i386_match_insn (pc, insn_patterns); + if (insn == NULL) + return 0; - for (insn = skip_insns; insn->len > 0; insn++) + current_pc = pc; + ix = insn - insn_patterns; + for (i = ix - 1; i >= 0; i--) { - if ((op & insn->mask[0]) == insn->insn[0]) - { - gdb_byte buf[I386_MAX_MATCHED_INSN_LEN - 1]; - int insn_matched = 1; - size_t i; + current_pc -= insn_patterns[i].len; - gdb_assert (insn->len > 1); - gdb_assert (insn->len <= I386_MAX_MATCHED_INSN_LEN); + if (!i386_match_pattern (current_pc, insn_patterns[i])) + return 0; + } - target_read_memory (pc + 1, buf, insn->len - 1); - for (i = 1; i < insn->len; i++) - { - if ((buf[i - 1] & insn->mask[i]) != insn->insn[i]) - insn_matched = 0; - } + current_pc = pc + insn->len; + for (insn = insn_patterns + ix + 1; insn->len > 0; insn++) + { + if (!i386_match_pattern (current_pc, *insn)) + return 0; - if (insn_matched) - return insn; - } + current_pc += insn->len; } - return NULL; + return 1; } /* Some special instructions that might be migrated by GCC into the @@ -969,7 +1234,7 @@ i386_match_insn (CORE_ADDR pc, struct i386_insn *skip_insns) struct i386_insn i386_frame_setup_skip_insns[] = { - /* Check for `movb imm8, r' and `movl imm32, r'. + /* Check for `movb imm8, r' and `movl imm32, r'. ??? Should we handle 16-bit operand-sizes here? */ @@ -1024,7 +1289,8 @@ i386_skip_noop (CORE_ADDR pc) gdb_byte op; int check = 1; - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; while (check) { @@ -1033,7 +1299,8 @@ i386_skip_noop (CORE_ADDR pc) if (op == 0x90) { pc += 1; - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; check = 1; } /* Ignore no-op instruction `mov %edi, %edi'. @@ -1049,11 +1316,15 @@ i386_skip_noop (CORE_ADDR pc) else if (op == 0x8b) { - target_read_memory (pc + 1, &op, 1); + if (target_read_memory (pc + 1, &op, 1)) + return pc; + if (op == 0xff) { pc += 2; - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; + check = 1; } } @@ -1079,7 +1350,8 @@ i386_analyze_frame_setup (struct gdbarch *gdbarch, if (limit <= pc) return limit; - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; if (op == 0x55) /* pushl %ebp */ { @@ -1114,20 +1386,43 @@ i386_analyze_frame_setup (struct gdbarch *gdbarch, if (limit <= pc + skip) return limit; - target_read_memory (pc + skip, &op, 1); + if (target_read_memory (pc + skip, &op, 1)) + return pc + skip; + + /* The i386 prologue looks like + + push %ebp + mov %esp,%ebp + sub $0x10,%esp + + and a different prologue can be generated for atom. + + push %ebp + lea (%esp),%ebp + lea -0x10(%esp),%esp + + We handle both of them here. */ - /* Check for `movl %esp, %ebp' -- can be written in two ways. */ switch (op) { + /* Check for `movl %esp, %ebp' -- can be written in two ways. */ case 0x8b: if (read_memory_unsigned_integer (pc + skip + 1, 1, byte_order) != 0xec) return pc; + pc += (skip + 2); break; case 0x89: if (read_memory_unsigned_integer (pc + skip + 1, 1, byte_order) != 0xe5) return pc; + pc += (skip + 2); + break; + case 0x8d: /* Check for 'lea (%ebp), %ebp'. */ + if (read_memory_unsigned_integer (pc + skip + 1, 2, byte_order) + != 0x242c) + return pc; + pc += (skip + 3); break; default: return pc; @@ -1138,7 +1433,6 @@ i386_analyze_frame_setup (struct gdbarch *gdbarch, necessary. We also now commit to skipping the special instructions mentioned before. */ cache->locals = 0; - pc += (skip + 2); /* If that's all, return now. */ if (limit <= pc) @@ -1147,10 +1441,13 @@ i386_analyze_frame_setup (struct gdbarch *gdbarch, /* Check for stack adjustment subl $XXX, %esp + or + lea -XXX(%esp),%esp NOTE: You can't subtract a 16-bit immediate from a 32-bit reg, so we don't have to worry about a data16 prefix. */ - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; if (op == 0x83) { /* `subl' with 8-bit immediate. */ @@ -1174,9 +1471,18 @@ i386_analyze_frame_setup (struct gdbarch *gdbarch, cache->locals = read_memory_integer (pc + 2, 4, byte_order); return pc + 6; } + else if (op == 0x8d) + { + /* The ModR/M byte is 0x64. */ + if (read_memory_unsigned_integer (pc + 1, 1, byte_order) != 0x64) + return pc; + /* 'lea' with 8-bit displacement. */ + cache->locals = -1 * read_memory_integer (pc + 3, 1, byte_order); + return pc + 4; + } else { - /* Some instruction other than `subl'. */ + /* Some instruction other than `subl' nor 'lea'. */ return pc; } } @@ -1206,7 +1512,8 @@ i386_analyze_register_saves (CORE_ADDR pc, CORE_ADDR current_pc, offset -= cache->locals; for (i = 0; i < 8 && pc < current_pc; i++) { - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; if (op < 0x50 || op > 0x57) break; @@ -1276,7 +1583,23 @@ i386_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) CORE_ADDR pc; gdb_byte op; int i; + CORE_ADDR func_addr; + if (find_pc_partial_function (start_pc, NULL, &func_addr, NULL)) + { + CORE_ADDR post_prologue_pc + = skip_prologue_using_sal (gdbarch, func_addr); + struct symtab *s = find_pc_symtab (func_addr); + + /* Clang always emits a line note before the prologue and another + one after. We trust clang to emit usable line notes. */ + if (post_prologue_pc + && (s != NULL + && s->producer != NULL + && strncmp (s->producer, "clang ", sizeof ("clang ") - 1) == 0)) + return max (start_pc, post_prologue_pc); + } + cache.locals = -1; pc = i386_analyze_prologue (gdbarch, start_pc, 0xffffffff, &cache); if (cache.locals < 0) @@ -1299,7 +1622,9 @@ i386_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) for (i = 0; i < 6; i++) { - target_read_memory (pc + i, &op, 1); + if (target_read_memory (pc + i, &op, 1)) + return pc; + if (pic_pat[i] != op) break; } @@ -1307,7 +1632,8 @@ i386_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) { int delta = 6; - target_read_memory (pc + delta, &op, 1); + if (target_read_memory (pc + delta, &op, 1)) + return pc; if (op == 0x89) /* movl %ebx, x(%ebp) */ { @@ -1320,7 +1646,8 @@ i386_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) else /* Unexpected instruction. */ delta = 0; - target_read_memory (pc + delta, &op, 1); + if (target_read_memory (pc + delta, &op, 1)) + return pc; } /* addl y,%ebx */ @@ -1350,7 +1677,8 @@ i386_skip_main_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); gdb_byte op; - target_read_memory (pc, &op, 1); + if (target_read_memory (pc, &op, 1)) + return pc; if (op == 0xe8) { gdb_byte buf[4]; @@ -1389,20 +1717,16 @@ i386_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) /* Normal frames. */ -static struct i386_frame_cache * -i386_frame_cache (struct frame_info *this_frame, void **this_cache) +static void +i386_frame_cache_1 (struct frame_info *this_frame, + struct i386_frame_cache *cache) { struct gdbarch *gdbarch = get_frame_arch (this_frame); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); - struct i386_frame_cache *cache; gdb_byte buf[4]; int i; - if (*this_cache) - return *this_cache; - - cache = i386_alloc_frame_cache (); - *this_cache = cache; + cache->pc = get_frame_func (this_frame); /* In principle, for normal frames, %ebp holds the frame pointer, which holds the base address for the current stack frame. @@ -1416,23 +1740,18 @@ i386_frame_cache (struct frame_info *this_frame, void **this_cache) get_frame_register (this_frame, I386_EBP_REGNUM, buf); cache->base = extract_unsigned_integer (buf, 4, byte_order); if (cache->base == 0) - return cache; + { + cache->base_p = 1; + return; + } /* For normal frames, %eip is stored at 4(%ebp). */ cache->saved_regs[I386_EIP_REGNUM] = 4; - cache->pc = get_frame_func (this_frame); if (cache->pc != 0) i386_analyze_prologue (gdbarch, cache->pc, get_frame_pc (this_frame), cache); - if (cache->saved_sp_reg != -1) - { - /* Saved stack pointer has been saved. */ - get_frame_register (this_frame, cache->saved_sp_reg, buf); - cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order); - } - if (cache->locals < 0) { /* We didn't find a valid frame, which means that CACHE->base @@ -1445,6 +1764,10 @@ i386_frame_cache (struct frame_info *this_frame, void **this_cache) if (cache->saved_sp_reg != -1) { + /* Saved stack pointer has been saved. */ + get_frame_register (this_frame, cache->saved_sp_reg, buf); + cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order); + /* We're halfway aligning the stack. */ cache->base = ((cache->saved_sp - 4) & 0xfffffff0) - 4; cache->saved_regs[I386_EIP_REGNUM] = cache->saved_sp - 4; @@ -1472,9 +1795,18 @@ i386_frame_cache (struct frame_info *this_frame, void **this_cache) cache->saved_regs[I386_EBP_REGNUM] = 0; } + if (cache->saved_sp_reg != -1) + { + /* Saved stack pointer has been saved (but the SAVED_SP_REG + register may be unavailable). */ + if (cache->saved_sp == 0 + && deprecated_frame_register_read (this_frame, + cache->saved_sp_reg, buf)) + cache->saved_sp = extract_unsigned_integer (buf, 4, byte_order); + } /* Now that we have the base address for the stack frame we can calculate the value of %esp in the calling frame. */ - if (cache->saved_sp == 0) + else if (cache->saved_sp == 0) cache->saved_sp = cache->base + 8; /* Adjust all the saved registers such that they contain addresses @@ -1483,6 +1815,28 @@ i386_frame_cache (struct frame_info *this_frame, void **this_cache) if (cache->saved_regs[i] != -1) cache->saved_regs[i] += cache->base; + cache->base_p = 1; +} + +static struct i386_frame_cache * +i386_frame_cache (struct frame_info *this_frame, void **this_cache) +{ + volatile struct gdb_exception ex; + struct i386_frame_cache *cache; + + if (*this_cache) + return *this_cache; + + cache = i386_alloc_frame_cache (); + *this_cache = cache; + + TRY_CATCH (ex, RETURN_MASK_ERROR) + { + i386_frame_cache_1 (this_frame, cache); + } + if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR) + throw_exception (ex); + return cache; } @@ -1500,6 +1854,22 @@ i386_frame_this_id (struct frame_info *this_frame, void **this_cache, (*this_id) = frame_id_build (cache->base + 8, cache->pc); } +static enum unwind_stop_reason +i386_frame_unwind_stop_reason (struct frame_info *this_frame, + void **this_cache) +{ + struct i386_frame_cache *cache = i386_frame_cache (this_frame, this_cache); + + if (!cache->base_p) + return UNWIND_UNAVAILABLE; + + /* This marks the outermost frame. */ + if (cache->base == 0) + return UNWIND_OUTERMOST; + + return UNWIND_NO_REASON; +} + static struct value * i386_frame_prev_register (struct frame_info *this_frame, void **this_cache, int regnum) @@ -1539,8 +1909,19 @@ i386_frame_prev_register (struct frame_info *this_frame, void **this_cache, if (regnum == I386_EIP_REGNUM && cache->pc_in_eax) return frame_unwind_got_register (this_frame, regnum, I386_EAX_REGNUM); - if (regnum == I386_ESP_REGNUM && cache->saved_sp) - return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); + if (regnum == I386_ESP_REGNUM + && (cache->saved_sp != 0 || cache->saved_sp_reg != -1)) + { + /* If the SP has been saved, but we don't know where, then this + means that SAVED_SP_REG register was found unavailable back + when we built the cache. */ + if (cache->saved_sp == 0) + return frame_unwind_got_register (this_frame, regnum, + cache->saved_sp_reg); + else + return frame_unwind_got_constant (this_frame, regnum, + cache->saved_sp); + } if (regnum < I386_NUM_SAVED_REGS && cache->saved_regs[regnum] != -1) return frame_unwind_got_memory (this_frame, regnum, @@ -1552,6 +1933,7 @@ i386_frame_prev_register (struct frame_info *this_frame, void **this_cache, static const struct frame_unwind i386_frame_unwind = { NORMAL_FRAME, + i386_frame_unwind_stop_reason, i386_frame_this_id, i386_frame_prev_register, NULL, @@ -1568,6 +1950,11 @@ static int i386_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) { gdb_byte insn; + struct symtab *symtab; + + symtab = find_pc_symtab (pc); + if (symtab && symtab->epilogue_unwind_valid) + return 0; if (target_read_memory (pc, &insn, 1)) return 0; /* Can't read memory at pc. */ @@ -1593,10 +1980,9 @@ i386_epilogue_frame_sniffer (const struct frame_unwind *self, static struct i386_frame_cache * i386_epilogue_frame_cache (struct frame_info *this_frame, void **this_cache) { - struct gdbarch *gdbarch = get_frame_arch (this_frame); - enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + volatile struct gdb_exception ex; struct i386_frame_cache *cache; - gdb_byte buf[4]; + CORE_ADDR sp; if (*this_cache) return *this_cache; @@ -1604,44 +1990,172 @@ i386_epilogue_frame_cache (struct frame_info *this_frame, void **this_cache) cache = i386_alloc_frame_cache (); *this_cache = cache; - /* Cache base will be %esp plus cache->sp_offset (-4). */ - get_frame_register (this_frame, I386_ESP_REGNUM, buf); - cache->base = extract_unsigned_integer (buf, 4, - byte_order) + cache->sp_offset; - - /* Cache pc will be the frame func. */ - cache->pc = get_frame_pc (this_frame); + TRY_CATCH (ex, RETURN_MASK_ERROR) + { + cache->pc = get_frame_func (this_frame); - /* The saved %esp will be at cache->base plus 8. */ - cache->saved_sp = cache->base + 8; + /* At this point the stack looks as if we just entered the + function, with the return address at the top of the + stack. */ + sp = get_frame_register_unsigned (this_frame, I386_ESP_REGNUM); + cache->base = sp + cache->sp_offset; + cache->saved_sp = cache->base + 8; + cache->saved_regs[I386_EIP_REGNUM] = cache->base + 4; - /* The saved %eip will be at cache->base plus 4. */ - cache->saved_regs[I386_EIP_REGNUM] = cache->base + 4; + cache->base_p = 1; + } + if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR) + throw_exception (ex); return cache; } +static enum unwind_stop_reason +i386_epilogue_frame_unwind_stop_reason (struct frame_info *this_frame, + void **this_cache) +{ + struct i386_frame_cache *cache = + i386_epilogue_frame_cache (this_frame, this_cache); + + if (!cache->base_p) + return UNWIND_UNAVAILABLE; + + return UNWIND_NO_REASON; +} + static void i386_epilogue_frame_this_id (struct frame_info *this_frame, void **this_cache, struct frame_id *this_id) { - struct i386_frame_cache *cache = i386_epilogue_frame_cache (this_frame, - this_cache); + struct i386_frame_cache *cache = + i386_epilogue_frame_cache (this_frame, this_cache); + + if (!cache->base_p) + return; (*this_id) = frame_id_build (cache->base + 8, cache->pc); } +static struct value * +i386_epilogue_frame_prev_register (struct frame_info *this_frame, + void **this_cache, int regnum) +{ + /* Make sure we've initialized the cache. */ + i386_epilogue_frame_cache (this_frame, this_cache); + + return i386_frame_prev_register (this_frame, this_cache, regnum); +} + static const struct frame_unwind i386_epilogue_frame_unwind = { NORMAL_FRAME, + i386_epilogue_frame_unwind_stop_reason, i386_epilogue_frame_this_id, - i386_frame_prev_register, + i386_epilogue_frame_prev_register, NULL, i386_epilogue_frame_sniffer }; +/* Stack-based trampolines. */ + +/* These trampolines are used on cross x86 targets, when taking the + address of a nested function. When executing these trampolines, + no stack frame is set up, so we are in a similar situation as in + epilogues and i386_epilogue_frame_this_id can be re-used. */ + +/* Static chain passed in register. */ + +struct i386_insn i386_tramp_chain_in_reg_insns[] = +{ + /* `movl imm32, %eax' and `movl imm32, %ecx' */ + { 5, { 0xb8 }, { 0xfe } }, + + /* `jmp imm32' */ + { 5, { 0xe9 }, { 0xff } }, + + {0} +}; + +/* Static chain passed on stack (when regparm=3). */ + +struct i386_insn i386_tramp_chain_on_stack_insns[] = +{ + /* `push imm32' */ + { 5, { 0x68 }, { 0xff } }, + + /* `jmp imm32' */ + { 5, { 0xe9 }, { 0xff } }, + + {0} +}; + +/* Return whether PC points inside a stack trampoline. */ + +static int +i386_in_stack_tramp_p (struct gdbarch *gdbarch, CORE_ADDR pc) +{ + gdb_byte insn; + const char *name; + + /* A stack trampoline is detected if no name is associated + to the current pc and if it points inside a trampoline + sequence. */ + + find_pc_partial_function (pc, &name, NULL, NULL); + if (name) + return 0; + + if (target_read_memory (pc, &insn, 1)) + return 0; + + if (!i386_match_insn_block (pc, i386_tramp_chain_in_reg_insns) + && !i386_match_insn_block (pc, i386_tramp_chain_on_stack_insns)) + return 0; + + return 1; +} + +static int +i386_stack_tramp_frame_sniffer (const struct frame_unwind *self, + struct frame_info *this_frame, + void **this_cache) +{ + if (frame_relative_level (this_frame) == 0) + return i386_in_stack_tramp_p (get_frame_arch (this_frame), + get_frame_pc (this_frame)); + else + return 0; +} + +static const struct frame_unwind i386_stack_tramp_frame_unwind = +{ + NORMAL_FRAME, + i386_epilogue_frame_unwind_stop_reason, + i386_epilogue_frame_this_id, + i386_epilogue_frame_prev_register, + NULL, + i386_stack_tramp_frame_sniffer +}; + +/* Generate a bytecode expression to get the value of the saved PC. */ + +static void +i386_gen_return_address (struct gdbarch *gdbarch, + struct agent_expr *ax, struct axs_value *value, + CORE_ADDR scope) +{ + /* The following sequence assumes the traditional use of the base + register. */ + ax_reg (ax, I386_EBP_REGNUM); + ax_const_l (ax, 4); + ax_simple (ax, aop_add); + value->type = register_type (gdbarch, I386_EIP_REGNUM); + value->kind = axs_lvalue_memory; +} + + /* Signal trampolines. */ static struct i386_frame_cache * @@ -1650,6 +2164,7 @@ i386_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache) struct gdbarch *gdbarch = get_frame_arch (this_frame); struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); + volatile struct gdb_exception ex; struct i386_frame_cache *cache; CORE_ADDR addr; gdb_byte buf[4]; @@ -1659,30 +2174,50 @@ i386_sigtramp_frame_cache (struct frame_info *this_frame, void **this_cache) cache = i386_alloc_frame_cache (); - get_frame_register (this_frame, I386_ESP_REGNUM, buf); - cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4; - - addr = tdep->sigcontext_addr (this_frame); - if (tdep->sc_reg_offset) + TRY_CATCH (ex, RETURN_MASK_ERROR) { - int i; + get_frame_register (this_frame, I386_ESP_REGNUM, buf); + cache->base = extract_unsigned_integer (buf, 4, byte_order) - 4; - gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); + addr = tdep->sigcontext_addr (this_frame); + if (tdep->sc_reg_offset) + { + int i; - for (i = 0; i < tdep->sc_num_regs; i++) - if (tdep->sc_reg_offset[i] != -1) - cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; - } - else - { - cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; - cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; + gdb_assert (tdep->sc_num_regs <= I386_NUM_SAVED_REGS); + + for (i = 0; i < tdep->sc_num_regs; i++) + if (tdep->sc_reg_offset[i] != -1) + cache->saved_regs[i] = addr + tdep->sc_reg_offset[i]; + } + else + { + cache->saved_regs[I386_EIP_REGNUM] = addr + tdep->sc_pc_offset; + cache->saved_regs[I386_ESP_REGNUM] = addr + tdep->sc_sp_offset; + } + + cache->base_p = 1; } + if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR) + throw_exception (ex); *this_cache = cache; return cache; } +static enum unwind_stop_reason +i386_sigtramp_frame_unwind_stop_reason (struct frame_info *this_frame, + void **this_cache) +{ + struct i386_frame_cache *cache = + i386_sigtramp_frame_cache (this_frame, this_cache); + + if (!cache->base_p) + return UNWIND_UNAVAILABLE; + + return UNWIND_NO_REASON; +} + static void i386_sigtramp_frame_this_id (struct frame_info *this_frame, void **this_cache, struct frame_id *this_id) @@ -1690,6 +2225,9 @@ i386_sigtramp_frame_this_id (struct frame_info *this_frame, void **this_cache, struct i386_frame_cache *cache = i386_sigtramp_frame_cache (this_frame, this_cache); + if (!cache->base_p) + return; + /* See the end of i386_push_dummy_call. */ (*this_id) = frame_id_build (cache->base + 8, get_frame_pc (this_frame)); } @@ -1737,6 +2275,7 @@ i386_sigtramp_frame_sniffer (const struct frame_unwind *self, static const struct frame_unwind i386_sigtramp_frame_unwind = { SIGTRAMP_FRAME, + i386_sigtramp_frame_unwind_stop_reason, i386_sigtramp_frame_this_id, i386_sigtramp_frame_prev_register, NULL, @@ -1770,6 +2309,15 @@ i386_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) /* See the end of i386_push_dummy_call. */ return frame_id_build (fp + 8, get_frame_pc (this_frame)); } + +/* _Decimal128 function return values need 16-byte alignment on the + stack. */ + +static CORE_ADDR +i386_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) +{ + return sp & -(CORE_ADDR)16; +} /* Figure out where the longjmp will land. Slurp the args out of the @@ -1834,6 +2382,22 @@ i386_16_byte_align_p (struct type *type) return 0; } +/* Implementation for set_gdbarch_push_dummy_code. */ + +static CORE_ADDR +i386_push_dummy_code (struct gdbarch *gdbarch, CORE_ADDR sp, CORE_ADDR funaddr, + struct value **args, int nargs, struct type *value_type, + CORE_ADDR *real_pc, CORE_ADDR *bp_addr, + struct regcache *regcache) +{ + /* Use 0xcc breakpoint - 1 byte. */ + *bp_addr = sp - 1; + *real_pc = funaddr; + + /* Keep the stack aligned. */ + return sp - 16; +} + static CORE_ADDR i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, @@ -1853,7 +2417,6 @@ i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function, for (write_pass = 0; write_pass < 2; write_pass++) { int args_space_used = 0; - int have_16_byte_aligned_arg = 0; if (struct_return) { @@ -1891,19 +2454,20 @@ i386_push_dummy_call (struct gdbarch *gdbarch, struct value *function, else { if (i386_16_byte_align_p (value_enclosing_type (args[i]))) - { - args_space = align_up (args_space, 16); - have_16_byte_aligned_arg = 1; - } + args_space = align_up (args_space, 16); args_space += align_up (len, 4); } } if (!write_pass) { - if (have_16_byte_aligned_arg) - args_space = align_up (args_space, 16); sp -= args_space; + + /* The original System V ABI only requires word alignment, + but modern incarnations need 16-byte alignment in order + to support SSE. Since wasting a few bytes here isn't + harmful we unconditionally enforce 16-byte alignment. */ + sp &= ~0xf; } } @@ -1983,7 +2547,8 @@ i386_extract_return_value (struct gdbarch *gdbarch, struct type *type, } else internal_error (__FILE__, __LINE__, - _("Cannot extract return value of %d bytes long."), len); + _("Cannot extract return value of %d bytes long."), + len); } } @@ -2057,7 +2622,7 @@ i386_store_return_value (struct gdbarch *gdbarch, struct type *type, static const char default_struct_convention[] = "default"; static const char pcc_struct_convention[] = "pcc"; static const char reg_struct_convention[] = "reg"; -static const char *valid_conventions[] = +static const char *const valid_conventions[] = { default_struct_convention, pcc_struct_convention, @@ -2105,7 +2670,7 @@ i386_reg_struct_return_p (struct gdbarch *gdbarch, struct type *type) from WRITEBUF into REGCACHE. */ static enum return_value_convention -i386_return_value (struct gdbarch *gdbarch, struct type *func_type, +i386_return_value (struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf) { @@ -2115,6 +2680,9 @@ i386_return_value (struct gdbarch *gdbarch, struct type *func_type, || code == TYPE_CODE_UNION || code == TYPE_CODE_ARRAY) && !i386_reg_struct_return_p (gdbarch, type)) + /* Complex double and long double uses the struct return covention. */ + || (code == TYPE_CODE_COMPLEX && TYPE_LENGTH (type) == 16) + || (code == TYPE_CODE_COMPLEX && TYPE_LENGTH (type) == 24) /* 128-bit decimal float uses the struct return convention. */ || (code == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 16)) { @@ -2156,7 +2724,7 @@ i386_return_value (struct gdbarch *gdbarch, struct type *func_type, if (code == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) { type = check_typedef (TYPE_FIELD_TYPE (type, 0)); - return i386_return_value (gdbarch, func_type, type, regcache, + return i386_return_value (gdbarch, function, type, regcache, readbuf, writebuf); } @@ -2183,6 +2751,59 @@ i387_ext_type (struct gdbarch *gdbarch) return tdep->i387_ext_type; } +/* Construct vector type for pseudo YMM registers. We can't use + tdesc_find_type since YMM isn't described in target description. */ + +static struct type * +i386_ymm_type (struct gdbarch *gdbarch) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + + if (!tdep->i386_ymm_type) + { + const struct builtin_type *bt = builtin_type (gdbarch); + + /* The type we're building is this: */ +#if 0 + union __gdb_builtin_type_vec256i + { + int128_t uint128[2]; + int64_t v2_int64[4]; + int32_t v4_int32[8]; + int16_t v8_int16[16]; + int8_t v16_int8[32]; + double v2_double[4]; + float v4_float[8]; + }; +#endif + + struct type *t; + + t = arch_composite_type (gdbarch, + "__gdb_builtin_type_vec256i", TYPE_CODE_UNION); + append_composite_type_field (t, "v8_float", + init_vector_type (bt->builtin_float, 8)); + append_composite_type_field (t, "v4_double", + init_vector_type (bt->builtin_double, 4)); + append_composite_type_field (t, "v32_int8", + init_vector_type (bt->builtin_int8, 32)); + append_composite_type_field (t, "v16_int16", + init_vector_type (bt->builtin_int16, 16)); + append_composite_type_field (t, "v8_int32", + init_vector_type (bt->builtin_int32, 8)); + append_composite_type_field (t, "v4_int64", + init_vector_type (bt->builtin_int64, 4)); + append_composite_type_field (t, "v2_int128", + init_vector_type (bt->builtin_int128, 2)); + + TYPE_VECTOR (t) = 1; + TYPE_NAME (t) = "builtin_type_vec256i"; + tdep->i386_ymm_type = t; + } + + return tdep->i386_ymm_type; +} + /* Construct vector type for MMX registers. */ static struct type * i386_mmx_type (struct gdbarch *gdbarch) @@ -2226,13 +2847,15 @@ i386_mmx_type (struct gdbarch *gdbarch) } /* Return the GDB type object for the "standard" data type of data in - register REGNUM. */ + register REGNUM. */ -static struct type * +struct type * i386_pseudo_register_type (struct gdbarch *gdbarch, int regnum) { if (i386_mmx_regnum_p (gdbarch, regnum)) return i386_mmx_type (gdbarch); + else if (i386_ymm_regnum_p (gdbarch, regnum)) + return i386_ymm_type (gdbarch); else { const struct builtin_type *bt = builtin_type (gdbarch); @@ -2266,31 +2889,68 @@ i386_mmx_regnum_to_fp_regnum (struct regcache *regcache, int regnum) return (I387_ST0_REGNUM (tdep) + fpreg); } +/* A helper function for us by i386_pseudo_register_read_value and + amd64_pseudo_register_read_value. It does all the work but reads + the data into an already-allocated value. */ + void -i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, - int regnum, gdb_byte *buf) +i386_pseudo_register_read_into_value (struct gdbarch *gdbarch, + struct regcache *regcache, + int regnum, + struct value *result_value) { gdb_byte raw_buf[MAX_REGISTER_SIZE]; + enum register_status status; + gdb_byte *buf = value_contents_raw (result_value); if (i386_mmx_regnum_p (gdbarch, regnum)) { int fpnum = i386_mmx_regnum_to_fp_regnum (regcache, regnum); /* Extract (always little endian). */ - regcache_raw_read (regcache, fpnum, raw_buf); - memcpy (buf, raw_buf, register_size (gdbarch, regnum)); + status = regcache_raw_read (regcache, fpnum, raw_buf); + if (status != REG_VALID) + mark_value_bytes_unavailable (result_value, 0, + TYPE_LENGTH (value_type (result_value))); + else + memcpy (buf, raw_buf, register_size (gdbarch, regnum)); } else { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - if (i386_word_regnum_p (gdbarch, regnum)) + if (i386_ymm_regnum_p (gdbarch, regnum)) + { + regnum -= tdep->ymm0_regnum; + + /* Extract (always little endian). Read lower 128bits. */ + status = regcache_raw_read (regcache, + I387_XMM0_REGNUM (tdep) + regnum, + raw_buf); + if (status != REG_VALID) + mark_value_bytes_unavailable (result_value, 0, 16); + else + memcpy (buf, raw_buf, 16); + /* Read upper 128bits. */ + status = regcache_raw_read (regcache, + tdep->ymm0h_regnum + regnum, + raw_buf); + if (status != REG_VALID) + mark_value_bytes_unavailable (result_value, 16, 32); + else + memcpy (buf + 16, raw_buf, 16); + } + else if (i386_word_regnum_p (gdbarch, regnum)) { int gpnum = regnum - tdep->ax_regnum; /* Extract (always little endian). */ - regcache_raw_read (regcache, gpnum, raw_buf); - memcpy (buf, raw_buf, 2); + status = regcache_raw_read (regcache, gpnum, raw_buf); + if (status != REG_VALID) + mark_value_bytes_unavailable (result_value, 0, + TYPE_LENGTH (value_type (result_value))); + else + memcpy (buf, raw_buf, 2); } else if (i386_byte_regnum_p (gdbarch, regnum)) { @@ -2301,8 +2961,11 @@ i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, /* Extract (always little endian). We read both lower and upper registers. */ - regcache_raw_read (regcache, gpnum % 4, raw_buf); - if (gpnum >= 4) + status = regcache_raw_read (regcache, gpnum % 4, raw_buf); + if (status != REG_VALID) + mark_value_bytes_unavailable (result_value, 0, + TYPE_LENGTH (value_type (result_value))); + else if (gpnum >= 4) memcpy (buf, raw_buf + 1, 1); else memcpy (buf, raw_buf, 1); @@ -2312,6 +2975,22 @@ i386_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, } } +static struct value * +i386_pseudo_register_read_value (struct gdbarch *gdbarch, + struct regcache *regcache, + int regnum) +{ + struct value *result; + + result = allocate_value (register_type (gdbarch, regnum)); + VALUE_LVAL (result) = lval_register; + VALUE_REGNUM (result) = regnum; + + i386_pseudo_register_read_into_value (gdbarch, regcache, regnum, result); + + return result; +} + void i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf) @@ -2333,7 +3012,20 @@ i386_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, { struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - if (i386_word_regnum_p (gdbarch, regnum)) + if (i386_ymm_regnum_p (gdbarch, regnum)) + { + regnum -= tdep->ymm0_regnum; + + /* ... Write lower 128bits. */ + regcache_raw_write (regcache, + I387_XMM0_REGNUM (tdep) + regnum, + buf); + /* ... Write upper 128bits. */ + regcache_raw_write (regcache, + tdep->ymm0h_regnum + regnum, + buf + 16); + } + else if (i386_word_regnum_p (gdbarch, regnum)) { int gpnum = regnum - tdep->ax_regnum; @@ -2400,7 +3092,8 @@ i386_next_regnum (int regnum) needs any special handling. */ static int -i386_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type) +i386_convert_register_p (struct gdbarch *gdbarch, + int regnum, struct type *type) { int len = TYPE_LENGTH (type); @@ -2429,21 +3122,17 @@ i386_convert_register_p (struct gdbarch *gdbarch, int regnum, struct type *type) /* Read a value of type TYPE from register REGNUM in frame FRAME, and return its contents in TO. */ -static void +static int i386_register_to_value (struct frame_info *frame, int regnum, - struct type *type, gdb_byte *to) + struct type *type, gdb_byte *to, + int *optimizedp, int *unavailablep) { struct gdbarch *gdbarch = get_frame_arch (frame); int len = TYPE_LENGTH (type); - /* FIXME: kettenis/20030609: What should we do if REGNUM isn't - available in FRAME (i.e. if it wasn't saved)? */ - if (i386_fp_regnum_p (gdbarch, regnum)) - { - i387_register_to_value (frame, regnum, type, to); - return; - } + return i387_register_to_value (frame, regnum, type, to, + optimizedp, unavailablep); /* Read a value spread across multiple registers. */ @@ -2454,11 +3143,18 @@ i386_register_to_value (struct frame_info *frame, int regnum, gdb_assert (regnum != -1); gdb_assert (register_size (gdbarch, regnum) == 4); - get_frame_register (frame, regnum, to); + if (!get_frame_register_bytes (frame, regnum, 0, + register_size (gdbarch, regnum), + to, optimizedp, unavailablep)) + return 0; + regnum = i386_next_regnum (regnum); len -= 4; to += 4; } + + *optimizedp = *unavailablep = 0; + return 1; } /* Write the contents FROM of a value of type TYPE into register @@ -2580,6 +3276,26 @@ i386_collect_fpregset (const struct regset *regset, i387_collect_fsave (regcache, regnum, fpregs); } +/* Similar to i386_supply_fpregset, but use XSAVE extended state. */ + +static void +i386_supply_xstateregset (const struct regset *regset, + struct regcache *regcache, int regnum, + const void *xstateregs, size_t len) +{ + i387_supply_xsave (regcache, regnum, xstateregs); +} + +/* Similar to i386_collect_fpregset , but use XSAVE extended state. */ + +static void +i386_collect_xstateregset (const struct regset *regset, + const struct regcache *regcache, + int regnum, void *xstateregs, size_t len) +{ + i387_collect_xsave (regcache, regnum, xstateregs, 1); +} + /* Return the appropriate register set for the core section identified by SECT_NAME and SECT_SIZE. */ @@ -2607,6 +3323,16 @@ i386_regset_from_core_section (struct gdbarch *gdbarch, return tdep->fpregset; } + if (strcmp (sect_name, ".reg-xstate") == 0) + { + if (tdep->xstateregset == NULL) + tdep->xstateregset = regset_alloc (gdbarch, + i386_supply_xstateregset, + i386_collect_xstateregset); + + return tdep->xstateregset; + } + return NULL; } @@ -2627,7 +3353,7 @@ i386_pe_skip_trampoline_code (struct frame_info *frame, read_memory_unsigned_integer (pc + 2, 4, byte_order); struct minimal_symbol *indsym = indirect ? lookup_minimal_symbol_by_pc (indirect) : 0; - char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; + const char *symname = indsym ? SYMBOL_LINKAGE_NAME (indsym) : 0; if (symname) { @@ -2648,7 +3374,7 @@ int i386_sigtramp_p (struct frame_info *this_frame) { CORE_ADDR pc = get_frame_pc (this_frame); - char *name; + const char *name; find_pc_partial_function (pc, &name, NULL, NULL); return (name && strcmp ("_sigtramp", name) == 0); @@ -2686,13 +3412,11 @@ static int i386_svr4_sigtramp_p (struct frame_info *this_frame) { CORE_ADDR pc = get_frame_pc (this_frame); - char *name; + const char *name; - /* UnixWare uses _sigacthandler. The origin of the other symbols is - currently unknown. */ + /* The origin of these symbols is currently unknown. */ find_pc_partial_function (pc, &name, NULL, NULL); return (name && (strcmp ("_sigreturn", name) == 0 - || strcmp ("_sigacthandler", name) == 0 || strcmp ("sigvechandler", name) == 0)); } @@ -2712,6 +3436,335 @@ i386_svr4_sigcontext_addr (struct frame_info *this_frame) return read_memory_unsigned_integer (sp + 8, 4, byte_order); } + + + +/* Implementation of `gdbarch_stap_is_single_operand', as defined in + gdbarch.h. */ + +int +i386_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) +{ + return (*s == '$' /* Literal number. */ + || (isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement. */ + || (*s == '(' && s[1] == '%') /* Register indirection. */ + || (*s == '%' && isalpha (s[1]))); /* Register access. */ +} + +/* Implementation of `gdbarch_stap_parse_special_token', as defined in + gdbarch.h. */ + +int +i386_stap_parse_special_token (struct gdbarch *gdbarch, + struct stap_parse_info *p) +{ + /* In order to parse special tokens, we use a state-machine that go + through every known token and try to get a match. */ + enum + { + TRIPLET, + THREE_ARG_DISPLACEMENT, + DONE + } current_state; + + current_state = TRIPLET; + + /* The special tokens to be parsed here are: + + - `register base + (register index * size) + offset', as represented + in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'. + + - Operands of the form `-8+3+1(%rbp)', which must be interpreted as + `*(-8 + 3 - 1 + (void *) $eax)'. */ + + while (current_state != DONE) + { + const char *s = p->arg; + + switch (current_state) + { + case TRIPLET: + { + if (isdigit (*s) || *s == '-' || *s == '+') + { + int got_minus[3]; + int i; + long displacements[3]; + const char *start; + char *regname; + int len; + struct stoken str; + char *endp; + + got_minus[0] = 0; + if (*s == '+') + ++s; + else if (*s == '-') + { + ++s; + got_minus[0] = 1; + } + + displacements[0] = strtol (s, &endp, 10); + s = endp; + + if (*s != '+' && *s != '-') + { + /* We are not dealing with a triplet. */ + break; + } + + got_minus[1] = 0; + if (*s == '+') + ++s; + else + { + ++s; + got_minus[1] = 1; + } + + displacements[1] = strtol (s, &endp, 10); + s = endp; + + if (*s != '+' && *s != '-') + { + /* We are not dealing with a triplet. */ + break; + } + + got_minus[2] = 0; + if (*s == '+') + ++s; + else + { + ++s; + got_minus[2] = 1; + } + + displacements[2] = strtol (s, &endp, 10); + s = endp; + + if (*s != '(' || s[1] != '%') + break; + + s += 2; + start = s; + + while (isalnum (*s)) + ++s; + + if (*s++ != ')') + break; + + len = s - start; + regname = alloca (len + 1); + + strncpy (regname, start, len); + regname[len] = '\0'; + + if (user_reg_map_name_to_regnum (gdbarch, + regname, len) == -1) + error (_("Invalid register name `%s' " + "on expression `%s'."), + regname, p->saved_arg); + + for (i = 0; i < 3; i++) + { + write_exp_elt_opcode (OP_LONG); + write_exp_elt_type + (builtin_type (gdbarch)->builtin_long); + write_exp_elt_longcst (displacements[i]); + write_exp_elt_opcode (OP_LONG); + if (got_minus[i]) + write_exp_elt_opcode (UNOP_NEG); + } + + write_exp_elt_opcode (OP_REGISTER); + str.ptr = regname; + str.length = len; + write_exp_string (str); + write_exp_elt_opcode (OP_REGISTER); + + write_exp_elt_opcode (UNOP_CAST); + write_exp_elt_type (builtin_type (gdbarch)->builtin_data_ptr); + write_exp_elt_opcode (UNOP_CAST); + + write_exp_elt_opcode (BINOP_ADD); + write_exp_elt_opcode (BINOP_ADD); + write_exp_elt_opcode (BINOP_ADD); + + write_exp_elt_opcode (UNOP_CAST); + write_exp_elt_type (lookup_pointer_type (p->arg_type)); + write_exp_elt_opcode (UNOP_CAST); + + write_exp_elt_opcode (UNOP_IND); + + p->arg = s; + + return 1; + } + break; + } + case THREE_ARG_DISPLACEMENT: + { + if (isdigit (*s) || *s == '(' || *s == '-' || *s == '+') + { + int offset_minus = 0; + long offset = 0; + int size_minus = 0; + long size = 0; + const char *start; + char *base; + int len_base; + char *index; + int len_index; + struct stoken base_token, index_token; + + if (*s == '+') + ++s; + else if (*s == '-') + { + ++s; + offset_minus = 1; + } + + if (offset_minus && !isdigit (*s)) + break; + + if (isdigit (*s)) + { + char *endp; + + offset = strtol (s, &endp, 10); + s = endp; + } + + if (*s != '(' || s[1] != '%') + break; + + s += 2; + start = s; + + while (isalnum (*s)) + ++s; + + if (*s != ',' || s[1] != '%') + break; + + len_base = s - start; + base = alloca (len_base + 1); + strncpy (base, start, len_base); + base[len_base] = '\0'; + + if (user_reg_map_name_to_regnum (gdbarch, + base, len_base) == -1) + error (_("Invalid register name `%s' " + "on expression `%s'."), + base, p->saved_arg); + + s += 2; + start = s; + + while (isalnum (*s)) + ++s; + + len_index = s - start; + index = alloca (len_index + 1); + strncpy (index, start, len_index); + index[len_index] = '\0'; + + if (user_reg_map_name_to_regnum (gdbarch, + index, len_index) == -1) + error (_("Invalid register name `%s' " + "on expression `%s'."), + index, p->saved_arg); + + if (*s != ',' && *s != ')') + break; + + if (*s == ',') + { + char *endp; + + ++s; + if (*s == '+') + ++s; + else if (*s == '-') + { + ++s; + size_minus = 1; + } + + size = strtol (s, &endp, 10); + s = endp; + + if (*s != ')') + break; + } + + ++s; + + if (offset) + { + write_exp_elt_opcode (OP_LONG); + write_exp_elt_type + (builtin_type (gdbarch)->builtin_long); + write_exp_elt_longcst (offset); + write_exp_elt_opcode (OP_LONG); + if (offset_minus) + write_exp_elt_opcode (UNOP_NEG); + } + + write_exp_elt_opcode (OP_REGISTER); + base_token.ptr = base; + base_token.length = len_base; + write_exp_string (base_token); + write_exp_elt_opcode (OP_REGISTER); + + if (offset) + write_exp_elt_opcode (BINOP_ADD); + + write_exp_elt_opcode (OP_REGISTER); + index_token.ptr = index; + index_token.length = len_index; + write_exp_string (index_token); + write_exp_elt_opcode (OP_REGISTER); + + if (size) + { + write_exp_elt_opcode (OP_LONG); + write_exp_elt_type + (builtin_type (gdbarch)->builtin_long); + write_exp_elt_longcst (size); + write_exp_elt_opcode (OP_LONG); + if (size_minus) + write_exp_elt_opcode (UNOP_NEG); + write_exp_elt_opcode (BINOP_MUL); + } + + write_exp_elt_opcode (BINOP_ADD); + + write_exp_elt_opcode (UNOP_CAST); + write_exp_elt_type (lookup_pointer_type (p->arg_type)); + write_exp_elt_opcode (UNOP_CAST); + + write_exp_elt_opcode (UNOP_IND); + + p->arg = s; + + return 1; + } + break; + } + } + + /* Advancing to the next state. */ + ++current_state; + } + + return 0; +} + /* Generic ELF. */ @@ -2721,6 +3774,16 @@ i386_elf_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) { /* We typically use stabs-in-ELF with the SVR4 register numbering. */ set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum); + + /* Registering SystemTap handlers. */ + set_gdbarch_stap_integer_prefix (gdbarch, "$"); + set_gdbarch_stap_register_prefix (gdbarch, "%"); + set_gdbarch_stap_register_indirection_prefix (gdbarch, "("); + set_gdbarch_stap_register_indirection_suffix (gdbarch, ")"); + set_gdbarch_stap_is_single_operand (gdbarch, + i386_stap_is_single_operand); + set_gdbarch_stap_parse_special_token (gdbarch, + i386_stap_parse_special_token); } /* System V Release 4 (SVR4). */ @@ -2757,8 +3820,8 @@ i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) tdep->jb_pc_offset = 36; /* DJGPP does not support the SSE registers. */ - tdep->num_xmm_regs = 0; - set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I387_NUM_REGS); + if (! tdesc_has_registers (info.target_desc)) + tdep->tdesc = tdesc_i386_mmx; /* Native compiler is GCC, which uses the SVR4 register numbering even in COFF and STABS. See the comment in i386_gdbarch_init, @@ -2766,6 +3829,8 @@ i386_go32_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) set_gdbarch_sdb_reg_to_regnum. */ set_gdbarch_stab_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum); set_gdbarch_sdb_reg_to_regnum (gdbarch, i386_svr4_reg_to_regnum); + + set_gdbarch_has_dos_based_file_system (gdbarch, 1); } @@ -2800,46 +3865,60 @@ int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum, struct reggroup *group) { - int sse_regnum_p, fp_regnum_p, mmx_regnum_p, byte_regnum_p, - word_regnum_p, dword_regnum_p; + const struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); + int fp_regnum_p, mmx_regnum_p, xmm_regnum_p, mxcsr_regnum_p, + ymm_regnum_p, ymmh_regnum_p; /* Don't include pseudo registers, except for MMX, in any register groups. */ - byte_regnum_p = i386_byte_regnum_p (gdbarch, regnum); - if (byte_regnum_p) + if (i386_byte_regnum_p (gdbarch, regnum)) return 0; - word_regnum_p = i386_word_regnum_p (gdbarch, regnum); - if (word_regnum_p) + if (i386_word_regnum_p (gdbarch, regnum)) return 0; - dword_regnum_p = i386_dword_regnum_p (gdbarch, regnum); - if (dword_regnum_p) + if (i386_dword_regnum_p (gdbarch, regnum)) return 0; mmx_regnum_p = i386_mmx_regnum_p (gdbarch, regnum); if (group == i386_mmx_reggroup) return mmx_regnum_p; - sse_regnum_p = (i386_sse_regnum_p (gdbarch, regnum) - || i386_mxcsr_regnum_p (gdbarch, regnum)); + xmm_regnum_p = i386_xmm_regnum_p (gdbarch, regnum); + mxcsr_regnum_p = i386_mxcsr_regnum_p (gdbarch, regnum); if (group == i386_sse_reggroup) - return sse_regnum_p; + return xmm_regnum_p || mxcsr_regnum_p; + + ymm_regnum_p = i386_ymm_regnum_p (gdbarch, regnum); if (group == vector_reggroup) - return mmx_regnum_p || sse_regnum_p; + return (mmx_regnum_p + || ymm_regnum_p + || mxcsr_regnum_p + || (xmm_regnum_p + && ((tdep->xcr0 & I386_XSTATE_AVX_MASK) + == I386_XSTATE_SSE_MASK))); fp_regnum_p = (i386_fp_regnum_p (gdbarch, regnum) || i386_fpc_regnum_p (gdbarch, regnum)); if (group == float_reggroup) return fp_regnum_p; + /* For "info reg all", don't include upper YMM registers nor XMM + registers when AVX is supported. */ + ymmh_regnum_p = i386_ymmh_regnum_p (gdbarch, regnum); + if (group == all_reggroup + && ((xmm_regnum_p + && (tdep->xcr0 & I386_XSTATE_AVX)) + || ymmh_regnum_p)) + return 0; + if (group == general_reggroup) return (!fp_regnum_p && !mmx_regnum_p - && !sse_regnum_p - && !byte_regnum_p - && !word_regnum_p - && !dword_regnum_p); + && !mxcsr_regnum_p + && !xmm_regnum_p + && !ymm_regnum_p + && !ymmh_regnum_p); return default_register_reggroup_p (gdbarch, regnum, group); } @@ -2853,7 +3932,7 @@ i386_fetch_pointer_argument (struct frame_info *frame, int argi, { struct gdbarch *gdbarch = get_frame_arch (frame); enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); - CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM); + CORE_ADDR sp = get_frame_register_unsigned (frame, I386_ESP_REGNUM); return read_memory_unsigned_integer (sp + (4 * (argi + 1)), 4, byte_order); } @@ -2882,6 +3961,7 @@ enum OT_WORD, OT_LONG, OT_QUAD, + OT_DQUAD, }; /* i386 arith/logic operations */ @@ -2916,22 +3996,17 @@ struct i386_record_s const int *regmap; }; -/* Parse "modrm" part in current memory address that irp->addr point to - Return -1 if something wrong. */ +/* Parse the "modrm" part of the memory address irp->addr points at. + Returns -1 if something goes wrong, 0 otherwise. */ static int i386_record_modrm (struct i386_record_s *irp) { struct gdbarch *gdbarch = irp->gdbarch; - if (target_read_memory (irp->addr, &irp->modrm, 1)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory at " - "addr %s len = 1.\n"), - paddress (gdbarch, irp->addr)); - return -1; - } + if (record_read_memory (gdbarch, irp->addr, &irp->modrm, 1)) + return -1; + irp->addr++; irp->mod = (irp->modrm >> 6) & 3; irp->reg = (irp->modrm >> 3) & 7; @@ -2940,9 +4015,8 @@ i386_record_modrm (struct i386_record_s *irp) return 0; } -/* Get the memory address that current instruction write to and set it to - the argument "addr". - Return -1 if something wrong. */ +/* Extract the memory address that the current instruction writes to, + and return it in *ADDR. Return -1 if something goes wrong. */ static int i386_record_lea_modrm_addr (struct i386_record_s *irp, uint64_t *addr) @@ -2965,14 +4039,8 @@ i386_record_lea_modrm_addr (struct i386_record_s *irp, uint64_t *addr) if (base == 4) { havesib = 1; - if (target_read_memory (irp->addr, &byte, 1)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory " - "at addr %s len = 1.\n"), - paddress (gdbarch, irp->addr)); - return -1; - } + if (record_read_memory (gdbarch, irp->addr, &byte, 1)) + return -1; irp->addr++; scale = (byte >> 6) & 3; index = ((byte >> 3) & 7) | irp->rex_x; @@ -2986,45 +4054,23 @@ i386_record_lea_modrm_addr (struct i386_record_s *irp, uint64_t *addr) if ((base & 7) == 5) { base = 0xff; - if (target_read_memory (irp->addr, buf, 4)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading " - "memory at addr %s len = 4.\n"), - paddress (gdbarch, irp->addr)); - return -1; - } + if (record_read_memory (gdbarch, irp->addr, buf, 4)) + return -1; irp->addr += 4; *addr = extract_signed_integer (buf, 4, byte_order); if (irp->regmap[X86_RECORD_R8_REGNUM] && !havesib) *addr += irp->addr + irp->rip_offset; } - else - { - *addr = 0; - } break; case 1: - if (target_read_memory (irp->addr, buf, 1)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory " - "at addr %s len = 1.\n"), - paddress (gdbarch, irp->addr)); - return -1; - } + if (record_read_memory (gdbarch, irp->addr, buf, 1)) + return -1; irp->addr++; *addr = (int8_t) buf[0]; break; case 2: - if (target_read_memory (irp->addr, buf, 4)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory " - "at addr %s len = 4.\n"), - paddress (gdbarch, irp->addr)); - return -1; - } + if (record_read_memory (gdbarch, irp->addr, buf, 4)) + return -1; *addr = extract_signed_integer (buf, 4, byte_order); irp->addr += 4; break; @@ -3063,45 +4109,23 @@ i386_record_lea_modrm_addr (struct i386_record_s *irp, uint64_t *addr) case 0: if (irp->rm == 6) { - if (target_read_memory (irp->addr, buf, 2)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading " - "memory at addr %s len = 2.\n"), - paddress (gdbarch, irp->addr)); - return -1; - } + if (record_read_memory (gdbarch, irp->addr, buf, 2)) + return -1; irp->addr += 2; *addr = extract_signed_integer (buf, 2, byte_order); irp->rm = 0; goto no_rm; } - else - { - *addr = 0; - } break; case 1: - if (target_read_memory (irp->addr, buf, 1)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory " - "at addr %s len = 1.\n"), - paddress (gdbarch, irp->addr)); - return -1; - } + if (record_read_memory (gdbarch, irp->addr, buf, 1)) + return -1; irp->addr++; *addr = (int8_t) buf[0]; break; case 2: - if (target_read_memory (irp->addr, buf, 2)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory " - "at addr %s len = 2.\n"), - paddress (gdbarch, irp->addr)); - return -1; - } + if (record_read_memory (gdbarch, irp->addr, buf, 2)) + return -1; irp->addr += 2; *addr = extract_signed_integer (buf, 2, byte_order); break; @@ -3181,9 +4205,9 @@ i386_record_lea_modrm_addr (struct i386_record_s *irp, uint64_t *addr) return 0; } -/* Record the value of the memory that willbe changed in current instruction - to "record_arch_list". - Return -1 if something wrong. */ +/* Record the address and contents of the memory that will be changed + by the current instruction. Return -1 if something goes wrong, 0 + otherwise. */ static int i386_record_lea_modrm (struct i386_record_s *irp) @@ -3193,37 +4217,48 @@ i386_record_lea_modrm (struct i386_record_s *irp) if (irp->override >= 0) { - warning (_("Process record ignores the memory change " - "of instruction at address %s because it " - "can't get the value of the segment register."), - paddress (gdbarch, irp->orig_addr)); + if (record_full_memory_query) + { + int q; + + target_terminal_ours (); + q = yquery (_("\ +Process record ignores the memory change of instruction at address %s\n\ +because it can't get the value of the segment register.\n\ +Do you want to stop the program?"), + paddress (gdbarch, irp->orig_addr)); + target_terminal_inferior (); + if (q) + return -1; + } + return 0; } if (i386_record_lea_modrm_addr (irp, &addr)) return -1; - if (record_arch_list_add_mem (addr, 1 << irp->ot)) + if (record_full_arch_list_add_mem (addr, 1 << irp->ot)) return -1; return 0; } -/* Record the push operation to "record_arch_list". - Return -1 if something wrong. */ +/* Record the effects of a push operation. Return -1 if something + goes wrong, 0 otherwise. */ static int i386_record_push (struct i386_record_s *irp, int size) { ULONGEST addr; - if (record_arch_list_add_reg (irp->regcache, - irp->regmap[X86_RECORD_RESP_REGNUM])) + if (record_full_arch_list_add_reg (irp->regcache, + irp->regmap[X86_RECORD_RESP_REGNUM])) return -1; regcache_raw_read_unsigned (irp->regcache, irp->regmap[X86_RECORD_RESP_REGNUM], &addr); - if (record_arch_list_add_mem ((CORE_ADDR) addr - size, size)) + if (record_full_arch_list_add_mem ((CORE_ADDR) addr - size, size)) return -1; return 0; @@ -3235,9 +4270,9 @@ i386_record_push (struct i386_record_s *irp, int size) #define I386_SAVE_FPU_ENV 0xfffe #define I386_SAVE_FPU_ENV_REG_STACK 0xffff -/* Record the value of floating point registers which will be changed by the - current instruction to "record_arch_list". Return -1 if something is wrong. -*/ +/* Record the values of the floating point registers which will be + changed by the current instruction. Returns -1 if something is + wrong, 0 otherwise. */ static int i386_record_floats (struct gdbarch *gdbarch, struct i386_record_s *ir, @@ -3255,7 +4290,7 @@ static int i386_record_floats (struct gdbarch *gdbarch, { for (i = I387_ST0_REGNUM (tdep); i <= I387_ST0_REGNUM (tdep) + 7; i++) { - if (record_arch_list_add_reg (ir->regcache, i)) + if (record_full_arch_list_add_reg (ir->regcache, i)) return -1; } } @@ -3263,7 +4298,7 @@ static int i386_record_floats (struct gdbarch *gdbarch, { for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++) { - if (record_arch_list_add_reg (ir->regcache, i)) + if (record_full_arch_list_add_reg (ir->regcache, i)) return -1; } } @@ -3271,14 +4306,14 @@ static int i386_record_floats (struct gdbarch *gdbarch, { for (i = I387_ST0_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++) { - if (record_arch_list_add_reg (ir->regcache, i)) + if (record_full_arch_list_add_reg (ir->regcache, i)) return -1; } } else if ((iregnum >= I387_ST0_REGNUM (tdep)) && (iregnum <= I387_FOP_REGNUM (tdep))) { - if (record_arch_list_add_reg (ir->regcache,iregnum)) + if (record_full_arch_list_add_reg (ir->regcache,iregnum)) return -1; } else @@ -3290,19 +4325,19 @@ static int i386_record_floats (struct gdbarch *gdbarch, { for (i = I387_FCTRL_REGNUM (tdep); i <= I387_FOP_REGNUM (tdep); i++) { - if (record_arch_list_add_reg (ir->regcache, i)) + if (record_full_arch_list_add_reg (ir->regcache, i)) return -1; } } return 0; } -/* Parse the current instruction and record the values of the registers and - memory that will be changed in current instruction to "record_arch_list". - Return -1 if something wrong. */ +/* Parse the current instruction, and record the values of the + registers and memory that will be changed by the current + instruction. Returns -1 if something goes wrong, 0 otherwise. */ -#define I386_RECORD_ARCH_LIST_ADD_REG(regnum) \ - record_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)]) +#define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \ + record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)]) int i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, @@ -3312,12 +4347,11 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, int prefixes = 0; int regnum = 0; uint32_t opcode; - uint8_t opcode8; + uint8_t opcode8; ULONGEST addr; gdb_byte buf[MAX_REGISTER_SIZE]; struct i386_record_s ir; struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - int rex = 0; uint8_t rex_w = -1; uint8_t rex_r = 0; @@ -3329,7 +4363,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.dflag = 1; ir.override = -1; ir.popl_esp_hack = 0; - ir.regmap = gdbarch_tdep (gdbarch)->record_regmap; + ir.regmap = tdep->record_regmap; ir.gdbarch = gdbarch; if (record_debug > 1) @@ -3340,14 +4374,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, /* prefixes */ while (1) { - if (target_read_memory (ir.addr, &opcode8, 1)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory at " - "addr %s len = 1.\n"), - paddress (gdbarch, ir.addr)); - return -1; - } + if (record_read_memory (gdbarch, ir.addr, &opcode8, 1)) + return -1; ir.addr++; switch (opcode8) /* Instruction prefixes */ { @@ -3403,7 +4431,6 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, if (ir.regmap[X86_RECORD_R8_REGNUM]) /* 64 bit target */ { /* REX */ - rex = 1; rex_w = (opcode8 >> 3) & 1; rex_r = (opcode8 & 0x4) << 1; ir.rex_x = (opcode8 & 0x2) << 2; @@ -3432,22 +4459,16 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, else if (ir.regmap[X86_RECORD_R8_REGNUM]) ir.aflag = 2; - /* now check op code */ + /* Now check op code. */ opcode = (uint32_t) opcode8; reswitch: switch (opcode) { case 0x0f: - if (target_read_memory (ir.addr, &opcode8, 1)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory at " - "addr %s len = 1.\n"), - paddress (gdbarch, ir.addr)); - return -1; - } + if (record_read_memory (gdbarch, ir.addr, &opcode8, 1)) + return -1; ir.addr++; - opcode = (uint16_t) opcode8 | 0x0f00; + opcode = (uint32_t) opcode8 | 0x0f00; goto reswitch; break; @@ -3521,7 +4542,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.rm |= ir.rex_b; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.rm &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm); } break; case 1: /* OP Gv, Ev */ @@ -3530,14 +4551,14 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.reg |= rex_r; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); break; case 2: /* OP A, Iv */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); break; } } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x80: /* GRP1 */ @@ -3564,9 +4585,9 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, return -1; } else - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x40: /* inc */ @@ -3587,8 +4608,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x4e: case 0x4f: - I386_RECORD_ARCH_LIST_ADD_REG (opcode & 7); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode & 7); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0xf6: /* GRP3 */ @@ -3606,7 +4627,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, switch (ir.reg) { case 0: /* test */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 2: /* not */ case 3: /* neg */ @@ -3620,19 +4641,19 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.rm |= ir.rex_b; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.rm &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm); } if (ir.reg == 3) /* neg */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 4: /* mul */ case 5: /* imul */ case 6: /* div */ case 7: /* idiv */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); if (ir.ot != OT_BYTE) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; default: ir.addr -= 2; @@ -3670,26 +4691,26 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.rm |= ir.rex_b; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.rm &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm); } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 2: /* call */ if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag) ir.dflag = 2; if (i386_record_push (&ir, 1 << (ir.dflag + 1))) return -1; - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 3: /* lcall */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM); if (i386_record_push (&ir, 1 << (ir.dflag + 1))) return -1; - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 4: /* jmp */ case 5: /* ljmp */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 6: /* push */ if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag) @@ -3709,16 +4730,16 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x85: case 0xa8: case 0xa9: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x98: /* CWDE/CBW */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); break; case 0x99: /* CDQ/CWD */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); break; case 0x0faf: /* imul */ @@ -3734,8 +4755,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.reg |= rex_r; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fc0: /* xadd */ @@ -3751,10 +4772,10 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, { if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.rm &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm); } else { @@ -3762,9 +4783,9 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, return -1; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fb0: /* cmpxchg */ @@ -3778,18 +4799,18 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, if (ir.mod == 3) { ir.reg |= rex_r; - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); } else { - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); if (i386_record_lea_modrm (&ir)) return -1; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fc7: /* cmpxchg8b */ @@ -3801,11 +4822,11 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, opcode = opcode << 8 | ir.modrm; goto no_support; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); if (i386_record_lea_modrm (&ir)) return -1; - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x50: /* push */ @@ -3866,8 +4887,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x5d: case 0x5e: case 0x5f: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b); break; case 0x61: /* popa */ @@ -3879,7 +4900,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, for (regnum = X86_RECORD_REAX_REGNUM; regnum <= X86_RECORD_REDI_REGNUM; regnum++) - I386_RECORD_ARCH_LIST_ADD_REG (regnum); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum); break; case 0x8f: /* pop */ @@ -3890,18 +4911,18 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, if (i386_record_modrm (&ir)) return -1; if (ir.mod == 3) - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); else { ir.popl_esp_hack = 1 << ir.ot; if (i386_record_lea_modrm (&ir)) return -1; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); break; case 0xc8: /* enter */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM); if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag) ir.dflag = 2; if (i386_record_push (&ir, 1 << (ir.dflag + 1))) @@ -3909,8 +4930,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, break; case 0xc9: /* leave */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM); break; case 0x07: /* pop es */ @@ -3919,9 +4940,9 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x17: /* pop ss */ @@ -3930,9 +4951,9 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x1f: /* pop ds */ @@ -3941,21 +4962,21 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fa1: /* pop fs */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fa9: /* pop gs */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x88: /* mov */ @@ -3983,7 +5004,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.rm |= ir.rex_b; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.rm &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm); } break; @@ -3998,7 +5019,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.reg |= rex_r; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); break; case 0x8c: /* mov seg */ @@ -4012,7 +5033,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, } if (ir.mod == 3) - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm); else { ir.ot = OT_WORD; @@ -4047,8 +5068,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, goto no_support; break; } - I386_RECORD_ARCH_LIST_ADD_REG (regnum); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fb6: /* movzbS */ @@ -4057,7 +5078,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x0fbf: /* movswS */ if (i386_record_modrm (&ir)) return -1; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r); break; case 0x8d: /* lea */ @@ -4073,25 +5094,34 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.reg |= rex_r; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); break; case 0xa0: /* mov EAX */ case 0xa1: case 0xd7: /* xlat */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); break; case 0xa2: /* mov EAX */ case 0xa3: if (ir.override >= 0) { - warning (_("Process record ignores the memory change " - "of instruction at address %s because " - "it can't get the value of the segment " - "register."), - paddress (gdbarch, ir.orig_addr)); + if (record_full_memory_query) + { + int q; + + target_terminal_ours (); + q = yquery (_("\ +Process record ignores the memory change of instruction at address %s\n\ +because it can't get the value of the segment register.\n\ +Do you want to stop the program?"), + paddress (gdbarch, ir.orig_addr)); + target_terminal_inferior (); + if (q) + return -1; + } } else { @@ -4101,44 +5131,26 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.ot = ir.dflag + OT_WORD; if (ir.aflag == 2) { - if (target_read_memory (ir.addr, buf, 8)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading " - "memory at addr 0x%s len = 8.\n"), - paddress (gdbarch, ir.addr)); - return -1; - } + if (record_read_memory (gdbarch, ir.addr, buf, 8)) + return -1; ir.addr += 8; addr = extract_unsigned_integer (buf, 8, byte_order); } else if (ir.aflag) { - if (target_read_memory (ir.addr, buf, 4)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading " - "memory at addr 0x%s len = 4.\n"), - paddress (gdbarch, ir.addr)); - return -1; - } + if (record_read_memory (gdbarch, ir.addr, buf, 4)) + return -1; ir.addr += 4; addr = extract_unsigned_integer (buf, 4, byte_order); } else { - if (target_read_memory (ir.addr, buf, 2)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading " - "memory at addr 0x%s len = 2.\n"), - paddress (gdbarch, ir.addr)); - return -1; - } + if (record_read_memory (gdbarch, ir.addr, buf, 2)) + return -1; ir.addr += 2; addr = extract_unsigned_integer (buf, 2, byte_order); } - if (record_arch_list_add_mem (addr, 1 << ir.ot)) + if (record_full_arch_list_add_mem (addr, 1 << ir.ot)) return -1; } break; @@ -4151,9 +5163,9 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0xb5: case 0xb6: case 0xb7: - I386_RECORD_ARCH_LIST_ADD_REG ((ir.regmap[X86_RECORD_R8_REGNUM]) - ? ((opcode & 0x7) | ir.rex_b) - : ((opcode & 0x7) & 0x3)); + I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir.regmap[X86_RECORD_R8_REGNUM]) + ? ((opcode & 0x7) | ir.rex_b) + : ((opcode & 0x7) & 0x3)); break; case 0xb8: /* mov R, Iv */ @@ -4164,7 +5176,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0xbd: case 0xbe: case 0xbf: - I386_RECORD_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 0x7) | ir.rex_b); break; case 0x91: /* xchg R, EAX */ @@ -4174,8 +5186,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x95: case 0x96: case 0x97: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (opcode & 0x7); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode & 0x7); break; case 0x86: /* xchg Ev, Gv */ @@ -4191,7 +5203,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.rm |= ir.rex_b; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.rm &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm); } else { @@ -4201,7 +5213,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.reg |= rex_r; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); break; case 0xc4: /* les Gv */ @@ -4211,6 +5223,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } + /* FALLTHROUGH */ case 0x0fb2: /* lss Gv */ case 0x0fb4: /* lfs Gv */ case 0x0fb5: /* lgs Gv */ @@ -4243,9 +5256,9 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, regnum = X86_RECORD_GS_REGNUM; break; } - I386_RECORD_ARCH_LIST_ADD_REG (regnum); - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0xc0: /* shifts */ @@ -4270,9 +5283,9 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.rm |= ir.rex_b; if (ir.ot == OT_BYTE && !ir.regmap[X86_RECORD_R8_REGNUM]) ir.rm &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm); } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fa4: @@ -4283,7 +5296,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, return -1; if (ir.mod == 3) { - if (record_arch_list_add_reg (ir.regcache, ir.rm)) + if (record_full_arch_list_add_reg (ir.regcache, ir.rm)) return -1; } else @@ -4306,7 +5319,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.reg |= ((opcode & 7) << 3); if (ir.mod != 3) { - /* Memory. */ + /* Memory. */ uint64_t addr64; if (i386_record_lea_modrm_addr (&ir, &addr64)) @@ -4386,17 +5399,17 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, switch (ir.reg >> 4) { case 0: - if (record_arch_list_add_mem (addr64, 4)) + if (record_full_arch_list_add_mem (addr64, 4)) return -1; break; case 2: - if (record_arch_list_add_mem (addr64, 8)) + if (record_full_arch_list_add_mem (addr64, 8)) return -1; break; case 3: break; default: - if (record_arch_list_add_mem (addr64, 2)) + if (record_full_arch_list_add_mem (addr64, 2)) return -1; break; } @@ -4405,7 +5418,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, switch (ir.reg >> 4) { case 0: - if (record_arch_list_add_mem (addr64, 4)) + if (record_full_arch_list_add_mem (addr64, 4)) return -1; if (3 == (ir.reg & 7)) { @@ -4416,7 +5429,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, } break; case 1: - if (record_arch_list_add_mem (addr64, 4)) + if (record_full_arch_list_add_mem (addr64, 4)) return -1; if ((3 == (ir.reg & 7)) || (5 == (ir.reg & 7)) @@ -4429,7 +5442,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, } break; case 2: - if (record_arch_list_add_mem (addr64, 8)) + if (record_full_arch_list_add_mem (addr64, 8)) return -1; if (3 == (ir.reg & 7)) { @@ -4449,7 +5462,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, } /* Fall through */ default: - if (record_arch_list_add_mem (addr64, 2)) + if (record_full_arch_list_add_mem (addr64, 2)) return -1; break; } @@ -4476,18 +5489,18 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x0e: if (ir.dflag) { - if (record_arch_list_add_mem (addr64, 28)) + if (record_full_arch_list_add_mem (addr64, 28)) return -1; } else { - if (record_arch_list_add_mem (addr64, 14)) + if (record_full_arch_list_add_mem (addr64, 14)) return -1; } break; case 0x0f: case 0x2f: - if (record_arch_list_add_mem (addr64, 2)) + if (record_full_arch_list_add_mem (addr64, 2)) return -1; /* Insn fstp, fbstp. */ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS)) @@ -4495,23 +5508,23 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, break; case 0x1f: case 0x3e: - if (record_arch_list_add_mem (addr64, 10)) + if (record_full_arch_list_add_mem (addr64, 10)) return -1; break; case 0x2e: if (ir.dflag) { - if (record_arch_list_add_mem (addr64, 28)) + if (record_full_arch_list_add_mem (addr64, 28)) return -1; addr64 += 28; } else { - if (record_arch_list_add_mem (addr64, 14)) + if (record_full_arch_list_add_mem (addr64, 14)) return -1; addr64 += 14; } - if (record_arch_list_add_mem (addr64, 80)) + if (record_full_arch_list_add_mem (addr64, 80)) return -1; /* Insn fsave. */ if (i386_record_floats (gdbarch, &ir, @@ -4519,7 +5532,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, return -1; break; case 0x3f: - if (record_arch_list_add_mem (addr64, 8)) + if (record_full_arch_list_add_mem (addr64, 8)) return -1; /* Insn fistp. */ if (i386_record_floats (gdbarch, &ir, I386_SAVE_FPU_REGS)) @@ -4725,7 +5738,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0xdf: if (0xe0 == ir.modrm) { - if (record_arch_list_add_reg (ir.regcache, I386_EAX_REGNUM)) + if (record_full_arch_list_add_reg (ir.regcache, + I386_EAX_REGNUM)) return -1; } else if ((0x0f == ir.modrm >> 4) || (0x0e == ir.modrm >> 4)) @@ -4768,67 +5782,76 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, if (ir.aflag && (es != ds)) { /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */ - warning (_("Process record ignores the memory " - "change of instruction at address %s " - "because it can't get the value of the " - "ES segment register."), - paddress (gdbarch, ir.orig_addr)); + if (record_full_memory_query) + { + int q; + + target_terminal_ours (); + q = yquery (_("\ +Process record ignores the memory change of instruction at address %s\n\ +because it can't get the value of the segment register.\n\ +Do you want to stop the program?"), + paddress (gdbarch, ir.orig_addr)); + target_terminal_inferior (); + if (q) + return -1; + } } else { - if (record_arch_list_add_mem (addr, 1 << ir.ot)) + if (record_full_arch_list_add_mem (addr, 1 << ir.ot)) return -1; } if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); if (opcode == 0xa4 || opcode == 0xa5) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); } break; case 0xa6: /* cmpsS */ case 0xa7: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0xac: /* lodsS */ case 0xad: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0xae: /* scasS */ case 0xaf: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x6e: /* outsS */ case 0x6f: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0xe4: /* port I/O */ case 0xe5: case 0xec: case 0xed: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); break; case 0xe6: @@ -4840,16 +5863,16 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, /* control */ case 0xc2: /* ret im */ case 0xc3: /* ret */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0xca: /* lret im */ case 0xcb: /* lret */ case 0xcf: /* iret */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0xe8: /* call im */ @@ -4865,7 +5888,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM); if (i386_record_push (&ir, 1 << (ir.dflag + 1))) return -1; break; @@ -4923,13 +5946,13 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x0f9d: case 0x0f9e: case 0x0f9f: - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); ir.ot = OT_BYTE; if (i386_record_modrm (&ir)) return -1; if (ir.mod == 3) - I386_RECORD_ARCH_LIST_ADD_REG (ir.rex_b ? (ir.rm | ir.rex_b) - : (ir.rm & 0x3)); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rex_b ? (ir.rm | ir.rex_b) + : (ir.rm & 0x3)); else { if (i386_record_lea_modrm (&ir)) @@ -4958,12 +5981,12 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.reg |= rex_r; if (ir.dflag == OT_BYTE) ir.reg &= 0x3; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); break; /* flags */ case 0x9c: /* pushf */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); if (ir.regmap[X86_RECORD_R8_REGNUM] && ir.dflag) ir.dflag = 2; if (i386_record_push (&ir, 1 << (ir.dflag + 1))) @@ -4971,8 +5994,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, break; case 0x9d: /* popf */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x9e: /* sahf */ @@ -4981,12 +6004,13 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } + /* FALLTHROUGH */ case 0xf5: /* cmc */ case 0xf8: /* clc */ case 0xf9: /* stc */ case 0xfc: /* cld */ case 0xfd: /* std */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x9f: /* lahf */ @@ -4995,8 +6019,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); break; /* bit operations */ @@ -5013,18 +6037,18 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, if (ir.reg != 4) { if (ir.mod == 3) - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); else { if (i386_record_lea_modrm (&ir)) return -1; } } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fa3: /* bt Gv, Ev */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fab: /* bts */ @@ -5034,7 +6058,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, if (i386_record_modrm (&ir)) return -1; if (ir.mod == 3) - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); else { uint64_t addr64; @@ -5055,18 +6079,18 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, addr64 += ((int64_t) addr >> 6) << 6; break; } - if (record_arch_list_add_mem (addr64, 1 << ir.ot)) + if (record_full_arch_list_add_mem (addr64, 1 << ir.ot)) return -1; if (i386_record_lea_modrm (&ir)) return -1; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0fbc: /* bsf */ case 0x0fbd: /* bsr */ - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; /* bcd */ @@ -5081,8 +6105,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; /* misc */ @@ -5095,14 +6119,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, break; case 0x9b: /* fwait */ - if (target_read_memory (ir.addr, &opcode8, 1)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory at " - "addr 0x%s len = 1.\n"), - paddress (gdbarch, ir.addr)); - return -1; - } + if (record_read_memory (gdbarch, ir.addr, &opcode8, 1)) + return -1; opcode = (uint32_t) opcode8; ir.addr++; goto reswitch; @@ -5110,7 +6128,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, /* XXX */ case 0xcc: /* int3 */ - printf_unfiltered (_("Process record doesn't support instruction " + printf_unfiltered (_("Process record does not support instruction " "int3.\n")); ir.addr -= 1; goto no_support; @@ -5121,25 +6139,19 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, { int ret; uint8_t interrupt; - if (target_read_memory (ir.addr, &interrupt, 1)) - { - if (record_debug) - printf_unfiltered (_("Process record: error reading memory " - "at addr %s len = 1.\n"), - paddress (gdbarch, ir.addr)); - return -1; - } + if (record_read_memory (gdbarch, ir.addr, &interrupt, 1)) + return -1; ir.addr++; if (interrupt != 0x80 - || gdbarch_tdep (gdbarch)->i386_intx80_record == NULL) + || tdep->i386_intx80_record == NULL) { - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction int 0x%02x.\n"), interrupt); ir.addr -= 2; goto no_support; } - ret = gdbarch_tdep (gdbarch)->i386_intx80_record (ir.regcache); + ret = tdep->i386_intx80_record (ir.regcache); if (ret) return ret; } @@ -5147,7 +6159,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, /* XXX */ case 0xce: /* into */ - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction into.\n")); ir.addr -= 1; goto no_support; @@ -5158,7 +6170,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, break; case 0x62: /* bound */ - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction bound.\n")); ir.addr -= 1; goto no_support; @@ -5172,7 +6184,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x0fcd: case 0x0fce: case 0x0fcf: - I386_RECORD_ARCH_LIST_ADD_REG ((opcode & 7) | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode & 7) | ir.rex_b); break; case 0xd6: /* salc */ @@ -5181,37 +6193,35 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 1; goto no_support; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0xe0: /* loopnz */ case 0xe1: /* loopz */ case 0xe2: /* loop */ case 0xe3: /* jecxz */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0f30: /* wrmsr */ - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction wrmsr.\n")); ir.addr -= 2; goto no_support; break; case 0x0f32: /* rdmsr */ - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction rdmsr.\n")); ir.addr -= 2; goto no_support; break; case 0x0f31: /* rdtsc */ - printf_unfiltered (_("Process record doesn't support " - "instruction rdtsc.\n")); - ir.addr -= 2; - goto no_support; + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); break; case 0x0f34: /* sysenter */ @@ -5222,21 +6232,21 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, ir.addr -= 2; goto no_support; } - if (gdbarch_tdep (gdbarch)->i386_sysenter_record == NULL) + if (tdep->i386_sysenter_record == NULL) { - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction sysenter.\n")); ir.addr -= 2; goto no_support; } - ret = gdbarch_tdep (gdbarch)->i386_sysenter_record (ir.regcache); + ret = tdep->i386_sysenter_record (ir.regcache); if (ret) return ret; } break; case 0x0f35: /* sysexit */ - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction sysexit.\n")); ir.addr -= 2; goto no_support; @@ -5245,35 +6255,35 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0x0f05: /* syscall */ { int ret; - if (gdbarch_tdep (gdbarch)->i386_syscall_record == NULL) + if (tdep->i386_syscall_record == NULL) { - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction syscall.\n")); ir.addr -= 2; goto no_support; } - ret = gdbarch_tdep (gdbarch)->i386_syscall_record (ir.regcache); + ret = tdep->i386_syscall_record (ir.regcache); if (ret) return ret; } break; case 0x0f07: /* sysret */ - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction sysret.\n")); ir.addr -= 2; goto no_support; break; case 0x0fa2: /* cpuid */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM); break; case 0xf4: /* hlt */ - printf_unfiltered (_("Process record doesn't support " + printf_unfiltered (_("Process record does not support " "instruction hlt.\n")); ir.addr -= 1; goto no_support; @@ -5287,7 +6297,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0: /* sldt */ case 1: /* str */ if (ir.mod == 3) - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); else { ir.ot = OT_WORD; @@ -5300,7 +6310,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, break; case 4: /* verr */ case 5: /* verw */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; default: ir.addr -= 3; @@ -5327,28 +6337,36 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, } if (ir.override >= 0) { - warning (_("Process record ignores the memory " - "change of instruction at " - "address %s because it can't get " - "the value of the segment " - "register."), - paddress (gdbarch, ir.orig_addr)); + if (record_full_memory_query) + { + int q; + + target_terminal_ours (); + q = yquery (_("\ +Process record ignores the memory change of instruction at address %s\n\ +because it can't get the value of the segment register.\n\ +Do you want to stop the program?"), + paddress (gdbarch, ir.orig_addr)); + target_terminal_inferior (); + if (q) + return -1; + } } else { if (i386_record_lea_modrm_addr (&ir, &addr64)) return -1; - if (record_arch_list_add_mem (addr64, 2)) + if (record_full_arch_list_add_mem (addr64, 2)) return -1; addr64 += 2; if (ir.regmap[X86_RECORD_R8_REGNUM]) { - if (record_arch_list_add_mem (addr64, 8)) + if (record_full_arch_list_add_mem (addr64, 8)) return -1; } else { - if (record_arch_list_add_mem (addr64, 4)) + if (record_full_arch_list_add_mem (addr64, 4)) return -1; } } @@ -5362,7 +6380,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 0: /* monitor */ break; case 1: /* mwait */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; default: ir.addr -= 3; @@ -5376,12 +6394,20 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, /* sidt */ if (ir.override >= 0) { - warning (_("Process record ignores the memory " - "change of instruction at " - "address %s because it can't get " - "the value of the segment " - "register."), - paddress (gdbarch, ir.orig_addr)); + if (record_full_memory_query) + { + int q; + + target_terminal_ours (); + q = yquery (_("\ +Process record ignores the memory change of instruction at address %s\n\ +because it can't get the value of the segment register.\n\ +Do you want to stop the program?"), + paddress (gdbarch, ir.orig_addr)); + target_terminal_inferior (); + if (q) + return -1; + } } else { @@ -5389,17 +6415,17 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, if (i386_record_lea_modrm_addr (&ir, &addr64)) return -1; - if (record_arch_list_add_mem (addr64, 2)) + if (record_full_arch_list_add_mem (addr64, 2)) return -1; addr64 += 2; if (ir.regmap[X86_RECORD_R8_REGNUM]) { - if (record_arch_list_add_mem (addr64, 8)) + if (record_full_arch_list_add_mem (addr64, 8)) return -1; } else { - if (record_arch_list_add_mem (addr64, 4)) + if (record_full_arch_list_add_mem (addr64, 4)) return -1; } } @@ -5411,8 +6437,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, /* xgetbv */ if (ir.rm == 0) { - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); break; } /* xsetbv */ @@ -5430,7 +6456,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 4: /* smsw */ if (ir.mod == 3) { - if (record_arch_list_add_reg (ir.regcache, ir.rm | ir.rex_b)) + if (record_full_arch_list_add_reg (ir.regcache, ir.rm | ir.rex_b)) return -1; } else @@ -5439,16 +6465,16 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, if (i386_record_lea_modrm (&ir)) return -1; } - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 6: /* lmsw */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 7: /* invlpg */ if (ir.mod == 3) { if (ir.rm == 0 && ir.regmap[X86_RECORD_R8_REGNUM]) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM); else { ir.addr -= 3; @@ -5457,7 +6483,7 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, } } else - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; default: ir.addr -= 3; @@ -5476,8 +6502,8 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, return -1; if (ir.mod == 3 || ir.regmap[X86_RECORD_R8_REGNUM]) { - I386_RECORD_ARCH_LIST_ADD_REG (ir.regmap[X86_RECORD_R8_REGNUM] - ? (ir.reg | rex_r) : ir.rm); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.regmap[X86_RECORD_R8_REGNUM] + ? (ir.reg | rex_r) : ir.rm); } else { @@ -5486,15 +6512,15 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, return -1; } if (!ir.regmap[X86_RECORD_R8_REGNUM]) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0f02: /* lar */ case 0x0f03: /* lsl */ if (i386_record_modrm (&ir)) return -1; - I386_RECORD_ARCH_LIST_ADD_REG (ir.reg | rex_r); - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; case 0x0f18: @@ -5536,9 +6562,9 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, case 4: case 8: if (opcode & 2) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); else - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); break; default: ir.addr -= 3; @@ -5560,38 +6586,834 @@ i386_process_record (struct gdbarch *gdbarch, struct regcache *regcache, goto no_support; } if (opcode & 2) - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); else - I386_RECORD_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); break; case 0x0f06: /* clts */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); break; - /* MMX/SSE/SSE2/PNI support */ - /* XXX */ + /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */ + + case 0x0f0d: /* 3DNow! prefetch */ + break; + + case 0x0f0e: /* 3DNow! femms */ + case 0x0f77: /* emms */ + if (i386_fpc_regnum_p (gdbarch, I387_FTAG_REGNUM(tdep))) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, I387_FTAG_REGNUM(tdep)); + break; + + case 0x0f0f: /* 3DNow! data */ + if (i386_record_modrm (&ir)) + return -1; + if (record_read_memory (gdbarch, ir.addr, &opcode8, 1)) + return -1; + ir.addr++; + switch (opcode8) + { + case 0x0c: /* 3DNow! pi2fw */ + case 0x0d: /* 3DNow! pi2fd */ + case 0x1c: /* 3DNow! pf2iw */ + case 0x1d: /* 3DNow! pf2id */ + case 0x8a: /* 3DNow! pfnacc */ + case 0x8e: /* 3DNow! pfpnacc */ + case 0x90: /* 3DNow! pfcmpge */ + case 0x94: /* 3DNow! pfmin */ + case 0x96: /* 3DNow! pfrcp */ + case 0x97: /* 3DNow! pfrsqrt */ + case 0x9a: /* 3DNow! pfsub */ + case 0x9e: /* 3DNow! pfadd */ + case 0xa0: /* 3DNow! pfcmpgt */ + case 0xa4: /* 3DNow! pfmax */ + case 0xa6: /* 3DNow! pfrcpit1 */ + case 0xa7: /* 3DNow! pfrsqit1 */ + case 0xaa: /* 3DNow! pfsubr */ + case 0xae: /* 3DNow! pfacc */ + case 0xb0: /* 3DNow! pfcmpeq */ + case 0xb4: /* 3DNow! pfmul */ + case 0xb6: /* 3DNow! pfrcpit2 */ + case 0xb7: /* 3DNow! pmulhrw */ + case 0xbb: /* 3DNow! pswapd */ + case 0xbf: /* 3DNow! pavgusb */ + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg)) + goto no_support_3dnow_data; + record_full_arch_list_add_reg (ir.regcache, ir.reg); + break; + + default: +no_support_3dnow_data: + opcode = (opcode << 8) | opcode8; + goto no_support; + break; + } + break; + + case 0x0faa: /* rsm */ + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM); + break; + + case 0x0fae: + if (i386_record_modrm (&ir)) + return -1; + switch(ir.reg) + { + case 0: /* fxsave */ + { + uint64_t tmpu64; + + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + if (i386_record_lea_modrm_addr (&ir, &tmpu64)) + return -1; + if (record_full_arch_list_add_mem (tmpu64, 512)) + return -1; + } + break; + + case 1: /* fxrstor */ + { + int i; + + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + + for (i = I387_MM0_REGNUM (tdep); + i386_mmx_regnum_p (gdbarch, i); i++) + record_full_arch_list_add_reg (ir.regcache, i); + + for (i = I387_XMM0_REGNUM (tdep); + i386_xmm_regnum_p (gdbarch, i); i++) + record_full_arch_list_add_reg (ir.regcache, i); + + if (i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep))) + record_full_arch_list_add_reg (ir.regcache, + I387_MXCSR_REGNUM(tdep)); + + for (i = I387_ST0_REGNUM (tdep); + i386_fp_regnum_p (gdbarch, i); i++) + record_full_arch_list_add_reg (ir.regcache, i); + + for (i = I387_FCTRL_REGNUM (tdep); + i386_fpc_regnum_p (gdbarch, i); i++) + record_full_arch_list_add_reg (ir.regcache, i); + } + break; + + case 2: /* ldmxcsr */ + if (!i386_mxcsr_regnum_p (gdbarch, I387_MXCSR_REGNUM(tdep))) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, I387_MXCSR_REGNUM(tdep)); + break; + + case 3: /* stmxcsr */ + ir.ot = OT_LONG; + if (i386_record_lea_modrm (&ir)) + return -1; + break; + + case 5: /* lfence */ + case 6: /* mfence */ + case 7: /* sfence clflush */ + break; + + default: + opcode = (opcode << 8) | ir.modrm; + goto no_support; + break; + } + break; + + case 0x0fc3: /* movnti */ + ir.ot = (ir.dflag == 2) ? OT_QUAD : OT_LONG; + if (i386_record_modrm (&ir)) + return -1; + if (ir.mod == 3) + goto no_support; + ir.reg |= rex_r; + if (i386_record_lea_modrm (&ir)) + return -1; + break; + + /* Add prefix to opcode. */ + case 0x0f10: + case 0x0f11: + case 0x0f12: + case 0x0f13: + case 0x0f14: + case 0x0f15: + case 0x0f16: + case 0x0f17: + case 0x0f28: + case 0x0f29: + case 0x0f2a: + case 0x0f2b: + case 0x0f2c: + case 0x0f2d: + case 0x0f2e: + case 0x0f2f: + case 0x0f38: + case 0x0f39: + case 0x0f3a: + case 0x0f50: + case 0x0f51: + case 0x0f52: + case 0x0f53: + case 0x0f54: + case 0x0f55: + case 0x0f56: + case 0x0f57: + case 0x0f58: + case 0x0f59: + case 0x0f5a: + case 0x0f5b: + case 0x0f5c: + case 0x0f5d: + case 0x0f5e: + case 0x0f5f: + case 0x0f60: + case 0x0f61: + case 0x0f62: + case 0x0f63: + case 0x0f64: + case 0x0f65: + case 0x0f66: + case 0x0f67: + case 0x0f68: + case 0x0f69: + case 0x0f6a: + case 0x0f6b: + case 0x0f6c: + case 0x0f6d: + case 0x0f6e: + case 0x0f6f: + case 0x0f70: + case 0x0f71: + case 0x0f72: + case 0x0f73: + case 0x0f74: + case 0x0f75: + case 0x0f76: + case 0x0f7c: + case 0x0f7d: + case 0x0f7e: + case 0x0f7f: + case 0x0fb8: + case 0x0fc2: + case 0x0fc4: + case 0x0fc5: + case 0x0fc6: + case 0x0fd0: + case 0x0fd1: + case 0x0fd2: + case 0x0fd3: + case 0x0fd4: + case 0x0fd5: + case 0x0fd6: + case 0x0fd7: + case 0x0fd8: + case 0x0fd9: + case 0x0fda: + case 0x0fdb: + case 0x0fdc: + case 0x0fdd: + case 0x0fde: + case 0x0fdf: + case 0x0fe0: + case 0x0fe1: + case 0x0fe2: + case 0x0fe3: + case 0x0fe4: + case 0x0fe5: + case 0x0fe6: + case 0x0fe7: + case 0x0fe8: + case 0x0fe9: + case 0x0fea: + case 0x0feb: + case 0x0fec: + case 0x0fed: + case 0x0fee: + case 0x0fef: + case 0x0ff0: + case 0x0ff1: + case 0x0ff2: + case 0x0ff3: + case 0x0ff4: + case 0x0ff5: + case 0x0ff6: + case 0x0ff7: + case 0x0ff8: + case 0x0ff9: + case 0x0ffa: + case 0x0ffb: + case 0x0ffc: + case 0x0ffd: + case 0x0ffe: + switch (prefixes) + { + case PREFIX_REPNZ: + opcode |= 0xf20000; + break; + case PREFIX_DATA: + opcode |= 0x660000; + break; + case PREFIX_REPZ: + opcode |= 0xf30000; + break; + } +reswitch_prefix_add: + switch (opcode) + { + case 0x0f38: + case 0x660f38: + case 0xf20f38: + case 0x0f3a: + case 0x660f3a: + if (record_read_memory (gdbarch, ir.addr, &opcode8, 1)) + return -1; + ir.addr++; + opcode = (uint32_t) opcode8 | opcode << 8; + goto reswitch_prefix_add; + break; + + case 0x0f10: /* movups */ + case 0x660f10: /* movupd */ + case 0xf30f10: /* movss */ + case 0xf20f10: /* movsd */ + case 0x0f12: /* movlps */ + case 0x660f12: /* movlpd */ + case 0xf30f12: /* movsldup */ + case 0xf20f12: /* movddup */ + case 0x0f14: /* unpcklps */ + case 0x660f14: /* unpcklpd */ + case 0x0f15: /* unpckhps */ + case 0x660f15: /* unpckhpd */ + case 0x0f16: /* movhps */ + case 0x660f16: /* movhpd */ + case 0xf30f16: /* movshdup */ + case 0x0f28: /* movaps */ + case 0x660f28: /* movapd */ + case 0x0f2a: /* cvtpi2ps */ + case 0x660f2a: /* cvtpi2pd */ + case 0xf30f2a: /* cvtsi2ss */ + case 0xf20f2a: /* cvtsi2sd */ + case 0x0f2c: /* cvttps2pi */ + case 0x660f2c: /* cvttpd2pi */ + case 0x0f2d: /* cvtps2pi */ + case 0x660f2d: /* cvtpd2pi */ + case 0x660f3800: /* pshufb */ + case 0x660f3801: /* phaddw */ + case 0x660f3802: /* phaddd */ + case 0x660f3803: /* phaddsw */ + case 0x660f3804: /* pmaddubsw */ + case 0x660f3805: /* phsubw */ + case 0x660f3806: /* phsubd */ + case 0x660f3807: /* phsubsw */ + case 0x660f3808: /* psignb */ + case 0x660f3809: /* psignw */ + case 0x660f380a: /* psignd */ + case 0x660f380b: /* pmulhrsw */ + case 0x660f3810: /* pblendvb */ + case 0x660f3814: /* blendvps */ + case 0x660f3815: /* blendvpd */ + case 0x660f381c: /* pabsb */ + case 0x660f381d: /* pabsw */ + case 0x660f381e: /* pabsd */ + case 0x660f3820: /* pmovsxbw */ + case 0x660f3821: /* pmovsxbd */ + case 0x660f3822: /* pmovsxbq */ + case 0x660f3823: /* pmovsxwd */ + case 0x660f3824: /* pmovsxwq */ + case 0x660f3825: /* pmovsxdq */ + case 0x660f3828: /* pmuldq */ + case 0x660f3829: /* pcmpeqq */ + case 0x660f382a: /* movntdqa */ + case 0x660f3a08: /* roundps */ + case 0x660f3a09: /* roundpd */ + case 0x660f3a0a: /* roundss */ + case 0x660f3a0b: /* roundsd */ + case 0x660f3a0c: /* blendps */ + case 0x660f3a0d: /* blendpd */ + case 0x660f3a0e: /* pblendw */ + case 0x660f3a0f: /* palignr */ + case 0x660f3a20: /* pinsrb */ + case 0x660f3a21: /* insertps */ + case 0x660f3a22: /* pinsrd pinsrq */ + case 0x660f3a40: /* dpps */ + case 0x660f3a41: /* dppd */ + case 0x660f3a42: /* mpsadbw */ + case 0x660f3a60: /* pcmpestrm */ + case 0x660f3a61: /* pcmpestri */ + case 0x660f3a62: /* pcmpistrm */ + case 0x660f3a63: /* pcmpistri */ + case 0x0f51: /* sqrtps */ + case 0x660f51: /* sqrtpd */ + case 0xf20f51: /* sqrtsd */ + case 0xf30f51: /* sqrtss */ + case 0x0f52: /* rsqrtps */ + case 0xf30f52: /* rsqrtss */ + case 0x0f53: /* rcpps */ + case 0xf30f53: /* rcpss */ + case 0x0f54: /* andps */ + case 0x660f54: /* andpd */ + case 0x0f55: /* andnps */ + case 0x660f55: /* andnpd */ + case 0x0f56: /* orps */ + case 0x660f56: /* orpd */ + case 0x0f57: /* xorps */ + case 0x660f57: /* xorpd */ + case 0x0f58: /* addps */ + case 0x660f58: /* addpd */ + case 0xf20f58: /* addsd */ + case 0xf30f58: /* addss */ + case 0x0f59: /* mulps */ + case 0x660f59: /* mulpd */ + case 0xf20f59: /* mulsd */ + case 0xf30f59: /* mulss */ + case 0x0f5a: /* cvtps2pd */ + case 0x660f5a: /* cvtpd2ps */ + case 0xf20f5a: /* cvtsd2ss */ + case 0xf30f5a: /* cvtss2sd */ + case 0x0f5b: /* cvtdq2ps */ + case 0x660f5b: /* cvtps2dq */ + case 0xf30f5b: /* cvttps2dq */ + case 0x0f5c: /* subps */ + case 0x660f5c: /* subpd */ + case 0xf20f5c: /* subsd */ + case 0xf30f5c: /* subss */ + case 0x0f5d: /* minps */ + case 0x660f5d: /* minpd */ + case 0xf20f5d: /* minsd */ + case 0xf30f5d: /* minss */ + case 0x0f5e: /* divps */ + case 0x660f5e: /* divpd */ + case 0xf20f5e: /* divsd */ + case 0xf30f5e: /* divss */ + case 0x0f5f: /* maxps */ + case 0x660f5f: /* maxpd */ + case 0xf20f5f: /* maxsd */ + case 0xf30f5f: /* maxss */ + case 0x660f60: /* punpcklbw */ + case 0x660f61: /* punpcklwd */ + case 0x660f62: /* punpckldq */ + case 0x660f63: /* packsswb */ + case 0x660f64: /* pcmpgtb */ + case 0x660f65: /* pcmpgtw */ + case 0x660f66: /* pcmpgtd */ + case 0x660f67: /* packuswb */ + case 0x660f68: /* punpckhbw */ + case 0x660f69: /* punpckhwd */ + case 0x660f6a: /* punpckhdq */ + case 0x660f6b: /* packssdw */ + case 0x660f6c: /* punpcklqdq */ + case 0x660f6d: /* punpckhqdq */ + case 0x660f6e: /* movd */ + case 0x660f6f: /* movdqa */ + case 0xf30f6f: /* movdqu */ + case 0x660f70: /* pshufd */ + case 0xf20f70: /* pshuflw */ + case 0xf30f70: /* pshufhw */ + case 0x660f74: /* pcmpeqb */ + case 0x660f75: /* pcmpeqw */ + case 0x660f76: /* pcmpeqd */ + case 0x660f7c: /* haddpd */ + case 0xf20f7c: /* haddps */ + case 0x660f7d: /* hsubpd */ + case 0xf20f7d: /* hsubps */ + case 0xf30f7e: /* movq */ + case 0x0fc2: /* cmpps */ + case 0x660fc2: /* cmppd */ + case 0xf20fc2: /* cmpsd */ + case 0xf30fc2: /* cmpss */ + case 0x660fc4: /* pinsrw */ + case 0x0fc6: /* shufps */ + case 0x660fc6: /* shufpd */ + case 0x660fd0: /* addsubpd */ + case 0xf20fd0: /* addsubps */ + case 0x660fd1: /* psrlw */ + case 0x660fd2: /* psrld */ + case 0x660fd3: /* psrlq */ + case 0x660fd4: /* paddq */ + case 0x660fd5: /* pmullw */ + case 0xf30fd6: /* movq2dq */ + case 0x660fd8: /* psubusb */ + case 0x660fd9: /* psubusw */ + case 0x660fda: /* pminub */ + case 0x660fdb: /* pand */ + case 0x660fdc: /* paddusb */ + case 0x660fdd: /* paddusw */ + case 0x660fde: /* pmaxub */ + case 0x660fdf: /* pandn */ + case 0x660fe0: /* pavgb */ + case 0x660fe1: /* psraw */ + case 0x660fe2: /* psrad */ + case 0x660fe3: /* pavgw */ + case 0x660fe4: /* pmulhuw */ + case 0x660fe5: /* pmulhw */ + case 0x660fe6: /* cvttpd2dq */ + case 0xf20fe6: /* cvtpd2dq */ + case 0xf30fe6: /* cvtdq2pd */ + case 0x660fe8: /* psubsb */ + case 0x660fe9: /* psubsw */ + case 0x660fea: /* pminsw */ + case 0x660feb: /* por */ + case 0x660fec: /* paddsb */ + case 0x660fed: /* paddsw */ + case 0x660fee: /* pmaxsw */ + case 0x660fef: /* pxor */ + case 0xf20ff0: /* lddqu */ + case 0x660ff1: /* psllw */ + case 0x660ff2: /* pslld */ + case 0x660ff3: /* psllq */ + case 0x660ff4: /* pmuludq */ + case 0x660ff5: /* pmaddwd */ + case 0x660ff6: /* psadbw */ + case 0x660ff8: /* psubb */ + case 0x660ff9: /* psubw */ + case 0x660ffa: /* psubd */ + case 0x660ffb: /* psubq */ + case 0x660ffc: /* paddb */ + case 0x660ffd: /* paddw */ + case 0x660ffe: /* paddd */ + if (i386_record_modrm (&ir)) + return -1; + ir.reg |= rex_r; + if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.reg)) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, + I387_XMM0_REGNUM (tdep) + ir.reg); + if ((opcode & 0xfffffffc) == 0x660f3a60) + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + break; + + case 0x0f11: /* movups */ + case 0x660f11: /* movupd */ + case 0xf30f11: /* movss */ + case 0xf20f11: /* movsd */ + case 0x0f13: /* movlps */ + case 0x660f13: /* movlpd */ + case 0x0f17: /* movhps */ + case 0x660f17: /* movhpd */ + case 0x0f29: /* movaps */ + case 0x660f29: /* movapd */ + case 0x660f3a14: /* pextrb */ + case 0x660f3a15: /* pextrw */ + case 0x660f3a16: /* pextrd pextrq */ + case 0x660f3a17: /* extractps */ + case 0x660f7f: /* movdqa */ + case 0xf30f7f: /* movdqu */ + if (i386_record_modrm (&ir)) + return -1; + if (ir.mod == 3) + { + if (opcode == 0x0f13 || opcode == 0x660f13 + || opcode == 0x0f17 || opcode == 0x660f17) + goto no_support; + ir.rm |= ir.rex_b; + if (!i386_xmm_regnum_p (gdbarch, + I387_XMM0_REGNUM (tdep) + ir.rm)) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, + I387_XMM0_REGNUM (tdep) + ir.rm); + } + else + { + switch (opcode) + { + case 0x660f3a14: + ir.ot = OT_BYTE; + break; + case 0x660f3a15: + ir.ot = OT_WORD; + break; + case 0x660f3a16: + ir.ot = OT_LONG; + break; + case 0x660f3a17: + ir.ot = OT_QUAD; + break; + default: + ir.ot = OT_DQUAD; + break; + } + if (i386_record_lea_modrm (&ir)) + return -1; + } + break; + + case 0x0f2b: /* movntps */ + case 0x660f2b: /* movntpd */ + case 0x0fe7: /* movntq */ + case 0x660fe7: /* movntdq */ + if (ir.mod == 3) + goto no_support; + if (opcode == 0x0fe7) + ir.ot = OT_QUAD; + else + ir.ot = OT_DQUAD; + if (i386_record_lea_modrm (&ir)) + return -1; + break; + + case 0xf30f2c: /* cvttss2si */ + case 0xf20f2c: /* cvttsd2si */ + case 0xf30f2d: /* cvtss2si */ + case 0xf20f2d: /* cvtsd2si */ + case 0xf20f38f0: /* crc32 */ + case 0xf20f38f1: /* crc32 */ + case 0x0f50: /* movmskps */ + case 0x660f50: /* movmskpd */ + case 0x0fc5: /* pextrw */ + case 0x660fc5: /* pextrw */ + case 0x0fd7: /* pmovmskb */ + case 0x660fd7: /* pmovmskb */ + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg | rex_r); + break; + + case 0x0f3800: /* pshufb */ + case 0x0f3801: /* phaddw */ + case 0x0f3802: /* phaddd */ + case 0x0f3803: /* phaddsw */ + case 0x0f3804: /* pmaddubsw */ + case 0x0f3805: /* phsubw */ + case 0x0f3806: /* phsubd */ + case 0x0f3807: /* phsubsw */ + case 0x0f3808: /* psignb */ + case 0x0f3809: /* psignw */ + case 0x0f380a: /* psignd */ + case 0x0f380b: /* pmulhrsw */ + case 0x0f381c: /* pabsb */ + case 0x0f381d: /* pabsw */ + case 0x0f381e: /* pabsd */ + case 0x0f382b: /* packusdw */ + case 0x0f3830: /* pmovzxbw */ + case 0x0f3831: /* pmovzxbd */ + case 0x0f3832: /* pmovzxbq */ + case 0x0f3833: /* pmovzxwd */ + case 0x0f3834: /* pmovzxwq */ + case 0x0f3835: /* pmovzxdq */ + case 0x0f3837: /* pcmpgtq */ + case 0x0f3838: /* pminsb */ + case 0x0f3839: /* pminsd */ + case 0x0f383a: /* pminuw */ + case 0x0f383b: /* pminud */ + case 0x0f383c: /* pmaxsb */ + case 0x0f383d: /* pmaxsd */ + case 0x0f383e: /* pmaxuw */ + case 0x0f383f: /* pmaxud */ + case 0x0f3840: /* pmulld */ + case 0x0f3841: /* phminposuw */ + case 0x0f3a0f: /* palignr */ + case 0x0f60: /* punpcklbw */ + case 0x0f61: /* punpcklwd */ + case 0x0f62: /* punpckldq */ + case 0x0f63: /* packsswb */ + case 0x0f64: /* pcmpgtb */ + case 0x0f65: /* pcmpgtw */ + case 0x0f66: /* pcmpgtd */ + case 0x0f67: /* packuswb */ + case 0x0f68: /* punpckhbw */ + case 0x0f69: /* punpckhwd */ + case 0x0f6a: /* punpckhdq */ + case 0x0f6b: /* packssdw */ + case 0x0f6e: /* movd */ + case 0x0f6f: /* movq */ + case 0x0f70: /* pshufw */ + case 0x0f74: /* pcmpeqb */ + case 0x0f75: /* pcmpeqw */ + case 0x0f76: /* pcmpeqd */ + case 0x0fc4: /* pinsrw */ + case 0x0fd1: /* psrlw */ + case 0x0fd2: /* psrld */ + case 0x0fd3: /* psrlq */ + case 0x0fd4: /* paddq */ + case 0x0fd5: /* pmullw */ + case 0xf20fd6: /* movdq2q */ + case 0x0fd8: /* psubusb */ + case 0x0fd9: /* psubusw */ + case 0x0fda: /* pminub */ + case 0x0fdb: /* pand */ + case 0x0fdc: /* paddusb */ + case 0x0fdd: /* paddusw */ + case 0x0fde: /* pmaxub */ + case 0x0fdf: /* pandn */ + case 0x0fe0: /* pavgb */ + case 0x0fe1: /* psraw */ + case 0x0fe2: /* psrad */ + case 0x0fe3: /* pavgw */ + case 0x0fe4: /* pmulhuw */ + case 0x0fe5: /* pmulhw */ + case 0x0fe8: /* psubsb */ + case 0x0fe9: /* psubsw */ + case 0x0fea: /* pminsw */ + case 0x0feb: /* por */ + case 0x0fec: /* paddsb */ + case 0x0fed: /* paddsw */ + case 0x0fee: /* pmaxsw */ + case 0x0fef: /* pxor */ + case 0x0ff1: /* psllw */ + case 0x0ff2: /* pslld */ + case 0x0ff3: /* psllq */ + case 0x0ff4: /* pmuludq */ + case 0x0ff5: /* pmaddwd */ + case 0x0ff6: /* psadbw */ + case 0x0ff8: /* psubb */ + case 0x0ff9: /* psubw */ + case 0x0ffa: /* psubd */ + case 0x0ffb: /* psubq */ + case 0x0ffc: /* paddb */ + case 0x0ffd: /* paddw */ + case 0x0ffe: /* paddd */ + if (i386_record_modrm (&ir)) + return -1; + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.reg)) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, + I387_MM0_REGNUM (tdep) + ir.reg); + break; + + case 0x0f71: /* psllw */ + case 0x0f72: /* pslld */ + case 0x0f73: /* psllq */ + if (i386_record_modrm (&ir)) + return -1; + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm)) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, + I387_MM0_REGNUM (tdep) + ir.rm); + break; + + case 0x660f71: /* psllw */ + case 0x660f72: /* pslld */ + case 0x660f73: /* psllq */ + if (i386_record_modrm (&ir)) + return -1; + ir.rm |= ir.rex_b; + if (!i386_xmm_regnum_p (gdbarch, I387_XMM0_REGNUM (tdep) + ir.rm)) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, + I387_XMM0_REGNUM (tdep) + ir.rm); + break; + + case 0x0f7e: /* movd */ + case 0x660f7e: /* movd */ + if (i386_record_modrm (&ir)) + return -1; + if (ir.mod == 3) + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.rm | ir.rex_b); + else + { + if (ir.dflag == 2) + ir.ot = OT_QUAD; + else + ir.ot = OT_LONG; + if (i386_record_lea_modrm (&ir)) + return -1; + } + break; + + case 0x0f7f: /* movq */ + if (i386_record_modrm (&ir)) + return -1; + if (ir.mod == 3) + { + if (!i386_mmx_regnum_p (gdbarch, I387_MM0_REGNUM (tdep) + ir.rm)) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, + I387_MM0_REGNUM (tdep) + ir.rm); + } + else + { + ir.ot = OT_QUAD; + if (i386_record_lea_modrm (&ir)) + return -1; + } + break; + + case 0xf30fb8: /* popcnt */ + if (i386_record_modrm (&ir)) + return -1; + I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir.reg); + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + break; + + case 0x660fd6: /* movq */ + if (i386_record_modrm (&ir)) + return -1; + if (ir.mod == 3) + { + ir.rm |= ir.rex_b; + if (!i386_xmm_regnum_p (gdbarch, + I387_XMM0_REGNUM (tdep) + ir.rm)) + goto no_support; + record_full_arch_list_add_reg (ir.regcache, + I387_XMM0_REGNUM (tdep) + ir.rm); + } + else + { + ir.ot = OT_QUAD; + if (i386_record_lea_modrm (&ir)) + return -1; + } + break; + + case 0x660f3817: /* ptest */ + case 0x0f2e: /* ucomiss */ + case 0x660f2e: /* ucomisd */ + case 0x0f2f: /* comiss */ + case 0x660f2f: /* comisd */ + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM); + break; + + case 0x0ff7: /* maskmovq */ + regcache_raw_read_unsigned (ir.regcache, + ir.regmap[X86_RECORD_REDI_REGNUM], + &addr); + if (record_full_arch_list_add_mem (addr, 64)) + return -1; + break; + + case 0x660ff7: /* maskmovdqu */ + regcache_raw_read_unsigned (ir.regcache, + ir.regmap[X86_RECORD_REDI_REGNUM], + &addr); + if (record_full_arch_list_add_mem (addr, 128)) + return -1; + break; + + default: + goto no_support; + break; + } + break; default: - if (opcode > 0xff) - ir.addr -= 2; - else - ir.addr -= 1; goto no_support; break; } /* In the future, maybe still need to deal with need_dasm. */ - I386_RECORD_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM); - if (record_arch_list_add_end ()) + I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM); + if (record_full_arch_list_add_end ()) return -1; return 0; no_support: - printf_unfiltered (_("Process record doesn't support instruction 0x%02x " - "at address %s.\n"), - (unsigned int) (opcode), paddress (gdbarch, ir.addr)); + printf_unfiltered (_("Process record does not support instruction 0x%02x " + "at address %s.\n"), + (unsigned int) (opcode), + paddress (gdbarch, ir.orig_addr)); return -1; } @@ -5605,10 +7427,12 @@ static const int i386_record_regmap[] = }; /* Check that the given address appears suitable for a fast - tracepoint, which on x86 means that we need an instruction of at + tracepoint, which on x86-64 means that we need an instruction of at least 5 bytes, so that we can overwrite it with a 4-byte-offset jump and not have to worry about program jumps to an address in the - middle of the tracepoint jump. Returns 1 if OK, and writes a size + middle of the tracepoint jump. On x86, it may be possible to use + 4-byte jumps with a 2-byte offset to a trampoline located in the + bottom 64 KiB of memory. Returns 1 if OK, and writes a size of instruction to replace, and 0 if not, plus an explanatory string. */ @@ -5619,10 +7443,26 @@ i386_fast_tracepoint_valid_at (struct gdbarch *gdbarch, int len, jumplen; static struct ui_file *gdb_null = NULL; - /* This is based on the target agent using a 4-byte relative jump. - Alternate future possibilities include 8-byte offset for x86-84, - or 3-byte jumps if the program has trampoline space close by. */ - jumplen = 5; + /* Ask the target for the minimum instruction length supported. */ + jumplen = target_get_min_fast_tracepoint_insn_len (); + + if (jumplen < 0) + { + /* If the target does not support the get_min_fast_tracepoint_insn_len + operation, assume that fast tracepoints will always be implemented + using 4-byte relative jumps on both x86 and x86-64. */ + jumplen = 5; + } + else if (jumplen == 0) + { + /* If the target does support get_min_fast_tracepoint_insn_len but + returns zero, then the IPA has not loaded yet. In this case, + we optimistically assume that truncated 2-byte relative jumps + will be available on x86, and compensate later if this assumption + turns out to be incorrect. On x86-64 architectures, 4-byte relative + jumps will always be used. */ + jumplen = (register_size (gdbarch, 0) == 8) ? 5 : 4; + } /* Dummy file descriptor for the disassembler. */ if (!gdb_null) @@ -5630,21 +7470,25 @@ i386_fast_tracepoint_valid_at (struct gdbarch *gdbarch, /* Check for fit. */ len = gdb_print_insn (gdbarch, addr, gdb_null, NULL); + if (isize) + *isize = len; + if (len < jumplen) { /* Return a bit of target-specific detail to add to the caller's generic failure message. */ if (msg) - *msg = xstrprintf (_("; instruction is only %d bytes long, need at least %d bytes for the jump"), + *msg = xstrprintf (_("; instruction is only %d bytes long, " + "need at least %d bytes for the jump"), len, jumplen); return 0; } - - if (isize) - *isize = len; - if (msg) - *msg = NULL; - return 1; + else + { + if (msg) + *msg = NULL; + return 1; + } } static int @@ -5652,7 +7496,8 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep, struct tdesc_arch_data *tdesc_data) { const struct target_desc *tdesc = tdep->tdesc; - const struct tdesc_feature *feature_core, *feature_vector; + const struct tdesc_feature *feature_core; + const struct tdesc_feature *feature_sse, *feature_avx; int i, num_regs, valid_p; if (! tdesc_has_registers (tdesc)) @@ -5660,25 +7505,60 @@ i386_validate_tdesc_p (struct gdbarch_tdep *tdep, /* Get core registers. */ feature_core = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.core"); + if (feature_core == NULL) + return 0; /* Get SSE registers. */ - feature_vector = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.sse"); + feature_sse = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.sse"); - if (feature_core == NULL || feature_vector == NULL) - return 0; + /* Try AVX registers. */ + feature_avx = tdesc_find_feature (tdesc, "org.gnu.gdb.i386.avx"); valid_p = 1; + /* The XCR0 bits. */ + if (feature_avx) + { + /* AVX register description requires SSE register description. */ + if (!feature_sse) + return 0; + + tdep->xcr0 = I386_XSTATE_AVX_MASK; + + /* It may have been set by OSABI initialization function. */ + if (tdep->num_ymm_regs == 0) + { + tdep->ymmh_register_names = i386_ymmh_names; + tdep->num_ymm_regs = 8; + tdep->ymm0h_regnum = I386_YMM0H_REGNUM; + } + + for (i = 0; i < tdep->num_ymm_regs; i++) + valid_p &= tdesc_numbered_register (feature_avx, tdesc_data, + tdep->ymm0h_regnum + i, + tdep->ymmh_register_names[i]); + } + else if (feature_sse) + tdep->xcr0 = I386_XSTATE_SSE_MASK; + else + { + tdep->xcr0 = I386_XSTATE_X87_MASK; + tdep->num_xmm_regs = 0; + } + num_regs = tdep->num_core_regs; for (i = 0; i < num_regs; i++) valid_p &= tdesc_numbered_register (feature_core, tdesc_data, i, tdep->register_names[i]); - /* Need to include %mxcsr, so add one. */ - num_regs += tdep->num_xmm_regs + 1; - for (; i < num_regs; i++) - valid_p &= tdesc_numbered_register (feature_vector, tdesc_data, i, - tdep->register_names[i]); + if (feature_sse) + { + /* Need to include %mxcsr, so add one. */ + num_regs += tdep->num_xmm_regs + 1; + for (; i < num_regs; i++) + valid_p &= tdesc_numbered_register (feature_sse, tdesc_data, i, + tdep->register_names[i]); + } return valid_p; } @@ -5692,6 +7572,7 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) struct tdesc_arch_data *tdesc_data; const struct target_desc *tdesc; int mm0_regnum; + int ymm0_regnum; /* If there is already a candidate, use it. */ arches = gdbarch_list_lookup_by_info (arches, &info); @@ -5712,19 +7593,13 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->fpregset = NULL; tdep->sizeof_fpregset = I387_SIZEOF_FSAVE; + tdep->xstateregset = NULL; + /* The default settings include the FPU registers, the MMX registers and the SSE registers. This can be overridden for a specific ABI by adjusting the members `st0_regnum', `mm0_regnum' and `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers - will show up in the output of "info all-registers". Ideally we - should try to autodetect whether they are available, such that we - can prevent "info all-registers" from displaying registers that - aren't available. - - NOTE: kevinb/2003-07-13: ... if it's a choice between printing - [the SSE registers] always (even when they don't exist) or never - showing them to the user (even when they do exist), I prefer the - former over the latter. */ + will show up in the output of "info all-registers". */ tdep->st0_regnum = I386_ST0_REGNUM; @@ -5741,8 +7616,12 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->sc_pc_offset = -1; tdep->sc_sp_offset = -1; + tdep->xsave_xcr0_offset = -1; + tdep->record_regmap = i386_record_regmap; + set_gdbarch_long_long_align_bit (gdbarch, 32); + /* The format used for `long double' on almost all i386 targets is the i387 extended floating-point format. In fact, of all targets in the GCC 2.95 tree, only OSF/1 does it different, and insists @@ -5805,7 +7684,10 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_get_longjmp_target (gdbarch, i386_get_longjmp_target); /* Call dummy code. */ + set_gdbarch_call_dummy_location (gdbarch, ON_STACK); + set_gdbarch_push_dummy_code (gdbarch, i386_push_dummy_code); set_gdbarch_push_dummy_call (gdbarch, i386_push_dummy_call); + set_gdbarch_frame_align (gdbarch, i386_frame_align); set_gdbarch_convert_register_p (gdbarch, i386_convert_register_p); set_gdbarch_register_to_value (gdbarch, i386_register_to_value); @@ -5838,28 +7720,34 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_fetch_pointer_argument (gdbarch, i386_fetch_pointer_argument); /* Hook the function epilogue frame unwinder. This unwinder is - appended to the list first, so that it supercedes the Dwarf - unwinder in function epilogues (where the Dwarf unwinder + appended to the list first, so that it supercedes the DWARF + unwinder in function epilogues (where the DWARF unwinder currently fails). */ frame_unwind_append_unwinder (gdbarch, &i386_epilogue_frame_unwind); /* Hook in the DWARF CFI frame unwinder. This unwinder is appended - to the list before the prologue-based unwinders, so that Dwarf + to the list before the prologue-based unwinders, so that DWARF CFI info will be used if it is available. */ dwarf2_append_unwinders (gdbarch); frame_base_set_default (gdbarch, &i386_frame_base); /* Pseudo registers may be changed by amd64_init_abi. */ - set_gdbarch_pseudo_register_read (gdbarch, i386_pseudo_register_read); + set_gdbarch_pseudo_register_read_value (gdbarch, + i386_pseudo_register_read_value); set_gdbarch_pseudo_register_write (gdbarch, i386_pseudo_register_write); set_tdesc_pseudo_register_type (gdbarch, i386_pseudo_register_type); set_tdesc_pseudo_register_name (gdbarch, i386_pseudo_register_name); - /* The default ABI includes general-purpose registers, - floating-point registers, and the SSE registers. */ - set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS); + /* Override the normal target description method to make the AVX + upper halves anonymous. */ + set_gdbarch_register_name (gdbarch, i386_register_name); + + /* Even though the default ABI only includes general-purpose registers, + floating-point registers and the SSE registers, we have to leave a + gap for the upper AVX registers. */ + set_gdbarch_num_regs (gdbarch, I386_AVX_NUM_REGS); /* Get the x86 target description from INFO. */ tdesc = info.target_desc; @@ -5870,35 +7758,45 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->num_core_regs = I386_NUM_GREGS + I387_NUM_REGS; tdep->register_names = i386_register_names; + /* No upper YMM registers. */ + tdep->ymmh_register_names = NULL; + tdep->ymm0h_regnum = -1; + tdep->num_byte_regs = 8; tdep->num_word_regs = 8; tdep->num_dword_regs = 0; tdep->num_mmx_regs = 8; + tdep->num_ymm_regs = 0; tdesc_data = tdesc_data_alloc (); + set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction); + + set_gdbarch_gen_return_address (gdbarch, i386_gen_return_address); + /* Hook in ABI-specific overrides, if they have been registered. */ info.tdep_info = (void *) tdesc_data; gdbarch_init_osabi (info, gdbarch); + if (!i386_validate_tdesc_p (tdep, tdesc_data)) + { + tdesc_data_cleanup (tdesc_data); + xfree (tdep); + gdbarch_free (gdbarch); + return NULL; + } + /* Wire in pseudo registers. Number of pseudo registers may be changed. */ set_gdbarch_num_pseudo_regs (gdbarch, (tdep->num_byte_regs + tdep->num_word_regs + tdep->num_dword_regs - + tdep->num_mmx_regs)); + + tdep->num_mmx_regs + + tdep->num_ymm_regs)); /* Target description may be changed. */ tdesc = tdep->tdesc; - if (!i386_validate_tdesc_p (tdep, tdesc_data)) - { - tdesc_data_cleanup (tdesc_data); - xfree (tdep); - gdbarch_free (gdbarch); - return NULL; - } - tdesc_use_registers (gdbarch, tdesc, tdesc_data); /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */ @@ -5908,25 +7806,36 @@ i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdep->al_regnum = gdbarch_num_regs (gdbarch); tdep->ax_regnum = tdep->al_regnum + tdep->num_byte_regs; - mm0_regnum = tdep->ax_regnum + tdep->num_word_regs; + ymm0_regnum = tdep->ax_regnum + tdep->num_word_regs; if (tdep->num_dword_regs) { - /* Support dword pseudo-registesr if it hasn't been disabled, */ - tdep->eax_regnum = mm0_regnum; - mm0_regnum = tdep->eax_regnum + tdep->num_dword_regs; + /* Support dword pseudo-register if it hasn't been disabled. */ + tdep->eax_regnum = ymm0_regnum; + ymm0_regnum += tdep->num_dword_regs; } else tdep->eax_regnum = -1; + mm0_regnum = ymm0_regnum; + if (tdep->num_ymm_regs) + { + /* Support YMM pseudo-register if it is available. */ + tdep->ymm0_regnum = ymm0_regnum; + mm0_regnum += tdep->num_ymm_regs; + } + else + tdep->ymm0_regnum = -1; + if (tdep->num_mmx_regs != 0) { - /* Support MMX pseudo-registesr if MMX hasn't been disabled, */ + /* Support MMX pseudo-register if MMX hasn't been disabled. */ tdep->mm0_regnum = mm0_regnum; } else tdep->mm0_regnum = -1; /* Hook in the legacy prologue-based unwinders last (fallback). */ + frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind); frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind); frame_unwind_append_unwinder (gdbarch, &i386_frame_unwind); @@ -6000,4 +7909,9 @@ is \"default\"."), /* Initialize the standard target descriptions. */ initialize_tdesc_i386 (); + initialize_tdesc_i386_mmx (); + initialize_tdesc_i386_avx (); + + /* Tell remote stub that we support XML target description. */ + register_remote_support_xml ("i386"); }