X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Fia64-linux-nat.c;h=ccd55b296737c03045f1870b1fb7533b1e652083;hb=2117c711ae07700adb57ea5b5ca61e4c32d7e3d2;hp=d50fc2968c791c941291b7beb9a1991cf5627ce7;hpb=c9f4d5725ddd4daae3866469aaa6293f1b58a404;p=deliverable%2Fbinutils-gdb.git
diff --git a/gdb/ia64-linux-nat.c b/gdb/ia64-linux-nat.c
index d50fc2968c..ccd55b2967 100644
--- a/gdb/ia64-linux-nat.c
+++ b/gdb/ia64-linux-nat.c
@@ -1,14 +1,13 @@
/* Functions specific to running gdb native on IA-64 running
GNU/Linux.
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
- Free Software Foundation, Inc.
+ Copyright (C) 1999-2014 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
@@ -17,12 +16,10 @@
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 51 Franklin Street, Fifth Floor,
- Boston, MA 02110-1301, USA. */
+ along with this program. If not, see . */
#include "defs.h"
-#include "gdb_string.h"
+#include
#include "inferior.h"
#include "target.h"
#include "gdbcore.h"
@@ -42,7 +39,7 @@
#include
#include
-/* Prototypes for supply_gregset etc. */
+/* Prototypes for supply_gregset etc. */
#include "gregset.h"
/* These must match the order of the register names.
@@ -53,7 +50,7 @@
static int u_offsets[] =
{
/* general registers */
- -1, /* gr0 not available; i.e, it's always zero */
+ -1, /* gr0 not available; i.e, it's always zero. */
PT_R1,
PT_R2,
PT_R3,
@@ -85,7 +82,7 @@ static int u_offsets[] =
PT_R29,
PT_R30,
PT_R31,
- /* gr32 through gr127 not directly available via the ptrace interface */
+ /* gr32 through gr127 not directly available via the ptrace interface. */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
@@ -93,7 +90,7 @@ static int u_offsets[] =
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
/* Floating point registers */
- -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
+ -1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0). */
PT_F2,
PT_F3,
PT_F4,
@@ -220,7 +217,7 @@ static int u_offsets[] =
PT_F125,
PT_F126,
PT_F127,
- /* predicate registers - we don't fetch these individually */
+ /* Predicate registers - we don't fetch these individually. */
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
@@ -238,14 +235,14 @@ static int u_offsets[] =
PT_B5,
PT_B6,
PT_B7,
- /* virtual frame pointer and virtual return address pointer */
+ /* Virtual frame pointer and virtual return address pointer. */
-1, -1,
/* other registers */
PT_PR,
PT_CR_IIP, /* ip */
PT_CR_IPSR, /* psr */
PT_CFM, /* cfm */
- /* kernel registers not visible via ptrace interface (?) */
+ /* kernel registers not visible via ptrace interface (?) */
-1, -1, -1, -1, -1, -1, -1, -1,
/* hole */
-1, -1, -1, -1, -1, -1, -1, -1,
@@ -254,7 +251,7 @@ static int u_offsets[] =
PT_AR_BSPSTORE,
PT_AR_RNAT,
-1,
- -1, /* Not available: FCR, IA32 floating control register */
+ -1, /* Not available: FCR, IA32 floating control register. */
-1, -1,
-1, /* Not available: EFLAG */
-1, /* Not available: CSD */
@@ -275,7 +272,7 @@ static int u_offsets[] =
-1, -1, -1, -1, -1, -1, -1, -1, -1,
PT_AR_PFS,
PT_AR_LC,
- -1, /* Not available: EC, the Epilog Count register */
+ PT_AR_EC,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
@@ -284,7 +281,7 @@ static int u_offsets[] =
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1,
/* nat bits - not fetched directly; instead we obtain these bits from
- either rnat or unat or from memory. */
+ either rnat or unat or from memory. */
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1,
@@ -304,11 +301,11 @@ static int u_offsets[] =
};
static CORE_ADDR
-ia64_register_addr (int regno)
+ia64_register_addr (struct gdbarch *gdbarch, int regno)
{
CORE_ADDR addr;
- if (regno < 0 || regno >= gdbarch_num_regs (current_gdbarch))
+ if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
error (_("Invalid register number %d."), regno);
if (u_offsets[regno] == -1)
@@ -320,15 +317,15 @@ ia64_register_addr (int regno)
}
static int
-ia64_cannot_fetch_register (int regno)
+ia64_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
{
return regno < 0
- || regno >= gdbarch_num_regs (current_gdbarch)
+ || regno >= gdbarch_num_regs (gdbarch)
|| u_offsets[regno] == -1;
}
static int
-ia64_cannot_store_register (int regno)
+ia64_cannot_store_register (struct gdbarch *gdbarch, int regno)
{
/* Rationale behind not permitting stores to bspstore...
@@ -360,7 +357,7 @@ ia64_cannot_store_register (int regno)
back.) */
return regno < 0
- || regno >= gdbarch_num_regs (current_gdbarch)
+ || regno >= gdbarch_num_regs (gdbarch)
|| u_offsets[regno] == -1
|| regno == IA64_BSPSTORE_REGNUM;
}
@@ -377,7 +374,7 @@ supply_gregset (struct regcache *regcache, const gregset_t *gregsetp)
}
/* FIXME: NAT collection bits are at index 32; gotta deal with these
- somehow... */
+ somehow... */
regcache_raw_supply (regcache, IA64_PR_REGNUM, regp + 33);
@@ -417,7 +414,7 @@ fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno)
COPY_REG (regi - IA64_GR0_REGNUM, regi);
}
- /* FIXME: NAT collection bits at index 32? */
+ /* FIXME: NAT collection bits at index 32? */
COPY_REG (33, IA64_PR_REGNUM);
@@ -443,15 +440,27 @@ fill_gregset (const struct regcache *regcache, gregset_t *gregsetp, int regno)
/* Given a pointer to a floating point register set in /proc format
(fpregset_t *), unpack the register contents and supply them as gdb's
- idea of the current floating point register values. */
+ idea of the current floating point register values. */
void
supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
{
int regi;
const char *from;
+ const gdb_byte f_zero[16] = { 0 };
+ const gdb_byte f_one[16] =
+ { 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
- for (regi = IA64_FR0_REGNUM; regi <= IA64_FR127_REGNUM; regi++)
+ /* Kernel generated cores have fr1==0 instead of 1.0. Older GDBs
+ did the same. So ignore whatever might be recorded in fpregset_t
+ for fr0/fr1 and always supply their expected values. */
+
+ /* fr0 is always read as zero. */
+ regcache_raw_supply (regcache, IA64_FR0_REGNUM, f_zero);
+ /* fr1 is always read as one (1.0). */
+ regcache_raw_supply (regcache, IA64_FR1_REGNUM, f_one);
+
+ for (regi = IA64_FR2_REGNUM; regi <= IA64_FR127_REGNUM; regi++)
{
from = (const char *) &((*fpregsetp)[regi - IA64_FR0_REGNUM]);
regcache_raw_supply (regcache, regi, from);
@@ -461,7 +470,7 @@ supply_fpregset (struct regcache *regcache, const fpregset_t *fpregsetp)
/* Given a pointer to a floating point register set in /proc format
(fpregset_t *), update the register specified by REGNO from gdb's idea
of the current floating point register set. If REGNO is -1, update
- them all. */
+ them all. */
void
fill_fpregset (const struct regcache *regcache,
@@ -481,57 +490,37 @@ fill_fpregset (const struct regcache *regcache,
#define IA64_PSR_DD (1UL << 39)
static void
-enable_watchpoints_in_psr (struct regcache *regcache)
+enable_watchpoints_in_psr (ptid_t ptid)
{
+ struct regcache *regcache = get_thread_regcache (ptid);
ULONGEST psr;
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
if (!(psr & IA64_PSR_DB))
{
psr |= IA64_PSR_DB; /* Set the db bit - this enables hardware
- watchpoints and breakpoints. */
+ watchpoints and breakpoints. */
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
}
}
-static long
-fetch_debug_register (ptid_t ptid, int idx)
-{
- long val;
- int tid;
-
- tid = TIDGET (ptid);
- if (tid == 0)
- tid = PIDGET (ptid);
-
- val = ptrace (PT_READ_U, tid, (PTRACE_TYPE_ARG3) (PT_DBR + 8 * idx), 0);
-
- return val;
-}
+static long debug_registers[8];
static void
store_debug_register (ptid_t ptid, int idx, long val)
{
int tid;
- tid = TIDGET (ptid);
+ tid = ptid_get_lwp (ptid);
if (tid == 0)
- tid = PIDGET (ptid);
+ tid = ptid_get_pid (ptid);
(void) ptrace (PT_WRITE_U, tid, (PTRACE_TYPE_ARG3) (PT_DBR + 8 * idx), val);
}
static void
-fetch_debug_register_pair (ptid_t ptid, int idx, long *dbr_addr, long *dbr_mask)
-{
- if (dbr_addr)
- *dbr_addr = fetch_debug_register (ptid, 2 * idx);
- if (dbr_mask)
- *dbr_mask = fetch_debug_register (ptid, 2 * idx + 1);
-}
-
-static void
-store_debug_register_pair (ptid_t ptid, int idx, long *dbr_addr, long *dbr_mask)
+store_debug_register_pair (ptid_t ptid, int idx, long *dbr_addr,
+ long *dbr_mask)
{
if (dbr_addr)
store_debug_register (ptid, 2 * idx, *dbr_addr);
@@ -553,9 +542,11 @@ is_power_of_2 (int val)
}
static int
-ia64_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw)
+ia64_linux_insert_watchpoint (struct target_ops *self,
+ CORE_ADDR addr, int len, int rw,
+ struct expression *cond)
{
- ptid_t ptid = inferior_ptid;
+ struct lwp_info *lp;
int idx;
long dbr_addr, dbr_mask;
int max_watchpoints = 4;
@@ -565,10 +556,10 @@ ia64_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw)
for (idx = 0; idx < max_watchpoints; idx++)
{
- fetch_debug_register_pair (ptid, idx, NULL, &dbr_mask);
+ dbr_mask = debug_registers[idx * 2 + 1];
if ((dbr_mask & (0x3UL << 62)) == 0)
{
- /* Exit loop if both r and w bits clear */
+ /* Exit loop if both r and w bits clear. */
break;
}
}
@@ -594,16 +585,22 @@ ia64_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw)
return -1;
}
- store_debug_register_pair (ptid, idx, &dbr_addr, &dbr_mask);
- enable_watchpoints_in_psr (current_regcache);
+ debug_registers[2 * idx] = dbr_addr;
+ debug_registers[2 * idx + 1] = dbr_mask;
+ ALL_LWPS (lp)
+ {
+ store_debug_register_pair (lp->ptid, idx, &dbr_addr, &dbr_mask);
+ enable_watchpoints_in_psr (lp->ptid);
+ }
return 0;
}
static int
-ia64_linux_remove_watchpoint (CORE_ADDR addr, int len, int type)
+ia64_linux_remove_watchpoint (struct target_ops *self,
+ CORE_ADDR addr, int len, int type,
+ struct expression *cond)
{
- ptid_t ptid = inferior_ptid;
int idx;
long dbr_addr, dbr_mask;
int max_watchpoints = 4;
@@ -613,56 +610,76 @@ ia64_linux_remove_watchpoint (CORE_ADDR addr, int len, int type)
for (idx = 0; idx < max_watchpoints; idx++)
{
- fetch_debug_register_pair (ptid, idx, &dbr_addr, &dbr_mask);
+ dbr_addr = debug_registers[2 * idx];
+ dbr_mask = debug_registers[2 * idx + 1];
if ((dbr_mask & (0x3UL << 62)) && addr == (CORE_ADDR) dbr_addr)
{
+ struct lwp_info *lp;
+
+ debug_registers[2 * idx] = 0;
+ debug_registers[2 * idx + 1] = 0;
dbr_addr = 0;
dbr_mask = 0;
- store_debug_register_pair (ptid, idx, &dbr_addr, &dbr_mask);
+
+ ALL_LWPS (lp)
+ store_debug_register_pair (lp->ptid, idx, &dbr_addr, &dbr_mask);
+
return 0;
}
}
return -1;
}
+static void
+ia64_linux_new_thread (struct lwp_info *lp)
+{
+ int i, any;
+
+ any = 0;
+ for (i = 0; i < 8; i++)
+ {
+ if (debug_registers[i] != 0)
+ any = 1;
+ store_debug_register (lp->ptid, i, debug_registers[i]);
+ }
+
+ if (any)
+ enable_watchpoints_in_psr (lp->ptid);
+}
+
static int
ia64_linux_stopped_data_address (struct target_ops *ops, CORE_ADDR *addr_p)
{
CORE_ADDR psr;
- int tid;
- struct siginfo siginfo;
- ptid_t ptid = inferior_ptid;
- struct regcache *regcache = current_regcache;
+ siginfo_t siginfo;
+ struct regcache *regcache = get_current_regcache ();
- tid = TIDGET(ptid);
- if (tid == 0)
- tid = PIDGET (ptid);
-
- errno = 0;
- ptrace (PTRACE_GETSIGINFO, tid, (PTRACE_TYPE_ARG3) 0, &siginfo);
+ if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
+ return 0;
- if (errno != 0 || siginfo.si_signo != SIGTRAP ||
- (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
+ if (siginfo.si_signo != SIGTRAP
+ || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
return 0;
regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr);
psr |= IA64_PSR_DD; /* Set the dd bit - this will disable the watchpoint
- for the next instruction */
+ for the next instruction. */
regcache_cooked_write_unsigned (regcache, IA64_PSR_REGNUM, psr);
- *addr_p = (CORE_ADDR)siginfo.si_addr;
+ *addr_p = (CORE_ADDR) siginfo.si_addr;
return 1;
}
static int
-ia64_linux_stopped_by_watchpoint (void)
+ia64_linux_stopped_by_watchpoint (struct target_ops *ops)
{
CORE_ADDR addr;
- return ia64_linux_stopped_data_address (¤t_target, &addr);
+ return ia64_linux_stopped_data_address (ops, &addr);
}
static int
-ia64_linux_can_use_hw_breakpoint (int type, int cnt, int othertype)
+ia64_linux_can_use_hw_breakpoint (struct target_ops *self,
+ int type, int cnt, int othertype)
{
return 1;
}
@@ -673,12 +690,44 @@ ia64_linux_can_use_hw_breakpoint (int type, int cnt, int othertype)
static void
ia64_linux_fetch_register (struct regcache *regcache, int regnum)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
CORE_ADDR addr;
size_t size;
PTRACE_TYPE_RET *buf;
int pid, i;
- if (ia64_cannot_fetch_register (regnum))
+ /* r0 cannot be fetched but is always zero. */
+ if (regnum == IA64_GR0_REGNUM)
+ {
+ const gdb_byte zero[8] = { 0 };
+
+ gdb_assert (sizeof (zero) == register_size (gdbarch, regnum));
+ regcache_raw_supply (regcache, regnum, zero);
+ return;
+ }
+
+ /* fr0 cannot be fetched but is always zero. */
+ if (regnum == IA64_FR0_REGNUM)
+ {
+ const gdb_byte f_zero[16] = { 0 };
+
+ gdb_assert (sizeof (f_zero) == register_size (gdbarch, regnum));
+ regcache_raw_supply (regcache, regnum, f_zero);
+ return;
+ }
+
+ /* fr1 cannot be fetched but is always one (1.0). */
+ if (regnum == IA64_FR1_REGNUM)
+ {
+ const gdb_byte f_one[16] =
+ { 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
+
+ gdb_assert (sizeof (f_one) == register_size (gdbarch, regnum));
+ regcache_raw_supply (regcache, regnum, f_one);
+ return;
+ }
+
+ if (ia64_cannot_fetch_register (gdbarch, regnum))
{
regcache_raw_supply (regcache, regnum, NULL);
return;
@@ -691,8 +740,8 @@ ia64_linux_fetch_register (struct regcache *regcache, int regnum)
pid = ptid_get_pid (inferior_ptid);
/* This isn't really an address, but ptrace thinks of it as one. */
- addr = ia64_register_addr (regnum);
- size = register_size (current_gdbarch, regnum);
+ addr = ia64_register_addr (gdbarch, regnum);
+ size = register_size (gdbarch, regnum);
gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
buf = alloca (size);
@@ -704,7 +753,7 @@ ia64_linux_fetch_register (struct regcache *regcache, int regnum)
buf[i] = ptrace (PT_READ_U, pid, (PTRACE_TYPE_ARG3)addr, 0);
if (errno != 0)
error (_("Couldn't read register %s (#%d): %s."),
- gdbarch_register_name (current_gdbarch, regnum),
+ gdbarch_register_name (gdbarch, regnum),
regnum, safe_strerror (errno));
addr += sizeof (PTRACE_TYPE_RET);
@@ -716,10 +765,13 @@ ia64_linux_fetch_register (struct regcache *regcache, int regnum)
for all registers. */
static void
-ia64_linux_fetch_registers (struct regcache *regcache, int regnum)
+ia64_linux_fetch_registers (struct target_ops *ops,
+ struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
+ for (regnum = 0;
+ regnum < gdbarch_num_regs (get_regcache_arch (regcache));
+ regnum++)
ia64_linux_fetch_register (regcache, regnum);
else
ia64_linux_fetch_register (regcache, regnum);
@@ -730,12 +782,13 @@ ia64_linux_fetch_registers (struct regcache *regcache, int regnum)
static void
ia64_linux_store_register (const struct regcache *regcache, int regnum)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
CORE_ADDR addr;
size_t size;
PTRACE_TYPE_RET *buf;
int pid, i;
- if (ia64_cannot_store_register (regnum))
+ if (ia64_cannot_store_register (gdbarch, regnum))
return;
/* Cater for systems like GNU/Linux, that implement threads as
@@ -745,8 +798,8 @@ ia64_linux_store_register (const struct regcache *regcache, int regnum)
pid = ptid_get_pid (inferior_ptid);
/* This isn't really an address, but ptrace thinks of it as one. */
- addr = ia64_register_addr (regnum);
- size = register_size (current_gdbarch, regnum);
+ addr = ia64_register_addr (gdbarch, regnum);
+ size = register_size (gdbarch, regnum);
gdb_assert ((size % sizeof (PTRACE_TYPE_RET)) == 0);
buf = alloca (size);
@@ -759,7 +812,7 @@ ia64_linux_store_register (const struct regcache *regcache, int regnum)
ptrace (PT_WRITE_U, pid, (PTRACE_TYPE_ARG3)addr, buf[i]);
if (errno != 0)
error (_("Couldn't write register %s (#%d): %s."),
- gdbarch_register_name (current_gdbarch, regnum),
+ gdbarch_register_name (gdbarch, regnum),
regnum, safe_strerror (errno));
addr += sizeof (PTRACE_TYPE_RET);
@@ -770,26 +823,27 @@ ia64_linux_store_register (const struct regcache *regcache, int regnum)
this for all registers. */
static void
-ia64_linux_store_registers (struct regcache *regcache, int regnum)
+ia64_linux_store_registers (struct target_ops *ops,
+ struct regcache *regcache, int regnum)
{
if (regnum == -1)
- for (regnum = 0; regnum < gdbarch_num_regs (current_gdbarch); regnum++)
+ for (regnum = 0;
+ regnum < gdbarch_num_regs (get_regcache_arch (regcache));
+ regnum++)
ia64_linux_store_register (regcache, regnum);
else
ia64_linux_store_register (regcache, regnum);
}
-static LONGEST (*super_xfer_partial) (struct target_ops *, enum target_object,
- const char *, gdb_byte *, const gdb_byte *,
- ULONGEST, LONGEST);
+static target_xfer_partial_ftype *super_xfer_partial;
static LONGEST
ia64_linux_xfer_partial (struct target_ops *ops,
enum target_object object,
const char *annex,
gdb_byte *readbuf, const gdb_byte *writebuf,
- ULONGEST offset, LONGEST len)
+ ULONGEST offset, ULONGEST len)
{
if (object == TARGET_OBJECT_UNWIND_TABLE && writebuf == NULL && offset == 0)
return syscall (__NR_getunwind, readbuf, len);
@@ -798,12 +852,24 @@ ia64_linux_xfer_partial (struct target_ops *ops,
offset, len);
}
+/* For break.b instruction ia64 CPU forgets the immediate value and generates
+ SIGILL with ILL_ILLOPC instead of more common SIGTRAP with TRAP_BRKPT.
+ ia64 does not use gdbarch_decr_pc_after_break so we do not have to make any
+ difference for the signals here. */
+
+static int
+ia64_linux_status_is_event (int status)
+{
+ return WIFSTOPPED (status) && (WSTOPSIG (status) == SIGTRAP
+ || WSTOPSIG (status) == SIGILL);
+}
+
void _initialize_ia64_linux_nat (void);
void
_initialize_ia64_linux_nat (void)
{
- struct target_ops *t = linux_target ();
+ struct target_ops *t;
/* Fill in the generic GNU/Linux methods. */
t = linux_target ();
@@ -825,7 +891,7 @@ _initialize_ia64_linux_nat (void)
This PSR bit is set in ia64_linux_stopped_by_watchpoint when the
code there has determined that a hardware watchpoint has indeed
been hit. The CPU will then be able to execute one instruction
- without triggering a watchpoint. */
+ without triggering a watchpoint. */
t->to_have_steppable_watchpoint = 1;
t->to_can_use_hw_breakpoint = ia64_linux_can_use_hw_breakpoint;
@@ -836,4 +902,6 @@ _initialize_ia64_linux_nat (void)
/* Register the target. */
linux_nat_add_target (t);
+ linux_nat_set_new_thread (t, ia64_linux_new_thread);
+ linux_nat_set_status_is_event (t, ia64_linux_status_is_event);
}