X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Fmips-tdep.c;h=6e8ccd688a42af1be95f90654d190c2747b46448;hb=00923338dec84505addaf9cdeca2e9c844757824;hp=5a5a7164336ea21b531f2a2b7de98e31830bd18d;hpb=3e29f34a4eef29f5b159749ccb1efb8867b2e651;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 5a5a716433..6e8ccd688a 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -1,6 +1,6 @@ /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger. - Copyright (C) 1988-2014 Free Software Foundation, Inc. + Copyright (C) 1988-2015 Free Software Foundation, Inc. Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. @@ -73,6 +73,9 @@ static int micromips_insn_at_pc_has_delay_slot (struct gdbarch *gdbarch, static int mips16_insn_at_pc_has_delay_slot (struct gdbarch *gdbarch, CORE_ADDR addr, int mustbe32); +static void mips_print_float_info (struct gdbarch *, struct ui_file *, + struct frame_info *, const char *); + /* A useful bit in the CP0 status register (MIPS_PS_REGNUM). */ /* This bit is set if we are emulating 32-bit FPRs on a 64-bit chip. */ #define ST0_FR (1 << 26) @@ -379,12 +382,12 @@ mips_elf_make_msymbol_special (asymbol * sym, struct minimal_symbol *msym) if (ELF_ST_IS_MICROMIPS (st_other)) { - MSYMBOL_TARGET_FLAG_2 (msym) = 1; + MSYMBOL_TARGET_FLAG_MICROMIPS (msym) = 1; SET_MSYMBOL_VALUE_ADDRESS (msym, MSYMBOL_VALUE_RAW_ADDRESS (msym) | 1); } else if (ELF_ST_IS_MIPS16 (st_other)) { - MSYMBOL_TARGET_FLAG_1 (msym) = 1; + MSYMBOL_TARGET_FLAG_MIPS16 (msym) = 1; SET_MSYMBOL_VALUE_ADDRESS (msym, MSYMBOL_VALUE_RAW_ADDRESS (msym) | 1); } } @@ -394,7 +397,8 @@ mips_elf_make_msymbol_special (asymbol * sym, struct minimal_symbol *msym) static int msymbol_is_mips (struct minimal_symbol *msym) { - return !(MSYMBOL_TARGET_FLAG_1 (msym) | MSYMBOL_TARGET_FLAG_2 (msym)); + return !(MSYMBOL_TARGET_FLAG_MIPS16 (msym) + | MSYMBOL_TARGET_FLAG_MICROMIPS (msym)); } /* Return one iff MSYM refers to MIPS16 code. */ @@ -402,7 +406,7 @@ msymbol_is_mips (struct minimal_symbol *msym) static int msymbol_is_mips16 (struct minimal_symbol *msym) { - return MSYMBOL_TARGET_FLAG_1 (msym); + return MSYMBOL_TARGET_FLAG_MIPS16 (msym); } /* Return one iff MSYM refers to microMIPS code. */ @@ -410,7 +414,7 @@ msymbol_is_mips16 (struct minimal_symbol *msym) static int msymbol_is_micromips (struct minimal_symbol *msym) { - return MSYMBOL_TARGET_FLAG_2 (msym); + return MSYMBOL_TARGET_FLAG_MICROMIPS (msym); } /* Set the ISA bit in the main symbol too, complementing the corresponding @@ -1341,14 +1345,13 @@ mips_in_frame_stub (CORE_ADDR pc) return 0; /* If the PC is in __mips16_call_stub_*, this is a call/return stub. */ - if (strncmp (name, mips_str_mips16_call_stub, - strlen (mips_str_mips16_call_stub)) == 0) + if (startswith (name, mips_str_mips16_call_stub)) return 1; /* If the PC is in __call_stub_*, this is a call/return or a call stub. */ - if (strncmp (name, mips_str_call_stub, strlen (mips_str_call_stub)) == 0) + if (startswith (name, mips_str_call_stub)) return 1; /* If the PC is in __fn_stub_*, this is a call stub. */ - if (strncmp (name, mips_str_fn_stub, strlen (mips_str_fn_stub)) == 0) + if (startswith (name, mips_str_fn_stub)) return 1; return 0; /* Not a stub. */ @@ -3434,7 +3437,8 @@ restart: frame_offset = 0; for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += MIPS_INSN32_SIZE) { - unsigned long inst, high_word, low_word; + unsigned long inst, high_word; + long offset; int reg; this_non_prologue_insn = 0; @@ -3446,15 +3450,15 @@ restart: /* Save some code by pre-extracting some useful fields. */ high_word = (inst >> 16) & 0xffff; - low_word = inst & 0xffff; + offset = ((inst & 0xffff) ^ 0x8000) - 0x8000; reg = high_word & 0x1f; if (high_word == 0x27bd /* addiu $sp,$sp,-i */ || high_word == 0x23bd /* addi $sp,$sp,-i */ || high_word == 0x67bd) /* daddiu $sp,$sp,-i */ { - if (low_word & 0x8000) /* Negative stack adjustment? */ - frame_offset += 0x10000 - low_word; + if (offset < 0) /* Negative stack adjustment? */ + frame_offset -= offset; else /* Exit loop if a positive stack adjustment is found, which usually means that the stack cleanup code in the function @@ -3465,19 +3469,19 @@ restart: else if (((high_word & 0xFFE0) == 0xafa0) /* sw reg,offset($sp) */ && !regsize_is_64_bits) { - set_reg_offset (gdbarch, this_cache, reg, sp + low_word); + set_reg_offset (gdbarch, this_cache, reg, sp + offset); } else if (((high_word & 0xFFE0) == 0xffa0) /* sd reg,offset($sp) */ && regsize_is_64_bits) { /* Irix 6.2 N32 ABI uses sd instructions for saving $gp and $ra. */ - set_reg_offset (gdbarch, this_cache, reg, sp + low_word); + set_reg_offset (gdbarch, this_cache, reg, sp + offset); } else if (high_word == 0x27be) /* addiu $30,$sp,size */ { /* Old gcc frame, r30 is virtual frame pointer. */ - if ((long) low_word != frame_offset) - frame_addr = sp + low_word; + if (offset != frame_offset) + frame_addr = sp + offset; else if (this_frame && frame_reg == MIPS_SP_REGNUM) { unsigned alloca_adjust; @@ -3487,7 +3491,7 @@ restart: (this_frame, gdbarch_num_regs (gdbarch) + 30); frame_offset = 0; - alloca_adjust = (unsigned) (frame_addr - (sp + low_word)); + alloca_adjust = (unsigned) (frame_addr - (sp + offset)); if (alloca_adjust > 0) { /* FP > SP + frame_size. This may be because of @@ -3536,7 +3540,7 @@ restart: else if ((high_word & 0xFFE0) == 0xafc0 /* sw reg,offset($30) */ && !regsize_is_64_bits) { - set_reg_offset (gdbarch, this_cache, reg, frame_addr + low_word); + set_reg_offset (gdbarch, this_cache, reg, frame_addr + offset); } else if ((high_word & 0xFFE0) == 0xE7A0 /* swc1 freg,n($sp) */ || (high_word & 0xF3E0) == 0xA3C0 /* sx reg,n($s8) */ @@ -3808,7 +3812,7 @@ mips_stub_frame_sniffer (const struct frame_unwind *self, msym = lookup_minimal_symbol_by_pc (pc); if (msym.minsym != NULL && MSYMBOL_LINKAGE_NAME (msym.minsym) != NULL - && strncmp (MSYMBOL_LINKAGE_NAME (msym.minsym), ".pic.", 5) == 0) + && startswith (MSYMBOL_LINKAGE_NAME (msym.minsym), ".pic.")) return 1; return 0; @@ -6386,6 +6390,94 @@ mips_print_register (struct ui_file *file, struct frame_info *frame, &opts, 0, file); } +/* Print IEEE exception condition bits in FLAGS. */ + +static void +print_fpu_flags (struct ui_file *file, int flags) +{ + if (flags & (1 << 0)) + fputs_filtered (" inexact", file); + if (flags & (1 << 1)) + fputs_filtered (" uflow", file); + if (flags & (1 << 2)) + fputs_filtered (" oflow", file); + if (flags & (1 << 3)) + fputs_filtered (" div0", file); + if (flags & (1 << 4)) + fputs_filtered (" inval", file); + if (flags & (1 << 5)) + fputs_filtered (" unimp", file); + fputc_filtered ('\n', file); +} + +/* Print interesting information about the floating point processor + (if present) or emulator. */ + +static void +mips_print_float_info (struct gdbarch *gdbarch, struct ui_file *file, + struct frame_info *frame, const char *args) +{ + int fcsr = mips_regnum (gdbarch)->fp_control_status; + enum mips_fpu_type type = MIPS_FPU_TYPE (gdbarch); + ULONGEST fcs = 0; + int i; + + if (fcsr == -1 || !read_frame_register_unsigned (frame, fcsr, &fcs)) + type = MIPS_FPU_NONE; + + fprintf_filtered (file, "fpu type: %s\n", + type == MIPS_FPU_DOUBLE ? "double-precision" + : type == MIPS_FPU_SINGLE ? "single-precision" + : "none / unused"); + + if (type == MIPS_FPU_NONE) + return; + + fprintf_filtered (file, "reg size: %d bits\n", + register_size (gdbarch, mips_regnum (gdbarch)->fp0) * 8); + + fputs_filtered ("cond :", file); + if (fcs & (1 << 23)) + fputs_filtered (" 0", file); + for (i = 1; i <= 7; i++) + if (fcs & (1 << (24 + i))) + fprintf_filtered (file, " %d", i); + fputc_filtered ('\n', file); + + fputs_filtered ("cause :", file); + print_fpu_flags (file, (fcs >> 12) & 0x3f); + fputs ("mask :", stdout); + print_fpu_flags (file, (fcs >> 7) & 0x1f); + fputs ("flags :", stdout); + print_fpu_flags (file, (fcs >> 2) & 0x1f); + + fputs_filtered ("rounding: ", file); + switch (fcs & 3) + { + case 0: fputs_filtered ("nearest\n", file); break; + case 1: fputs_filtered ("zero\n", file); break; + case 2: fputs_filtered ("+inf\n", file); break; + case 3: fputs_filtered ("-inf\n", file); break; + } + + fputs_filtered ("flush :", file); + if (fcs & (1 << 21)) + fputs_filtered (" nearest", file); + if (fcs & (1 << 22)) + fputs_filtered (" override", file); + if (fcs & (1 << 24)) + fputs_filtered (" zero", file); + if ((fcs & (0xb << 21)) == 0) + fputs_filtered (" no", file); + fputc_filtered ('\n', file); + + fprintf_filtered (file, "nan2008 : %s\n", fcs & (1 << 18) ? "yes" : "no"); + fprintf_filtered (file, "abs2008 : %s\n", fcs & (1 << 19) ? "yes" : "no"); + fputc_filtered ('\n', file); + + default_print_float_info (gdbarch, file, frame, args); +} + /* Replacement for generic do_registers_info. Print regs in pretty columns. */ @@ -7753,8 +7845,8 @@ mips_skip_mips16_trampoline_code (struct frame_info *frame, CORE_ADDR pc) /* If the PC is in __call_stub_* or __fn_stub*, this is one of the compiler-generated call or call/return stubs. */ - if (strncmp (name, mips_str_fn_stub, strlen (mips_str_fn_stub)) == 0 - || strncmp (name, mips_str_call_stub, strlen (mips_str_call_stub)) == 0) + if (startswith (name, mips_str_fn_stub) + || startswith (name, mips_str_call_stub)) { if (pc == start_addr) /* This is the 'call' part of a call stub. Call this helper @@ -7841,7 +7933,7 @@ mips_skip_pic_trampoline_code (struct frame_info *frame, CORE_ADDR pc) if (msym.minsym == NULL || BMSYMBOL_VALUE_ADDRESS (msym) != pc || MSYMBOL_LINKAGE_NAME (msym.minsym) == NULL - || strncmp (MSYMBOL_LINKAGE_NAME (msym.minsym), ".pic.", 5) != 0) + || !startswith (MSYMBOL_LINKAGE_NAME (msym.minsym), ".pic.")) return 0; /* A two-instruction header. */ @@ -8006,7 +8098,7 @@ mips_find_abi_section (bfd *abfd, asection *sect, void *obj) if (*abip != MIPS_ABI_UNKNOWN) return; - if (strncmp (name, ".mdebug.", 8) != 0) + if (!startswith (name, ".mdebug.")) return; if (strcmp (name, ".mdebug.abi32") == 0) @@ -8031,11 +8123,11 @@ mips_find_long_section (bfd *abfd, asection *sect, void *obj) int *lbp = (int *) obj; const char *name = bfd_get_section_name (abfd, sect); - if (strncmp (name, ".gcc_compiled_long32", 20) == 0) + if (startswith (name, ".gcc_compiled_long32")) *lbp = 32; - else if (strncmp (name, ".gcc_compiled_long64", 20) == 0) + else if (startswith (name, ".gcc_compiled_long64")) *lbp = 64; - else if (strncmp (name, ".gcc_compiled_long", 18) == 0) + else if (startswith (name, ".gcc_compiled_long")) warning (_("unrecognized .gcc_compiled_longXX")); } @@ -8736,6 +8828,8 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_push_dummy_code (gdbarch, mips_push_dummy_code); set_gdbarch_frame_align (gdbarch, mips_frame_align); + set_gdbarch_print_float_info (gdbarch, mips_print_float_info); + set_gdbarch_convert_register_p (gdbarch, mips_convert_register_p); set_gdbarch_register_to_value (gdbarch, mips_register_to_value); set_gdbarch_value_to_register (gdbarch, mips_value_to_register);