X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Fmips-tdep.h;h=99546201395c65b35f9c6a519640b27f5d9cd545;hb=348fe36b1d64f12c60e08f6313520b3191663063;hp=85c40d94898c2020d16c9ceefe5a3ef0333da4f0;hpb=e38d4e1aae6fb86cfae320ae6ae9b2b48cd1ddb7;p=deliverable%2Fbinutils-gdb.git

diff --git a/gdb/mips-tdep.h b/gdb/mips-tdep.h
index 85c40d9489..9954620139 100644
--- a/gdb/mips-tdep.h
+++ b/gdb/mips-tdep.h
@@ -1,6 +1,6 @@
 /* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger.
 
-   Copyright (C) 2002, 2003, 2007, 2008 Free Software Foundation, Inc.
+   Copyright (C) 2002-2020 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -20,9 +20,11 @@
 #ifndef MIPS_TDEP_H
 #define MIPS_TDEP_H
 
+#include "objfiles.h"
+
 struct gdbarch;
 
-/* All the possible MIPS ABIs. */
+/* All the possible MIPS ABIs.  */
 enum mips_abi
   {
     MIPS_ABI_UNKNOWN = 0,
@@ -38,6 +40,18 @@ enum mips_abi
 /* Return the MIPS ABI associated with GDBARCH.  */
 enum mips_abi mips_abi (struct gdbarch *gdbarch);
 
+/* Base and compressed MIPS ISA variations.  */
+enum mips_isa
+  {
+    ISA_MIPS = -1,		/* mips_compression_string depends on it.  */
+    ISA_MIPS16,
+    ISA_MICROMIPS
+  };
+
+/* Corresponding MSYMBOL_TARGET_FLAG aliases.  */
+#define MSYMBOL_TARGET_FLAG_MIPS16 MSYMBOL_TARGET_FLAG_1
+#define MSYMBOL_TARGET_FLAG_MICROMIPS MSYMBOL_TARGET_FLAG_2
+
 /* Return the MIPS ISA's register size.  Just a short cut to the BFD
    architecture's word size.  */
 extern int mips_isa_regsize (struct gdbarch *gdbarch);
@@ -53,6 +67,8 @@ struct mips_regnum
   int cause;		/* Describes last exception.  */
   int hi;		/* Multiply/divide temp.  */
   int lo;		/* ...  */
+  int dspacc;		/* SmartMIPS/DSP accumulators.  */
+  int dspctl;		/* DSP control.  */
 };
 extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
 
@@ -66,7 +82,7 @@ enum mips_fpu_type
   MIPS_FPU_NONE			/* No floating point.  */
 };
 
-/* MIPS specific per-architecture information */
+/* MIPS specific per-architecture information.  */
 struct gdbarch_tdep
 {
   /* from the elf header */
@@ -75,6 +91,7 @@ struct gdbarch_tdep
   /* mips options */
   enum mips_abi mips_abi;
   enum mips_abi found_abi;
+  enum mips_isa mips_isa;
   enum mips_fpu_type mips_fpu_type;
   int mips_last_arg_regnum;
   int mips_last_fp_arg_regnum;
@@ -108,8 +125,10 @@ enum
   MIPS_ZERO_REGNUM = 0,		/* Read-only register, always 0.  */
   MIPS_AT_REGNUM = 1,
   MIPS_V0_REGNUM = 2,		/* Function integer return value.  */
-  MIPS_A0_REGNUM = 4,		/* Loc of first arg during a subr call */
+  MIPS_A0_REGNUM = 4,		/* Loc of first arg during a subr call.  */
+  MIPS_S2_REGNUM = 18,		/* Contains return address in MIPS16 thunks. */
   MIPS_T9_REGNUM = 25,		/* Contains address of callee in PIC.  */
+  MIPS_GP_REGNUM = 28,
   MIPS_SP_REGNUM = 29,
   MIPS_RA_REGNUM = 31,
   MIPS_PS_REGNUM = 32,		/* Contains processor status.  */
@@ -119,15 +138,12 @@ enum
   MIPS_EMBED_CAUSE_REGNUM = 36,
   MIPS_EMBED_PC_REGNUM = 37,
   MIPS_EMBED_FP0_REGNUM = 38,
-  MIPS_UNUSED_REGNUM = 73,	/* Never used, FIXME */
+  MIPS_UNUSED_REGNUM = 73,	/* Never used, FIXME.  */
   MIPS_FIRST_EMBED_REGNUM = 74,	/* First CP0 register for embedded use.  */
   MIPS_PRID_REGNUM = 89,	/* Processor ID.  */
   MIPS_LAST_EMBED_REGNUM = 89	/* Last one.  */
 };
 
-/* Defined in mips-tdep.c and used in remote-mips.c */
-extern void deprecated_mips_set_processor_regs_hack (void);
-
 /* Instruction sizes and other useful constants.  */
 enum
 {
@@ -138,18 +154,41 @@ enum
 };
 
 /* Single step based on where the current instruction will take us.  */
-extern int mips_software_single_step (struct frame_info *frame);
+extern std::vector<CORE_ADDR> mips_software_single_step
+  (struct regcache *regcache);
+
+/* Strip the ISA (compression) bit off from ADDR.  */
+extern CORE_ADDR mips_unmake_compact_addr (CORE_ADDR addr);
+
+/* Tell if the program counter value in MEMADDR is in a standard
+   MIPS function.  */
+extern int mips_pc_is_mips (CORE_ADDR memaddr);
 
 /* Tell if the program counter value in MEMADDR is in a MIPS16
    function.  */
-extern int mips_pc_is_mips16 (bfd_vma memaddr);
+extern int mips_pc_is_mips16 (struct gdbarch *gdbarch, CORE_ADDR memaddr);
+
+/* Tell if the program counter value in MEMADDR is in a microMIPS
+   function.  */
+extern int mips_pc_is_micromips (struct gdbarch *gdbarch, CORE_ADDR memaddr);
 
-/* Return the currently configured (or set) saved register size. */
+/* Return the currently configured (or set) saved register size.  */
 extern unsigned int mips_abi_regsize (struct gdbarch *gdbarch);
 
+/* Make PC the address of the next instruction to execute.  */
+extern void mips_write_pc (struct regcache *regcache, CORE_ADDR pc);
+
 /* Target descriptions which only indicate the size of general
    registers.  */
 extern struct target_desc *mips_tdesc_gp32;
 extern struct target_desc *mips_tdesc_gp64;
 
+/* Return non-zero if PC is in a MIPS SVR4 lazy binding stub section.  */
+
+static inline int
+in_mips_stubs_section (CORE_ADDR pc)
+{
+  return pc_in_section (pc, ".MIPS.stubs");
+}
+
 #endif /* MIPS_TDEP_H */