X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=gdb%2Fppc-tdep.h;h=6e5d3b235832ae767ff1ff286d6b9986bc953821;hb=794ac4286c05ea60bbe06ad831d6951646aa1486;hp=ac08c617583dde8406e84c33687ca5029e91f8d2;hpb=cc98b5cc8ab035f06066f73f844ce738e3f9c4fb;p=deliverable%2Fbinutils-gdb.git diff --git a/gdb/ppc-tdep.h b/gdb/ppc-tdep.h index ac08c61758..6e5d3b2358 100644 --- a/gdb/ppc-tdep.h +++ b/gdb/ppc-tdep.h @@ -1,7 +1,7 @@ /* Target-dependent code for GDB, the GNU debugger. - Copyright 2000, 2001, 2002, 2003, 2004 Free Software Foundation, - Inc. + Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2007 + Free Software Foundation, Inc. This file is part of GDB. @@ -17,8 +17,8 @@ You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, - Boston, MA 02111-1307, USA. */ + Foundation, Inc., 51 Franklin Street, Fifth Floor, + Boston, MA 02110-1301, USA. */ #ifndef PPC_TDEP_H #define PPC_TDEP_H @@ -33,13 +33,13 @@ struct type; enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype, struct regcache *regcache, - void *readbuf, - const void *writebuf); + gdb_byte *readbuf, + const gdb_byte *writebuf); enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, struct type *valtype, struct regcache *regcache, - void *readbuf, - const void *writebuf); + gdb_byte *readbuf, + const gdb_byte *writebuf); CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, @@ -56,7 +56,7 @@ CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR struct_addr); CORE_ADDR ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch, CORE_ADDR bpaddr); -int ppc_linux_memory_remove_breakpoint (CORE_ADDR addr, char *contents_cache); +int ppc_linux_memory_remove_breakpoint (struct bp_target_info *bp_tgt); struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void); void ppc_linux_supply_gregset (struct regcache *regcache, int regnum, const void *gregs, size_t size, @@ -68,8 +68,8 @@ void ppc_linux_supply_fpregset (const struct regset *regset, enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype, struct regcache *regcache, - void *readbuf, - const void *writebuf); + gdb_byte *readbuf, + const gdb_byte *writebuf); /* From rs6000-tdep.c... */ int altivec_register_p (int regno); @@ -144,7 +144,6 @@ struct gdbarch_tdep int wordsize; /* size in bytes of fixed-point word */ const struct reg *regs; /* from current variant */ int ppc_gp0_regnum; /* GPR register 0 */ - int ppc_gprs_pseudo_p; /* non-zero if GPRs are pseudo-registers */ int ppc_toc_regnum; /* TOC register */ int ppc_ps_regnum; /* Processor (or machine) status (%msr) */ int ppc_cr_regnum; /* Condition register */ @@ -152,21 +151,45 @@ struct gdbarch_tdep int ppc_ctr_regnum; /* Count register */ int ppc_xer_regnum; /* Integer exception register */ - /* On PPC and RS6000 variants that have no floating-point - registers, the next two members will be -1. */ + /* Not all PPC and RS6000 variants will have the registers + represented below. A -1 is used to indicate that the register + is not present in this variant. */ + + /* Floating-point registers. */ int ppc_fp0_regnum; /* floating-point register 0 */ - int ppc_fpscr_regnum; /* Floating point status and condition - register */ + int ppc_fpscr_regnum; /* fp status and condition register */ + + /* Segment registers. */ + int ppc_sr0_regnum; /* segment register 0 */ + + /* Multiplier-Quotient Register (older POWER architectures only). */ + int ppc_mq_regnum; - int ppc_mq_regnum; /* Multiply/Divide extension register */ + /* Altivec registers. */ int ppc_vr0_regnum; /* First AltiVec register */ int ppc_vrsave_regnum; /* Last AltiVec register */ + + /* SPE registers. */ + int ppc_ev0_upper_regnum; /* First GPR upper half register */ int ppc_ev0_regnum; /* First ev register */ int ppc_ev31_regnum; /* Last ev register */ int ppc_acc_regnum; /* SPE 'acc' register */ int ppc_spefscr_regnum; /* SPE 'spefscr' register */ - int lr_frame_offset; /* Offset to ABI specific location where - link register is saved. */ + + /* Offset to ABI specific location where link register is saved. */ + int lr_frame_offset; + + /* An array of integers, such that sim_regno[I] is the simulator + register number for GDB register number I, or -1 if the + simulator does not implement that register. */ + int *sim_regno; + + /* Minimum possible text address. */ + CORE_ADDR text_segment_base; + + /* ISA-specific types. */ + struct type *ppc_builtin_type_vec64; + struct type *ppc_builtin_type_vec128; }; @@ -237,6 +260,7 @@ enum ppc_spr_sprg1 = 273, ppc_spr_sprg2 = 274, ppc_spr_sprg3 = 275, + ppc_spr_asr = 280, ppc_spr_ear = 282, ppc_spr_tbl = 284, ppc_spr_tbu = 285, @@ -279,13 +303,19 @@ enum ppc_spr_m_casid = 793, ppc_spr_md_ap = 794, ppc_spr_md_epn = 795, - ppc_spr_md_twb = 796, + ppc_spr_m_twb = 796, ppc_spr_md_twc = 797, ppc_spr_md_rpn = 798, ppc_spr_m_tw = 799, + ppc_spr_mi_dbcam = 816, + ppc_spr_mi_dbram0 = 817, + ppc_spr_mi_dbram1 = 818, ppc_spr_md_dbcam = 824, + ppc_spr_md_cam = 824, ppc_spr_md_dbram0 = 825, + ppc_spr_md_ram0 = 825, ppc_spr_md_dbram1 = 826, + ppc_spr_md_ram1 = 826, ppc_spr_ummcr0 = 936, ppc_spr_upmc1 = 937, ppc_spr_upmc2 = 938, @@ -357,4 +387,10 @@ enum ppc_spr_pbu2 = 1023 }; -#endif +/* Instruction size. */ +#define PPC_INSN_SIZE 4 + +/* Estimate for the maximum number of instrctions in a function epilogue. */ +#define PPC_MAX_EPILOGUE_INSTRUCTIONS 52 + +#endif /* ppc-tdep.h */