X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=include%2FChangeLog;h=51792be23bc8e195c479f5bfea737e717361a38f;hb=1d61f7949f77796ee407466f3ca7f42dcde9251b;hp=8631956c1412a0865c0b2a43be19f412550bc7e0;hpb=c2c4ff8d52a2cd3263a547b0384692498714aa1b;p=deliverable%2Fbinutils-gdb.git diff --git a/include/ChangeLog b/include/ChangeLog index 8631956c14..51792be23b 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,74 @@ +2016-12-20 Andrew Waterman + Kuan-Lin Chen + + * elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32. + +2016-12-16 fincs + + * bfdlink.h (struct bfd_link_info): Add gc_keep_exported. + +2016-12-14 Maciej W. Rozycki + + * elf/mips.h (Elf_Internal_ABIFlags_v0): Also declare struct + typedef as `elf_internal_abiflags_v0'. + +2016-12-13 Renlin Li + + * opcode/aarch64.h (aarch64_operand_class): Remove + AARCH64_OPND_CLASS_CP_REG. + (enum aarch64_opnd): Change AARCH64_OPND_Cn to AARCH64_OPND_CRn, + AARCH64_OPND_Cm to AARCH64_OPND_CRm. + (aarch64_opnd_qualifier): Define AARCH64_OPND_QLF_CR qualifier. + +2016-12-09 Maciej W. Rozycki + + * opcode/mips.h: Remove references to `>' operand code. + +2016-12-07 Maciej W. Rozycki + + * opcode/mips.h (INSN_CHIP_MASK): Update according to bit use. + +2016-12-07 Maciej W. Rozycki + + * opcode/mips.h (ASE_DSPR3): Add a comment. + +2016-12-05 Szabolcs Nagy + + * opcode/arm.h (ARM_EXT2_V8_3A, ARM_AEXT2_V8_3A): New. + (ARM_ARCH_V8_3A): New. + +2016-11-29 Claudiu Zissulescu + + * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE + instruction classes. + +2016-11-22 Jose E. Marchesi + + * opcode/sparc.h (sparc_opcode_arch): New fields hwcaps and + hwcaps2. + +2016-11-22 Alan Modra + + PR 20744 + * opcode/ppc.h: Define VLE insns using 16A and 16D relocs. + +2016-11-03 David Tolnay + Mark Wielaard + + * demangle.h (DMGL_RUST): New macro. + (DMGL_STYLE_MASK): Add DMGL_RUST. + (demangling_styles): Add dlang_rust. + (RUST_DEMANGLING_STYLE_STRING): New macro. + (RUST_DEMANGLING): New macro. + (rust_demangle): New prototype. + (rust_is_mangled): Likewise. + (rust_demangle_sym): Likewise. + +2016-11-07 Jason Merrill + + * demangle.h (enum demangle_component_type): Add + DEMANGLE_COMPONENT_NOEXCEPT, DEMANGLE_COMPONENT_THROW_SPEC. + 2016-11-18 Szabolcs Nagy * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_IMM_ROT1,