X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=include%2Fopcode%2FChangeLog;h=ce5c71de0755112be5bd0b457d40e56cdc8c657a;hb=b3e14edafcdc558d724452ee5b803ff096c32d0f;hp=84b862f105d0c0352b834727470730f8149a1af6;hpb=ea783ef3a075b7581b93615f8aec39490d272b4f;p=deliverable%2Fbinutils-gdb.git diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 84b862f105..ce5c71de07 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,179 @@ +2012-09-04 Sergey A. Guriev + + * ia64.h (ia64_opnd): Add new operand types. + +2012-08-21 David S. Miller + + * sparc.h (F3F4): New macro. + +2012-08-13 Ian Bolton + Laurent Desnogues + Jim MacArthur + Marcus Shawcroft + Nigel Stephens + Ramana Radhakrishnan + Richard Earnshaw + Sofiane Naci + Tejas Belagod + Yufeng Zhang + + * aarch64.h: New file. + +2012-08-13 Richard Sandiford + Maciej W. Rozycki + + * mips.h (mips_opcode): Add the exclusions field. + (OPCODE_IS_MEMBER): Remove macro. + (cpu_is_member): New inline function. + (opcode_is_member): Likewise. + +2012-07-31 Chao-Ying Fu + Catherine Moore + Maciej W. Rozycki + + * mips.h: Document microMIPS DSP ASE usage. + (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for + microMIPS DSP ASE support. + (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. + (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. + (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. + (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. + (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. + (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. + (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. + +2012-07-06 Maciej W. Rozycki + + * mips.h: Fix a typo in description. + +2012-06-07 Georg-Johann Lay + + * avr.h: (AVR_ISA_XCH): New define. + (AVR_ISA_XMEGA): Use it. + (XCH, LAS, LAT, LAC): New XMEGA opcodes. + +2012-05-15 James Murray + + * m68hc11.h: Add XGate definitions. + (struct m68hc11_opcode): Add xg_mask field. + +2012-05-14 Catherine Moore + Maciej W. Rozycki + Rhonda Wittels + + * ppc.h (PPC_OPCODE_VLE): New definition. + (PPC_OP_SA): New macro. + (PPC_OP_SE_VLE): New macro. + (PPC_OP): Use a variable shift amount. + (powerpc_operand): Update comments. + (PPC_OPSHIFT_INV): New macro. + (PPC_OPERAND_CR): Replace with... + (PPC_OPERAND_CR_BIT): ...this and + (PPC_OPERAND_CR_REG): ...this. + + +2012-05-03 Sean Keys + + * xgate.h: Header file for XGATE assembler. + +2012-04-27 David S. Miller + + * sparc.h: Document new arg code' )' for crypto RS3 + immediates. + + * sparc.h (struct sparc_opcode): New field 'hwcaps'. + F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2, + F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS, + F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete. + (HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC, + HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF, + HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU, + HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES, + HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1, + HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE, + HWCAP_CBCOND, HWCAP_CRC32): New defines. + +2012-03-10 Edmar Wienskoski + + * ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR. + +2012-02-27 Alan Modra + + * crx.h (cst4_map): Update declaration. + +2012-02-25 Walter Lee + + * tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS, + TILEGX_OPC_LD_TLS. + * tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS, + TILEPRO_OPC_LW_TLS_SN. + +2012-02-08 H.J. Lu + + * i386.h (XACQUIRE_PREFIX_OPCODE): New. + (XRELEASE_PREFIX_OPCODE): Likewise. + +2011-12-08 Andrew Pinski + Adam Nemet + + * mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2. + (INSN_OCTEON2): New macro. + (CPU_OCTEON2): New macro. + (OPCODE_IS_MEMBER): Add Octeon2. + +2011-11-29 Andrew Pinski + + * mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP. + (INSN_OCTEONP): New macro. + (CPU_OCTEONP): New macro. + (OPCODE_IS_MEMBER): Add Octeon+. + (M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values. + +2011-11-01 DJ Delorie + + * rl78.h: New file. + +2011-10-24 Maciej W. Rozycki + + * mips.h: Fix a typo in description. + +2011-09-21 David S. Miller + + * sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int. + (F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2, + F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS, + F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits. + +2011-08-09 Chao-ying Fu + Maciej W. Rozycki + + * mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros. + (OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine. + (INSN_ASE_MASK): Add the MCU bit. + (INSN_MCU): New macro. + (M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values. + (MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros. + +2011-08-09 Maciej W. Rozycki + + * mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros. + (INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise. + (INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise. + (INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise. + (INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise. + (INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise. + (INSN2_READ_GPR_MMN): Likewise. + (INSN2_READ_FPR_D): Change the bit used. + (INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise. + (INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise. + (INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise. + (INSN2_COND_BRANCH): Likewise. + (INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros. + (INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise. + (INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise. + (INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise. + (INSN2_MOD_GPR_MN): Likewise. + 2011-08-05 David S. Miller * sparc.h: Document new format codes '4', '5', and '('. @@ -15,7 +191,7 @@ (MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): Remove macros. 2011-07-24 Chao-ying Fu - Maciej W. Rozycki + Maciej W. Rozycki * mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros. (OP_MASK_STYPE, OP_SH_STYPE): Likewise. @@ -578,7 +754,7 @@ 2008-11-28 Joshua Kinard * mips.h: Define CPU_R14000, CPU_R16000. - (OPCODE_IS_MEMBER): Include R14000, R16000 in test. + (OPCODE_IS_MEMBER): Include R14000, R16000 in test. 2008-11-18 Catherine Moore @@ -817,9 +993,9 @@ * i386.h: Replace CpuMNI with CpuSSSE3. 2006-09-26 Mark Shinwell - Joseph Myers - Ian Lance Taylor - Ben Elliston + Joseph Myers + Ian Lance Taylor + Ben Elliston * arm.h (ARM_CEXT_IWMMXT2, ARM_ARCH_IWMMXT2): Define. @@ -862,18 +1038,18 @@ * m68k.h (mcf_mask): Define. 2006-05-05 Thiemo Seufer - David Ung + David Ung * mips.h (enum): Add macro M_CACHE_AB. 2006-05-04 Thiemo Seufer - Nigel Stephens + Nigel Stephens David Ung * mips.h: Add INSN_SMARTMIPS define. 2006-04-30 Thiemo Seufer - David Ung + David Ung * mips.h: Defines udi bits and masks. Add description of characters which may appear in the args field of udi