X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=include%2Fopcode%2Falpha.h;h=9f2938d9614c8ba08e094b4b491dc223843ff176;hb=5233f39b8b999f2675fb9493149e878c281e1d60;hp=06ba20fdbca113a085b8f4f2c162c9731b9e07c7;hpb=e98fe4f7b54cbdf29aef9287bbb1bea8801dd05a;p=deliverable%2Fbinutils-gdb.git diff --git a/include/opcode/alpha.h b/include/opcode/alpha.h index 06ba20fdbc..9f2938d961 100644 --- a/include/opcode/alpha.h +++ b/include/opcode/alpha.h @@ -1,29 +1,28 @@ /* alpha.h -- Header file for Alpha opcode table - Copyright 1996 Free Software Foundation, Inc. + Copyright (C) 1996-2020 Free Software Foundation, Inc. Contributed by Richard Henderson , patterned after the PPC opcode table written by Ian Lance Taylor. -This file is part of GDB, GAS, and the GNU binutils. + This file is part of GDB, GAS, and the GNU binutils. -GDB, GAS, and the GNU binutils are free software; you can redistribute -them and/or modify them under the terms of the GNU General Public -License as published by the Free Software Foundation; either version -1, or (at your option) any later version. + GDB, GAS, and the GNU binutils are free software; you can redistribute + them and/or modify them under the terms of the GNU General Public + License as published by the Free Software Foundation; either version 3, + or (at your option) any later version. -GDB, GAS, and the GNU binutils are distributed in the hope that they -will be useful, but WITHOUT ANY WARRANTY; without even the implied -warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See -the GNU General Public License for more details. + GDB, GAS, and the GNU binutils are distributed in the hope that they + will be useful, but WITHOUT ANY WARRANTY; without even the implied + warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See + the GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with this file; see the file COPYING. If not, write to the Free -Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + You should have received a copy of the GNU General Public License + along with this file; see the file COPYING3. If not, write to the Free + Software Foundation, 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ #ifndef OPCODE_ALPHA_H #define OPCODE_ALPHA_H -#include "bfd.h" /* for bfd_reloc_code_real_type */ - /* The opcode table is an array of struct alpha_opcode. */ struct alpha_opcode @@ -41,8 +40,8 @@ struct alpha_opcode match (and are presumably filled in by operands). */ unsigned mask; - /* One bit flags for the opcode. These are primarily used to - indicate specific processors and environments support the + /* One bit flags for the opcode. These are primarily used to + indicate specific processors and environments support the instructions. The defined values are listed below. */ unsigned flags; @@ -56,16 +55,20 @@ struct alpha_opcode in the order in which the disassembler should consider instructions. */ extern const struct alpha_opcode alpha_opcodes[]; -extern const int alpha_num_opcodes; +extern const unsigned alpha_num_opcodes; /* Values defined for the flags field of a struct alpha_opcode. */ /* CPU Availability */ -#define AXP_OPCODE_ALL 00001 -#define AXP_OPCODE_EV4 00002 -/* EV45 is not programatically different */ -#define AXP_OPCODE_EV5 00004 -#define AXP_OPCODE_EV56 00010 +#define AXP_OPCODE_BASE 0x0001 /* Base architecture -- all cpus. */ +#define AXP_OPCODE_EV4 0x0002 /* EV4 specific PALcode insns. */ +#define AXP_OPCODE_EV5 0x0004 /* EV5 specific PALcode insns. */ +#define AXP_OPCODE_EV6 0x0008 /* EV6 specific PALcode insns. */ +#define AXP_OPCODE_BWX 0x0100 /* Byte/word extension (amask bit 0). */ +#define AXP_OPCODE_CIX 0x0200 /* "Count" extension (amask bit 1). */ +#define AXP_OPCODE_MAX 0x0400 /* Multimedia extension (amask bit 8). */ + +#define AXP_OPCODE_NOPAL (~(AXP_OPCODE_EV4|AXP_OPCODE_EV5|AXP_OPCODE_EV6)) /* A macro to extract the major opcode from an instruction. */ #define AXP_OP(i) (((i) >> 26) & 0x3F) @@ -79,13 +82,16 @@ extern const int alpha_num_opcodes; struct alpha_operand { /* The number of bits in the operand. */ - int bits; + unsigned int bits : 5; /* How far the operand is left shifted in the instruction. */ - int shift; + unsigned int shift : 5; /* The default relocation type for this operand. */ - bfd_reloc_code_real_type default_reloc; + signed int default_reloc : 16; + + /* One bit syntax flags. */ + unsigned int flags : 16; /* Insertion function. This is used by the assembler. To insert an operand value into an instruction, check this field. @@ -103,8 +109,7 @@ struct alpha_operand string (the operand will be inserted in any case). If the operand value is legal, *ERRMSG will be unchanged (most operands can accept any value). */ - unsigned (*insert) PARAMS ((unsigned instruction, int op, - const char **errmsg)); + unsigned (*insert) (unsigned instruction, int op, const char **errmsg); /* Extraction function. This is used by the disassembler. To extract this operand type from an instruction, check this field. @@ -123,17 +128,14 @@ struct alpha_operand non-zero if this operand type can not actually be extracted from this operand (i.e., the instruction does not match). If the operand is valid, *INVALID will not be changed. */ - int (*extract) PARAMS ((unsigned instruction, int *invalid)); - - /* One bit syntax flags. */ - unsigned flags; + int (*extract) (unsigned instruction, int *invalid); }; /* Elements in the table are retrieved by indexing with values from the operands field of the alpha_opcodes table. */ extern const struct alpha_operand alpha_operands[]; -extern const int alpha_num_operands; +extern const unsigned alpha_num_operands; /* Values defined for the flags field of a struct alpha_operand. */