X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=include%2Fopcode%2Frl78.h;h=bcc5e6dfba09f5d4e4c49cdea3bb1bb808cd9ee7;hb=9e790a80160676e7fd3fb8be6cf3c1c77d9ded81;hp=72adf1432650f140705811cdb56067350e2617c2;hpb=f63c17760fab6fbf56ba500f7a8c746aa15b34a4;p=deliverable%2Fbinutils-gdb.git

diff --git a/include/opcode/rl78.h b/include/opcode/rl78.h
index 72adf14326..bcc5e6dfba 100644
--- a/include/opcode/rl78.h
+++ b/include/opcode/rl78.h
@@ -1,5 +1,5 @@
 /* Opcode decoder for the Renesas RL78
-   Copyright (C) 2011-2015 Free Software Foundation, Inc.
+   Copyright (C) 2011-2020 Free Software Foundation, Inc.
    Written by DJ Delorie <dj@redhat.com>
 
    This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
@@ -30,6 +30,13 @@
 extern "C" {
 #endif
 
+typedef enum {
+  RL78_ISA_DEFAULT,
+  RL78_ISA_G10,
+  RL78_ISA_G13,
+  RL78_ISA_G14,
+} RL78_Dis_Isa;
+
 /* For the purposes of these structures, the RL78 registers are as
    follows, despite most of these being memory-mapped and
    bank-switched:  */
@@ -166,7 +173,7 @@ typedef struct
   RL78_Opcode_Operand	op[2];
 } RL78_Opcode_Decoded;
 
-int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *);
+int rl78_decode_opcode (unsigned long, RL78_Opcode_Decoded *, int (*)(void *), void *, RL78_Dis_Isa);
 
 #ifdef __cplusplus
 }