X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=01613cd4b9fd85b963976687dae44f47659ff2a4;hb=b138abaa407d017e8e6b7d776577af1fd204ae0e;hp=d78cb7c2514c9c9dcec1c13d3da2771075c1b6d1;hpb=401a54cf6e563c470108c35fe892e8b7be2b227a;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d78cb7c251..01613cd4b9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,156 @@ +2006-10-31 Mei Ligang + + * score-dis.c (print_insn): Correct the error code to print + correct PCE instruction disassembly. + +2006-10-26 Ben Elliston + Anton Blanchard + Peter Bergner + + * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH, + AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define. + (POWER6): Define. + (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.", + "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.". + Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd", + "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr", + "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix", + "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul", + "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.", + "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc", + "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix", + "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.", + "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.", + "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.", + "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.", + "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.", + "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq", + "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.", + "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.", + "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq", + "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.", + "diexq" and "diexq." opcodes. + +2006-10-26 Daniel Jacobowitz + + * h8300-dis.c (bfd_h8_disassemble): Add missing consts. + +2006-10-25 Trevor Smigiel + Yukishige Shibata + Nobuhisa Fujinami + Takeaki Fukuoka + Alan Modra + + * spu-dis.c: New file. + * spu-opc.c: New file. + * configure.in: Add SPU support. + * disassemble.c: Likewise. + * Makefile.am: Likewise. Run "make dep-am". + * Makefile.in: Regenerate. + * configure: Regenerate. + * po/POTFILES.in: Regenerate. + +2006-10-24 Andrew Pinski + + * ppc-opc.c (CELL): New define. + (powerpc_opcodes): Enable hrfid for Cell. Add ldbrx and stdbrx, + cell specific instructions. Add {st,l}x{r,l}{,l} cell specific + VMX instructions. + * ppc-dis.c (powerpc_dialect): Handle cell. + +2006-10-23 Dwarakanath Rajagopal + + * i386-dis.c (dis386): Add support for the change in POPCNT opcode in + amdfam10 architecture. + (PREGRP37): NEW. + (print_insn): Disallow REP prefix for POPCNT. + +2006-10-20 Andrew Stubbs + + * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB + duplicating it. + +2006-10-18 Dave Brolley + + * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch. + * configure: Regenerated. + +2006-09-29 Alan Modra + + * po/POTFILES.in: Regenerate. + +2006-09-26 Mark Shinwell + Joseph Myers + Ian Lance Taylor + Ben Elliston + + * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may + only be used with the default multiply-add operation, so if N is + set, don't bother printing X. Add new iwmmxt instructions. + (IWMMXT_INSN_COUNT): Update. + (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14 + with a 'c' suffix. + (print_insn_coprocessor): Check for iWMMXt2. Handle format + specifiers 'r', 'i'. + +2006-09-24 Dwarakanath Rajagopal + + PR binutils/3100 + * i386-dis.c (prefix_user_table): Fix the second operand of + maskmovdqu instruction to allow only %xmm register instead of + both %xmm register and memory. + +2006-09-23 H.J. Lu + + PR binutils/3235 + * i386-dis.c (OP_OFF64): Get 32bit offset if there is an + address size prefix. + +2006-09-17 Mei Ligang + + * score-dis.c: New file. + * score-opc.h: New file. + * Makefile.am: Add Score files. + * Makefile.in: Regenerate. + * configure.in: Add support for Score target. + * configure: Regenerate. + * disassemble.c: Add support for Score target. + +2006-09-16 Nick Clifton + Pedro Alves + + * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ + macros defined in bfd.h. + * cris-dis.c: Likewise. + * h8300-dis.c: Likewise. + * i386-dis.c: Likewise. + * ia64-gen.c: Likewise. + * mips-dis: Likewise. + +2006-09-04 Paul Brook + + * arm-dis.c (neon_opcode): Fix suffix on VMOVN. + +2006-08-23 H.J. Lu + + * i386-dis.c (three_byte_table): Expand to 256 elements. + +2006-08-04 Dwarakanath Rajagopal + + PR binutils/3000 + * i386-dis.c (MXC,EMC): Define. + (OP_MXC): New function to handle cvt* (convert instructions) between + %xmm and %mm register correctly. + (OP_EMC): ditto. + (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi + instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately + with EMC/MXC. + +2006-07-29 Richard Sandiford + + * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire + "fdaddl" entry. + 2006-07-19 Paul Brook * armd-dis.c (arm_opcodes): Fix rbit opcode. @@ -33,7 +186,6 @@ prefix for non-string instructions. (print_insn): Ditto. - 2006-07-05 Julian Brown * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.