X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=0db082ce115e26a52264125092e6fc74bc979b65;hb=848cf006a0ae006d412db5180cecca7f790b66a8;hp=7c06b8f91be005d1a76b83e03650bcd5eeeede3e;hpb=0a40490e6aa43a28c471f4db8a18a4820cbf58c3;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7c06b8f91b..0db082ce11 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,706 @@ +2005-08-18 Alan Modra + + * a29k-dis.c: Delete. + * Makefile.am: Remove a29k support. + * configure.in: Likewise. + * disassemble.c: Likewise. + * Makefile.in: Regenerate. + * configure: Regenerate. + * po/POTFILES.in: Regenerate. + +2005-08-15 Daniel Jacobowitz + + * ppc-dis.c (powerpc_dialect): Handle e300. + (print_ppc_disassembler_options): Likewise. + * ppc-opc.c (PPCE300): Define. + (powerpc_opcodes): Mark icbt as available for the e300. + +2005-08-13 John David Anglin + + * hppa-dis.c (print_insn_hppa): Don't print '%' before register names. + Use "rp" instead of "%r2" in "b,l" insns. + +2005-08-12 Martin Schwidefsky + + * s390-dis.c (print_insn_s390): Print unsigned operands with %u. + * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109. + (main): Likewise. + * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates + and 4 bit optional masks. + (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD, + INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats. + (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD, + MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise. + (s390_opformats): Likewise. + * s390-opc.txt: Add new instructions for cpu type z9-109. + +2005-08-05 John David Anglin + + * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%". + +2005-07-29 Paul Brook + + * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes. + +2005-07-29 Paul Brook + + * arm-dis.c (thumb32_opc): Fix addressing mode for tbh. + (print_insn_thumb32): Fix decoding of thumb2 'I' operands. + +2005-07-25 DJ Delorie + + * m32c-asm.c Regenerate. + * m32c-dis.c Regenerate. + +2005-07-20 DJ Delorie + + * disassemble.c (disassemble_init_for_target): M32C ISAs are + enums, so convert them to bit masks, which attributes are. + +2005-07-18 Nick Clifton + + * configure.in: Restore alpha ordering to list of arches. + * configure: Regenerate. + * disassemble.c: Restore alpha ordering to list of arches. + +2005-07-18 Nick Clifton + + * m32c-asm.c: Regenerate. + * m32c-desc.c: Regenerate. + * m32c-desc.h: Regenerate. + * m32c-dis.c: Regenerate. + * m32c-ibld.h: Regenerate. + * m32c-opc.c: Regenerate. + * m32c-opc.h: Regenerate. + +2005-07-18 H.J. Lu + + * i386-dis.c (PNI_Fixup): Update comment. + (VMX_Fixup): Properly handle the suffix check. + +2005-07-16 John David Anglin + + * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode + mfctl disassembly. + +2005-07-16 Alan Modra + + * Makefile.am: Run "make dep-am". + (stamp-m32c): Fix cpu dependencies. + * Makefile.in: Regenerate. + * ip2k-dis.c: Regenerate. + +2007-07-15 H.J. Lu + + * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions. + (VMX_Fixup): New. Fix up Intel VMX Instructions. + (Em): New. + (Gm): New. + (VM): New. + (dis386_twobyte): Updated entries 0x78 and 0x79. + (twobyte_has_modrm): Likewise. + (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9. + (OP_G): Handle m_mode. + +2005-07-14 Jim Blandy + + Add support for the Renesas M32C and M16C. + * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New. + * m32c-desc.h, m32c-opc.h: New. + * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h. + (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, + m32c-opc.c. + (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, + m32c-ibld.lo, m32c-opc.lo. + (CLEANFILES): List stamp-m32c. + (M32C_DEPS): List stamp-m32c, if CGEN_MAINT. + (CGEN_CPUS): Add m32c. + (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c) + (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS. + (m32c_opc_h): New variable. + (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo) + (m32c-opc.lo): New rules. + * Makefile.in: Regenerated. + * configure.in: Add case for bfd_m32c_arch. + * configure: Regenerated. + * disassemble.c (ARCH_m32c): New. + [ARCH_m32c]: #include "m32c-desc.h". + (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c. + (disassemble_init_for_target) [ARCH_m32c]: Same. + + * cgen-ops.h, cgen-types.h: New files. + * Makefile.am (HFILES): List them. + * Makefile.in: Regenerated. + +2005-07-07 Kaveh R. Ghazi + + * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c, + d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c, + ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c, + m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c, + ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c, + v850-dis.c: Fix format bugs. + * ia64-gen.c (fail, warn): Add format attribute. + * or32-opc.c (debug): Likewise. + +2005-07-07 Khem Raj + + * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction + disassembly pattern. + +2005-07-06 Alan Modra + + * Makefile.am (stamp-m32r): Fix path to cpu files. + (stamp-m32r, stamp-iq2000): Likewise. + * Makefile.in: Regenerate. + * m32r-asm.c: Regenerate. + * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c, + ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h. + +2005-07-05 Nick Clifton + + * iq2000-asm.c: Regenerate. + * ms1-asm.c: Regenerate. + +2005-07-05 Jan Beulich + + * i386-dis.c (SVME_Fixup): New. + (grps): Use it for the lidt entry. + (PNI_Fixup): Call OP_M rather than OP_E. + (INVLPG_Fixup): Likewise. + +2005-07-04 H.J. Lu + + * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined. + +2005-07-01 Nick Clifton + + * a29k-dis.c: Update to ISO C90 style function declarations and + fix formatting. + * alpha-opc.c: Likewise. + * arc-dis.c: Likewise. + * arc-opc.c: Likewise. + * avr-dis.c: Likewise. + * cgen-asm.in: Likewise. + * cgen-dis.in: Likewise. + * cgen-ibld.in: Likewise. + * cgen-opc.c: Likewise. + * cris-dis.c: Likewise. + * d10v-dis.c: Likewise. + * d30v-dis.c: Likewise. + * d30v-opc.c: Likewise. + * dis-buf.c: Likewise. + * dlx-dis.c: Likewise. + * h8300-dis.c: Likewise. + * h8500-dis.c: Likewise. + * hppa-dis.c: Likewise. + * i370-dis.c: Likewise. + * i370-opc.c: Likewise. + * m10200-dis.c: Likewise. + * m10300-dis.c: Likewise. + * m68k-dis.c: Likewise. + * m88k-dis.c: Likewise. + * mips-dis.c: Likewise. + * mmix-dis.c: Likewise. + * msp430-dis.c: Likewise. + * ns32k-dis.c: Likewise. + * or32-dis.c: Likewise. + * or32-opc.c: Likewise. + * pdp11-dis.c: Likewise. + * pj-dis.c: Likewise. + * s390-dis.c: Likewise. + * sh-dis.c: Likewise. + * sh64-dis.c: Likewise. + * sparc-dis.c: Likewise. + * sparc-opc.c: Likewise. + * sysdep.h: Likewise. + * tic30-dis.c: Likewise. + * tic4x-dis.c: Likewise. + * tic80-dis.c: Likewise. + * v850-dis.c: Likewise. + * v850-opc.c: Likewise. + * vax-dis.c: Likewise. + * w65-dis.c: Likewise. + * z8kgen.c: Likewise. + + * fr30-*: Regenerate. + * frv-*: Regenerate. + * ip2k-*: Regenerate. + * iq2000-*: Regenerate. + * m32r-*: Regenerate. + * ms1-*: Regenerate. + * openrisc-*: Regenerate. + * xstormy16-*: Regenerate. + +2005-06-23 Ben Elliston + + * m68k-dis.c: Use ISC C90. + * m68k-opc.c: Formatting fixes. + +2005-06-16 David Ung + + * mips16-opc.c (mips16_opcodes): Add the following MIPS16e + instructions to the table; seb/seh/sew/zeb/zeh/zew. + +2005-06-15 Dave Brolley + + Contribute Morpho ms1 on behalf of Red Hat + * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c, + ms1-opc.h: New files, Morpho ms1 target. + + 2004-05-14 Stan Cox + + * disassemble.c (ARCH_ms1): Define. + (disassembler): Handle bfd_arch_ms1 + + 2004-05-13 Michael Snyder + + * Makefile.am, Makefile.in: Add ms1 target. + * configure.in: Ditto. + +2005-06-08 Zack Weinberg + + * arm-opc.h: Delete; fold contents into ... + * arm-dis.c: ... here. Move includes of internal COFF headers + next to includes of internal ELF headers. + (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused. + (struct arm_opcode): Rename struct opcode32. Make 'assembler' const. + (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const. + (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames) + (iwmmxt_wwnames, iwmmxt_wwssnames): + Make const. + (regnames): Remove iWMMXt coprocessor register sets. + (iwmmxt_regnames, iwmmxt_cregnames): New statics. + (get_arm_regnames): Adjust fourth argument to match above changes. + (set_iwmmxt_regnames): Delete. + (print_insn_arm): Constify 'c'. Use ISO syntax for function + pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames + and iwmmxt_cregnames, not set_iwmmxt_regnames. + (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use + ISO syntax for function pointer calls. + +2005-06-07 Zack Weinberg + + * arm-dis.c: Split up the comments describing the format codes, so + that the ARM and 16-bit Thumb opcode tables each have comments + preceding them that describe all the codes, and only the codes, + valid in those tables. (32-bit Thumb table is already like this.) + Reorder the lists in all three comments to match the order in + which the codes are implemented. + Remove all forward declarations of static functions. Convert all + function definitions to ISO C format. + (print_insn_arm, print_insn_thumb16, print_insn_thumb32): + Return nothing. + (print_insn_thumb16): Remove unused case 'I'. + (print_insn): Update for changed calling convention of subroutines. + +2005-05-25 Jan Beulich + + * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in + hex (but retain it being displayed as signed). Remove redundant + checks. Add handling of displacements for 16-bit addressing in Intel + mode. + +2005-05-25 Jan Beulich + + * i386-dis.c (prefix_name): Remove pointless mode_64bit check. + (OP_E): Remove redundant REX_EXTZ handling. Remove pointless + masking of 'rm' in 16-bit memory address handling. + +2005-05-19 Anton Blanchard + + * ppc-dis.c (powerpc_dialect): Handle "-Mpower5". + (print_ppc_disassembler_options): Document it. + * ppc-opc.c (SVC_LEV): Define. + (LEV): Allow optional operand. + (POWER5): Define. + (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add + "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.". + +2005-05-19 Kelley Cook + + * Makefile.in: Regenerate. + +2005-05-17 Zack Weinberg + + * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit + instructions. Adjust disassembly of some opcodes to match + unified syntax. + (thumb32_opcodes): New table. + (print_insn_thumb): Rename print_insn_thumb16; don't handle + two-halfword branches here. + (print_insn_thumb32): New function. + (print_insn): Choose among print_insn_arm, print_insn_thumb16, + and print_insn_thumb32. Be consistent about order of + halfwords when printing 32-bit instructions. + +2005-05-07 H.J. Lu + + PR 843 + * i386-dis.c (branch_v_mode): New. + (indirEv): Use branch_v_mode instead of v_mode. + (OP_E): Handle branch_v_mode. + +2005-05-07 H.J. Lu + + * d10v-dis.c (dis_2_short): Support 64bit host. + +2005-05-07 Nick Clifton + + * po/nl.po: Updated translation. + +2005-05-07 Nick Clifton + + * Update the address and phone number of the FSF organization in + the GPL notices in the following files: + a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c, + arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h, + avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in, + cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c, + crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, + d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c, + fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c, + fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h, + frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c, + h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c, + i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c, + ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c, + ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c, + ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h, + ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c, + iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c, + iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c, + m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h, + m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c, + m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, + maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c, + mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c, + openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c, + openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h, + or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c, + pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c, + s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c, + sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c, + tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c, + v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h, + xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h, + xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c, + xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c + +2005-05-05 James E Wilson + + * ia64-opc.c: Include sysdep.h before libiberty.h. + +2005-05-05 Nick Clifton + + * configure.in (ALL_LINGUAS): Add vi. + * configure: Regenerate. + * po/vi.po: New. + +2005-04-26 Jerome Guitton + + * configure.in: Fix the check for basename declaration. + * configure: Regenerate. + +2005-04-19 Alan Modra + + * ppc-opc.c (RTO): Define. + (powerpc_opcodes ): Combine PPC403 and BOOKE + entries to suit PPC440. + +2005-04-18 Mark Kettenis + + * i386-dis.c: Insert hyphens into selected VIA PadLock extensions. + Add xcrypt-ctr. + +2005-04-14 Nick Clifton + + * po/fi.po: New translation: Finnish. + * configure.in (ALL_LINGUAS): Add fi. + * configure: Regenerate. + +2005-04-14 Alan Modra + + * Makefile.am (NO_WERROR): Define. + * configure.in: Invoke AM_BINUTILS_WARNINGS. + * Makefile.in: Regenerate. + * aclocal.m4: Regenerate. + * configure: Regenerate. + +2005-04-04 Nick Clifton + + * fr30-asm.c: Regenerate. + * frv-asm.c: Regenerate. + * iq2000-asm.c: Regenerate. + * m32r-asm.c: Regenerate. + * openrisc-asm.c: Regenerate. + +2005-04-01 Jan Beulich + + * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any + visible operands in Intel mode. The first operand of monitor is + %rax in 64-bit mode. + +2005-04-01 Jan Beulich + + * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for + easier future additions. + +2005-03-31 Jerome Guitton + + * configure.in: Check for basename. + * configure: Regenerate. + * config.in: Ditto. + +2005-03-29 H.J. Lu + + * i386-dis.c (SEG_Fixup): New. + (Sv): New. + (dis386): Use "Sv" for 0x8c and 0x8e. + +2005-03-21 Jan-Benedict Glaw + Nick Clifton + + * vax-dis.c: (entry_addr): New varible: An array of user supplied + function entry mask addresses. + (entry_addr_occupied_slots): New variable: The number of occupied + elements in entry_addr. + (entry_addr_total_slots): New variable: The total number of + elements in entry_addr. + (parse_disassembler_options): New function. Fills in the entry_addr + array. + (free_entry_array): New function. Release the memory used by the + entry addr array. Suppressed because there is no way to call it. + (is_function_entry): Check if a given address is a function's + start address by looking at supplied entry mask addresses and + symbol information, if available. + (print_insn_vax): Use parse_disassembler_options and is_function_entry. + +2005-03-23 H.J. Lu + + * cris-dis.c (print_with_operands): Use ~31L for long instead + of ~31. + +2005-03-20 H.J. Lu + + * mmix-opc.c (O): Revert the last change. + (Z): Likewise. + +2005-03-19 H.J. Lu + + * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long. + (Z): Likewise. + +2005-03-19 Hans-Peter Nilsson + + * mmix-opc.c (O, Z): Force expression as unsigned long. + +2005-03-18 Nick Clifton + + * ip2k-asm.c: Regenerate. + * op/opcodes.pot: Regenerate. + +2005-03-16 Nick Clifton + Ben Elliston + + * configure.in (werror): New switch: Add -Werror to the + compiler command line. Enabled by default. Disable via + --disable-werror. + * configure: Regenerate. + +2005-03-16 Alan Modra + + * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when + BOOKE. + +2005-03-15 Alan Modra + + * po/es.po: Commit new Spanish translation. + + * po/fr.po: Commit new French translation. + +2005-03-14 Jan-Benedict Glaw + + * vax-dis.c: Fix spelling error + (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead + of just "Entry mask: < r1 ... >" + +2005-03-12 Zack Weinberg + + * arm-dis.c (arm_opcodes): Document %E and %V. + Add entries for v6T2 ARM instructions: + bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx. + (print_insn_arm): Add support for %E and %V. + (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield. + +2005-03-10 Jeff Baker + Alan Modra + + * ppc-opc.c (insert_sprg, extract_sprg): New Functions. + (powerpc_operands ): Call the above. Bit field is 5 bits. + (SPRG_MASK): Delete. + (XSPRG_MASK): Mask off extra bits now part of sprg field. + (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move + mfsprg4..7 after msprg and consolidate. + +2005-03-09 Jan-Benedict Glaw + + * vax-dis.c (entry_mask_bit): New array. + (print_insn_vax): Decode function entry mask. + +2005-03-07 Aldy Hernandez + + * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd. + +2005-03-05 Alan Modra + + * po/opcodes.pot: Regenerate. + +2005-03-03 Ramana Radhakrishnan + + * arc-dis.c (a4_decoding_class): New enum. + (dsmOneArcInst): Use the enum values for the decoding class. + Remove redundant case in the switch for decodingClass value 11. + +2005-03-02 Jan Beulich + + * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15 + accesses. + (OP_C): Consider lock prefix in non-64-bit modes. + +2005-02-24 Alan Modra + + * cris-dis.c (format_hex): Remove ineffective warning fix. + * crx-dis.c (make_instruction): Warning fix. + * frv-asm.c: Regenerate. + +2005-02-23 Nick Clifton + + * cgen-dis.in: Use bfd_byte for buffers that are passed to + read_memory. + + * ia64-opc.c (locate_opcode_ent): Initialise opval array. + + * crx-dis.c (make_instruction): Move argument structure into inner + scope and ensure that all of its fields are initialised before + they are used. + + * fr30-asm.c: Regenerate. + * fr30-dis.c: Regenerate. + * frv-asm.c: Regenerate. + * frv-dis.c: Regenerate. + * ip2k-asm.c: Regenerate. + * ip2k-dis.c: Regenerate. + * iq2000-asm.c: Regenerate. + * iq2000-dis.c: Regenerate. + * m32r-asm.c: Regenerate. + * m32r-dis.c: Regenerate. + * openrisc-asm.c: Regenerate. + * openrisc-dis.c: Regenerate. + * xstormy16-asm.c: Regenerate. + * xstormy16-dis.c: Regenerate. + +2005-02-22 Alan Modra + + * arc-ext.c: Warning fixes. + * arc-ext.h: Likewise. + * cgen-opc.c: Likewise. + * ia64-gen.c: Likewise. + * maxq-dis.c: Likewise. + * ns32k-dis.c: Likewise. + * w65-dis.c: Likewise. + * ia64-asmtab.c: Regenerate. + +2005-02-22 Alan Modra + + * fr30-desc.c: Regenerate. + * fr30-desc.h: Regenerate. + * fr30-opc.c: Regenerate. + * fr30-opc.h: Regenerate. + * frv-desc.c: Regenerate. + * frv-desc.h: Regenerate. + * frv-opc.c: Regenerate. + * frv-opc.h: Regenerate. + * ip2k-desc.c: Regenerate. + * ip2k-desc.h: Regenerate. + * ip2k-opc.c: Regenerate. + * ip2k-opc.h: Regenerate. + * iq2000-desc.c: Regenerate. + * iq2000-desc.h: Regenerate. + * iq2000-opc.c: Regenerate. + * iq2000-opc.h: Regenerate. + * m32r-desc.c: Regenerate. + * m32r-desc.h: Regenerate. + * m32r-opc.c: Regenerate. + * m32r-opc.h: Regenerate. + * m32r-opinst.c: Regenerate. + * openrisc-desc.c: Regenerate. + * openrisc-desc.h: Regenerate. + * openrisc-opc.c: Regenerate. + * openrisc-opc.h: Regenerate. + * xstormy16-desc.c: Regenerate. + * xstormy16-desc.h: Regenerate. + * xstormy16-opc.c: Regenerate. + * xstormy16-opc.h: Regenerate. + +2005-02-21 Alan Modra + + * Makefile.am: Run "make dep-am" + * Makefile.in: Regenerate. + +2005-02-15 Nick Clifton + + * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent + compile time warnings. + (print_keyword): Likewise. + (default_print_insn): Likewise. + + * fr30-desc.c: Regenerated. + * fr30-desc.h: Regenerated. + * fr30-dis.c: Regenerated. + * fr30-opc.c: Regenerated. + * fr30-opc.h: Regenerated. + * frv-desc.c: Regenerated. + * frv-dis.c: Regenerated. + * frv-opc.c: Regenerated. + * ip2k-asm.c: Regenerated. + * ip2k-desc.c: Regenerated. + * ip2k-desc.h: Regenerated. + * ip2k-dis.c: Regenerated. + * ip2k-opc.c: Regenerated. + * ip2k-opc.h: Regenerated. + * iq2000-desc.c: Regenerated. + * iq2000-dis.c: Regenerated. + * iq2000-opc.c: Regenerated. + * m32r-asm.c: Regenerated. + * m32r-desc.c: Regenerated. + * m32r-desc.h: Regenerated. + * m32r-dis.c: Regenerated. + * m32r-opc.c: Regenerated. + * m32r-opc.h: Regenerated. + * m32r-opinst.c: Regenerated. + * openrisc-desc.c: Regenerated. + * openrisc-desc.h: Regenerated. + * openrisc-dis.c: Regenerated. + * openrisc-opc.c: Regenerated. + * openrisc-opc.h: Regenerated. + * xstormy16-desc.c: Regenerated. + * xstormy16-desc.h: Regenerated. + * xstormy16-dis.c: Regenerated. + * xstormy16-opc.c: Regenerated. + * xstormy16-opc.h: Regenerated. + +2005-02-14 H.J. Lu + + * dis-buf.c (perror_memory): Use sprintf_vma to print out + address. + +2005-02-11 Nick Clifton + + * iq2000-asm.c: Regenerate. + + * frv-dis.c: Regenerate. + 2005-02-07 Jim Blandy * Makefile.am (CGEN): Load guile.scm before calling the main @@ -81,7 +784,7 @@ easier for the testsuite. (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up. (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up. - (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing + (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing arch_sh2a_or_sh4_up child. (sh_table): Do renaming as above. Correct comment for ldc.l for gas testsuite to read. @@ -161,7 +864,7 @@ * maxq-dis.c: New file. * disassemble.c (ARCH_maxq): Define. - (disassembler): Add 'print_insn_maxq_little' for handling maxq + (disassembler): Add 'print_insn_maxq_little' for handling maxq instructions.. * configure.in: Add case for bfd_maxq_arch. * configure: Regenerate. @@ -254,11 +957,11 @@ * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE. (getregliststring): Support HI/LO and user registers. - * crx-opc.c (crx_instruction): Update data structure according to the + * crx-opc.c (crx_instruction): Update data structure according to the rearrangement done in CRX opcode header file. (crx_regtab): Likewise. (crx_optab): Likewise. - (crx_instruction): Reorder load/stor instructions, remove unsupported + (crx_instruction): Reorder load/stor instructions, remove unsupported formats. support new Co-Processor instruction 'cpi'. @@ -554,11 +1257,11 @@ 2004-05-24 Peter Barada * m68k-dis.c(print_insn_m68k): Strip body of diassembly out - into new match_insn_m68k function. Loop over canidate - matches and select first that completely matches. + into new match_insn_m68k function. Loop over canidate + matches and select first that completely matches. * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit. * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea - to verify addressing for MAC/EMAC. + to verify addressing for MAC/EMAC. * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC reigster halves since 'fpu' and 'spl' look misleading. * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases. @@ -616,7 +1319,7 @@ macro. Adjust all users. 2004-04-15 Anil Paranjpe - + * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs" separately.