X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=13e66ee262f04c855c19f9b88fde97e4b3cc9c6d;hb=06647dfdde91b5ee1990706d2806197d58200a3d;hp=645c640d9a8cd62d9f9993bfedbf230ed911596f;hpb=db9db6f27ef240ad953a329eff87748b3e43ed09;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 645c640d9a..13e66ee262 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,94 @@ +2005-03-05 Alan Modra + + * po/opcodes.pot: Regenerate. + +2005-03-03 Ramana Radhakrishnan + + * opcodes/arc-dis.c: Add enum a4_decoding_class. + (dsmOneArcInst): Use the enum values for the decoding class. + Remove redundant case in the switch for decodingClass value 11. + +2005-03-02 Jan Beulich + + * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15 + accesses. + (OP_C): Consider lock prefix in non-64-bit modes. + +2005-02-24 Alan Modra + + * cris-dis.c (format_hex): Remove ineffective warning fix. + * crx-dis.c (make_instruction): Warning fix. + * frv-asm.c: Regenerate. + +2005-02-23 Nick Clifton + + * cgen-dis.in: Use bfd_byte for buffers that are passed to + read_memory. + + * ia64-opc.c (locate_opcode_ent): Initialise opval array. + + * crx-dis.c (make_instruction): Move argument structure into inner + scope and ensure that all of its fields are initialised before + they are used. + + * fr30-asm.c: Regenerate. + * fr30-dis.c: Regenerate. + * frv-asm.c: Regenerate. + * frv-dis.c: Regenerate. + * ip2k-asm.c: Regenerate. + * ip2k-dis.c: Regenerate. + * iq2000-asm.c: Regenerate. + * iq2000-dis.c: Regenerate. + * m32r-asm.c: Regenerate. + * m32r-dis.c: Regenerate. + * openrisc-asm.c: Regenerate. + * openrisc-dis.c: Regenerate. + * xstormy16-asm.c: Regenerate. + * xstormy16-dis.c: Regenerate. + +2005-02-22 Alan Modra + + * arc-ext.c: Warning fixes. + * arc-ext.h: Likewise. + * cgen-opc.c: Likewise. + * ia64-gen.c: Likewise. + * maxq-dis.c: Likewise. + * ns32k-dis.c: Likewise. + * w65-dis.c: Likewise. + * ia64-asmtab.c: Regenerate. + +2005-02-22 Alan Modra + + * fr30-desc.c: Regenerate. + * fr30-desc.h: Regenerate. + * fr30-opc.c: Regenerate. + * fr30-opc.h: Regenerate. + * frv-desc.c: Regenerate. + * frv-desc.h: Regenerate. + * frv-opc.c: Regenerate. + * frv-opc.h: Regenerate. + * ip2k-desc.c: Regenerate. + * ip2k-desc.h: Regenerate. + * ip2k-opc.c: Regenerate. + * ip2k-opc.h: Regenerate. + * iq2000-desc.c: Regenerate. + * iq2000-desc.h: Regenerate. + * iq2000-opc.c: Regenerate. + * iq2000-opc.h: Regenerate. + * m32r-desc.c: Regenerate. + * m32r-desc.h: Regenerate. + * m32r-opc.c: Regenerate. + * m32r-opc.h: Regenerate. + * m32r-opinst.c: Regenerate. + * openrisc-desc.c: Regenerate. + * openrisc-desc.h: Regenerate. + * openrisc-opc.c: Regenerate. + * openrisc-opc.h: Regenerate. + * xstormy16-desc.c: Regenerate. + * xstormy16-desc.h: Regenerate. + * xstormy16-opc.c: Regenerate. + * xstormy16-opc.h: Regenerate. + 2005-02-21 Alan Modra * Makefile.am: Run "make dep-am" @@ -139,7 +230,7 @@ easier for the testsuite. (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up. (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up. - (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing + (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing arch_sh2a_or_sh4_up child. (sh_table): Do renaming as above. Correct comment for ldc.l for gas testsuite to read. @@ -219,7 +310,7 @@ * maxq-dis.c: New file. * disassemble.c (ARCH_maxq): Define. - (disassembler): Add 'print_insn_maxq_little' for handling maxq + (disassembler): Add 'print_insn_maxq_little' for handling maxq instructions.. * configure.in: Add case for bfd_maxq_arch. * configure: Regenerate. @@ -312,11 +403,11 @@ * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE. (getregliststring): Support HI/LO and user registers. - * crx-opc.c (crx_instruction): Update data structure according to the + * crx-opc.c (crx_instruction): Update data structure according to the rearrangement done in CRX opcode header file. (crx_regtab): Likewise. (crx_optab): Likewise. - (crx_instruction): Reorder load/stor instructions, remove unsupported + (crx_instruction): Reorder load/stor instructions, remove unsupported formats. support new Co-Processor instruction 'cpi'. @@ -612,11 +703,11 @@ 2004-05-24 Peter Barada * m68k-dis.c(print_insn_m68k): Strip body of diassembly out - into new match_insn_m68k function. Loop over canidate - matches and select first that completely matches. + into new match_insn_m68k function. Loop over canidate + matches and select first that completely matches. * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit. * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea - to verify addressing for MAC/EMAC. + to verify addressing for MAC/EMAC. * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC reigster halves since 'fpu' and 'spl' look misleading. * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases. @@ -674,7 +765,7 @@ macro. Adjust all users. 2004-04-15 Anil Paranjpe - + * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs" separately.