X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=2e970e532915fb023dd5b8df656c56439c75e4c3;hb=5e377ed2f2fe756468a14385ad7364053d637025;hp=95e3fb279af13a620efbbb9e38706f2379960230;hpb=1eb54bb4633b1605185289d174922a143d57e12c;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 95e3fb279a..2e970e5329 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,564 @@ +Mon Jul 28 21:52:24 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c: Fix typo/thinko in "eret" instruction. + +start-sanitize-r5900 +Mon Jul 28 22:07:14 1997 Andrew Cagney + + * mips-opc.c: Fix coding of mtsa. + +start-sanitize-r5900 +Thu Jul 24 13:03:26 1997 Doug Evans + + * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns. + Make array const. + * sparc-dis.c (sorted_opcodes): New static local. + (struct opcode_hash): `opcode' is pointer to const element. + (build_hash): First arg is now table of sorted pointers. + (print_insn_sparc): Sort opcodes by sorting table of pointers. + (compare_opcodes): Update. + +Tue Jul 15 12:05:23 1997 Doug Evans + + * cgen-opc.c: #include . + (hash_keyword_name): New arg `case_sensitive_p'. Callers updated. + Handle case insensitive hashing. + (hash_keyword_value): Change type of `value' to unsigned int. + +Thu Jul 10 12:56:10 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (mips_builtin_opcodes): If an insn uses single + precision FP, mark it as such. Likewise for double precision + FP. Mark ISA1 insns. Consolidate duplicate opcodes where + possible. +start-sanitize-r5900 + (mips_builtin_opcodes): Remove non-existant r5900 instructions +end-sanitize-r5900 + +start-sanitize-r5900 +Thu Jun 26 16:20:27 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and + "pexew" as synonyms for "pintoh", "pexoh", "pexow". + +end-sanitize-5900 +Wed Jun 25 15:25:57 1997 Felix Lee + + * ppc-opc.c (extract_nsi): make unsigned expression signed before + negating it. + (UNUSED): remove one level of parens, so MSVC doesn't choke on + nesting depth when all the macros are expanded. + +Tue Jun 17 17:02:17 1997 Ian Lance Taylor + + * sparc-opc.c: The fcmp v9a instructions take an integer register + as a destination, not a floating point register. From Christian + Kuehnke . + +Mon Jun 16 14:13:18 1997 Ian Lance Taylor + + * m68k-dis.c (print_insn_arg): Print case 7.2 using %pc@() + syntax. From Roman Hodek + . + + * i386-dis.c (twobyte_has_modrm): Fix pand. + +Mon Jun 16 14:08:38 1997 Michael Taylor + + * i386-dis.c (dis386_twobyte): Fix pand and pandn. + +Tue Jun 10 11:26:47 1997 H.J. Lu + + * arm-dis.c: Add prototypes for arm_decode_shift and + print_insn_arm. + +Mon Jun 2 11:39:04 1997 Gavin Koch + + * mips-opc.c: Add r3900 insns. + +Tue May 27 15:55:44 1997 Ian Lance Taylor + + * sh-dis.c (print_insn_shx): Change relmask to bfd_vma. Don't + print delay slot instructions on the same line. When using a PC + relative load, add a comment with the value being loaded if it can + be obtained. + +Tue May 27 11:02:08 1997 Alan Modra + + * i386-dis.c (dis386[], dis386_twobyte[]): change pushl/popl + to pushS/popS for segment regs and byte constant so that + pushw/popw printed when in 16 bit data mode. + + * i386-dis.c (dis386[]): change cwtl, cltd to cWtS, cStd to + print cbtw, cwtd in 16 bit data mode. + * i386-dis.c (putop): extra case W to support above. + + * i386-dis.c (print_insn_x86): print addr32 prefix when given + address size prefix in 16 bit address mode. + +Fri May 23 16:47:23 1997 Ian Lance Taylor + + * sh-dis.c: Reindent. Rename local variable fprintf to + fprintf_fn. + +Thu May 22 14:06:02 1997 Doug Evans + + * m32r-opc.c (m32r_cgen_insn_table, cmpui): Undo patch of May 2. + +Tue May 20 11:26:27 1997 Gavin Koch + + * mips-opc.c (mips_builtin_opcodes): Moved INSN_ISA field into new + field membership. + * mips16-opc.c (mip16_opcodes): same. + +Mon May 12 15:10:53 1997 Jim Wilson + + * m68k-opc.c (moveb): Change $d to %d. + +Mon May 5 14:28:41 1997 Ian Lance Taylor + + * i386-dis.c: (dis386_twobyte): Add MMX instructions. + (twobyte_has_modrm): Likewise. + (grps): Likewise. + (OP_MMX, OP_EM, OP_MS): New static functions. + + * i386-dis.c: Revert patch of April 4. The output now matches + what gcc generates. + +Fri May 2 12:48:37 1997 Doug Evans + + * m32r-opc.c (m32r_cgen_insn_table, cmpui): Use $uimm16 instead + of $simm16. + +Thu May 1 15:34:15 1997 Doug Evans + + * m32r-opc.h (CGEN_ARCH): Renamed from CGEN_CPU. + +Tue Apr 15 12:40:08 1997 Ian Lance Taylor + + * Makefile.in (install): Depend upon installdirs. + (installdirs): New target. + +Mon Apr 14 12:13:51 1997 Ian Lance Taylor + + From Thomas Graichen : + * configure.in: Use ${CONFIG_SHELL} when running $ac_config_sub. + * configure: Rebuild. + +Sun Apr 13 17:50:41 1997 Doug Evans + + * cgen-*.c, m32r-*.c: #include sysdep.h instead of config.h. + Delete string{,s}.h support. + +Thu Apr 10 14:44:56 1997 Doug Evans + + * cgen-asm.c (cgen_parse_operand_fn): New global. + (cgen_parse_{{,un}signed_integer,address}): Update call to + cgen_parse_operand_fn. + (cgen_init_parse_operand): New function. + * m32r-asm.c (parse_insn_normal): cgen_init_parse_operand renamed + from cgen_asm_init_parse. + (m32r_cgen_assemble_insn): New operand `errmsg'. + Delete call to as_bad, return error message to caller. + (m32r_cgen_asm_hash_keywords): #if 0 out. + +Wed Apr 9 12:05:25 1997 Andreas Schwab + + * m68k-dis.c (print_insn_arg) [case 'd']: Print as address register, + not data register. + [case 'J']: Fix typo in register name. + +Mon Apr 7 16:48:22 1997 Ian Lance Taylor + + * configure.in: Substitute SHLIB_LIBS. + * configure: Rebuild. + * Makefile.in (SHLIB_LIBS): New variable. + ($(SHLIB)): Use $(SHLIB_LIBS). + +Mon Apr 7 11:45:44 1997 Doug Evans + + * cgen-dis.c (build_dis_hash_table): Fix xmalloc size computation. + + * cgen-opc.c (hash_keyword_name): Improve algorithm. + + * disassemble.c (disassembler): Handle m32r. + +Fri Apr 4 12:29:38 1997 Doug Evans + + * m32r-asm.c, m32r-dis.c, m32r-opc.c, m32r-opc.h: New files. + * cgen-asm.c, cgen-dis.c, cgen-opc.c: New files. + * Makefile.in (CFILES): Add them. + (ALL_MACHINES): Add them. + (dependencies): Regenerate. + * configure.in (cgen_files): New variable. + (bfd_m32r_arch): Add entry. + * configure: Regenerate. + +Fri Apr 4 14:04:16 1997 Ian Lance Taylor + + * configure.in: Correct file names for bfd_mn10[23]00_arch. + * configure: Rebuild. + + * Makefile.in: Rebuild dependencies. + + * d10v-dis.c: Include "ansidecl.h" before "opcode/d10v.h". + + * i386-dis.c (float_reg): Swap fsubrp and fsubp. Swap fdivrp and + fdivp. + +Thu Apr 3 13:22:45 1997 Ian Lance Taylor + + * Branched binutils 2.8. + +Wed Apr 2 12:23:53 1997 Ian Lance Taylor + + * m10200-dis.c: Rename from mn10200-dis.c. + * m10200-opc.c: Rename from mn10200-opc.c. + * m10300-dis.c: Rename from mn10300-dis.c + * m10300-opc.c: Rename from mn10300-opc.c. + * Makefile.in: Update accordingly. + + * mips16-opc.c: Add mul and dmul macros. + +Tue Apr 1 16:27:45 1997 Klaus Kaempf + + * makefile.vms: Update CFLAGS, add clean target. + +Fri Mar 28 12:10:09 1997 Ian Lance Taylor + + * mips-opc.c: Add "wait". From Ralf Baechle + . + + * configure.in: Add stdlib.h to AC_CHECK_HEADERS list. + * configure, config.in: Rebuild. + * sysdep.h: Include if it exists. + * sparc-dis.c: Include and "sysdep.h". Don't include + . + * Makefile.in: Rebuild dependencies. + +Thu Mar 27 14:24:43 1997 Ian Lance Taylor + + * ppc-opc.c: Add PPC 403 instructions and extended opcodes. From + Andrew Bray . + + * mips-opc.c: Add cast when setting mips_opcodes. + +start-sanitize-v850 +Tue Mar 25 23:04:00 1997 Stu Grossman (grossman@critters.cygnus.com) + + * v850-dis.c (disassemble): Fix sign extension problem. + * v850-opc.c (extract_d*): Fix sign extension problems to make + disassembly calculate branch offsets correctly. + +end-sanitize-v850 +Mon Mar 24 13:22:13 1997 Ian Lance Taylor + + * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s. + + * mips-opc.c: Add dctr and dctw. + +start-sanitize-d30v +Sun Mar 23 18:08:10 1997 Martin M. Hunt + + * d30v-dis.c (print_insn): Change the way signed constants + are displayed. +end-sanitize-d30v +Fri Mar 21 14:37:52 1997 Ian Lance Taylor + + * Makefile.in (BFD_H): New variable. + (HFILES): New variable. + (CFILES): Add all C files. + (.dep, .dep1, dep.sed, dep, dep-in): New targets. + Delete old dependencies, and build new ones. + * dep-in.sed: New file. + +Thu Mar 20 19:03:30 1997 Philippe De Muyter + + * m68k-opc.c (m68k_opcode_aliases): Added blo and blo{s,b,w,l}. + +start-sanitize-coldfire +Wed Mar 19 06:53:58 1997 J.T. Conklin + + * m68k-opc.c (m68k_opcodes): Provide coldfire division module + instructions. + +end-sanitize-coldfire +Tue Mar 18 14:17:03 1997 Jeffrey A Law (law@cygnus.com) + + * mn10200-opc.c: Change "trap" to "syscall". + * mn10300-opc.c: Add new "syscall" instruction. + +Mon Mar 17 08:48:03 1997 J.T. Conklin + + * m68k-opc.c (m68k_opcodes): Provide correct entries for mulsl and + mulul insns on the coldfire. + +Sat Mar 15 17:13:05 1997 Ian Lance Taylor + + * arm-dis.c (print_insn_arm): Don't print instruction bytes. + (print_insn_big_arm): Set bytes_per_chunk and display_endian. + (print_insn_little_arm): Likewise. + +Fri Mar 14 15:08:59 1997 Ian Lance Taylor + + Based on patches from H.J. Lu : + * i386-dis.c (fetch_data): Add prototype. + * m68k-dis.c (fetch_data): Add prototype. + (dummy_print_address): Add prototype. Make static. + * ppc-opc.c (valid_bo): Add prototype. + * sparc-dis.c (build_hash_table): Add prototype. + (is_delayed_branch, compute_arch_mask): Add prototypes. + (print_insn_sparc): Make several local variables const. + (compare_opcodes): Change arguments to const PTR. Add prototype. + * sparc-opc.c (arg): Change name field to be const. + (lookup_name, lookup_value): Add prototypes. Change table and + name parameters to be const. + (sparc_encode_asi): Change name parameter to be const. + (sparc_encode_membar, sparc_encode_prefetch): Likewise. + (sparc_encode_sparclet_cpreg): Likewise. + (sparc_decode_asi): Change return type to be const. + (sparc_decode_membar, sparc_decode_prefetch): Likewise. + (sparc_decode_sparclet_cpreg): Likewise. + +Fri Mar 7 10:51:49 1997 Ian Lance Taylor + + * Makefile.in ($(SHLINK)): Just use ln -s, not ln -sf, since + Solaris doesn't like the combined options, and the -f is + unnecessary. + (stamp-tshlink, install): Likewise. + +Thu Mar 6 16:51:11 1997 Jeffrey A Law (law@cygnus.com) + + * mn10300-opc.c (IMM16_PCREL, SD8N_PCREL, D16_SHIFT): Mark these + as relaxable. + +Tue Mar 4 06:10:36 1997 J.T. Conklin + + * m68k-opc.c (m68k_opcodes): Fix last change for the mc68010. + +Mon Mar 3 07:45:20 1997 J.T. Conklin + + * m68k-opc.c (m68k_opcodes): Added entries for the tst insns on + the mc68000. + +Thu Feb 27 14:04:32 1997 Philippe De Muyter + + * m68k-opc.c (m68k_opcodes): Added swbegl pseudo-instruction. + +start-sanitize-tic80 +Thu Feb 27 11:36:41 1997 Michael Meissner + + * tic80-dis.c (print_insn_tic80): Set info->bytes_per_line to 8. + +Wed Feb 26 15:34:48 1997 Michael Meissner + + * tic80-opc.c (tic80_predefined_symbols): Define r25 properly. + +end-sanitize-tic80 +Wed Feb 26 13:38:30 1997 Andreas Schwab + + * m68k-dis.c (NEXTSINGLE, NEXTDOUBLE, NEXTEXTEND): Use + floatformat_to_double to make portable. + (print_insn_arg): Use NEXTEXTEND macro when extracting extended + precision float. + +Mon Feb 24 19:26:12 1997 Dawn Perchik + + * mips-opc.c: Initialize mips_opcodes to mips_builtin_opcodes, + and bfd_mips_num_opcodes to bfd_mips_num_builtin_opcodes. + +Mon Feb 24 15:19:01 1997 Martin M. Hunt + + * d10v-dis.c, d10v-opc.c: Change pre_defined_registers to + d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt. + +start-sanitize-tic80 +Mon Feb 24 14:33:26 1997 Fred Fish + + * tic80-opc.c (LSI_SCALED): Renamed from this ... + (OFF_SL_BR_SCALED): ... to this, and added the flag + TIC80_OPERAND_BASEREL to the flags word. + (tic80_opcodes): Replace all occurances of LSI_SCALED with + OFF_SL_BR_SCALED. + +end-sanitize-tic80 +Sat Feb 22 21:25:00 1997 Dawn Perchik + + * mips-opc.c: Add macros for cop0, cop1 cop2 and cop3. + Change mips_opcodes from const array to a pointer, + and change bfd_mips_num_opcodes from const int to int, + so that we can increase the size of the mips opcodes table + dynamically. + +start-sanitize-tic80 +Sat Feb 22 21:03:47 1997 Fred Fish + + * tic80-opc.c (tic80_predefined_symbols): Revert change to + store BITNUM values in the table in one's complement form + to match behavior when assembler is given a raw numeric + value for a BITNUM operand. + * tic80-dis.c (print_operand_bitnum): Ditto. + +end-sanitize-tic80 +start-sanitize-d30v +Fri Feb 21 16:31:18 1997 Martin M. Hunt + + * d30v-opc.c: Removed references to FLAG_X. + +end-sanitize-d30v +Wed Feb 19 14:51:20 1997 Ian Lance Taylor + + * Makefile.in: Add dependencies on ../bfd/bfd.h as required. + +start-sanitize-d30v +Tue Feb 18 17:43:43 1997 Martin M. Hunt + + * Makefile.in: Added d30v object files. + * configure: (bfd_d30v_arch) Rebuilt. + * configure.in: (bfd_d30v_arch) Added new case. + * d30v-dis.c: New file. + * d30v-opc.c: New file. + * disassemble.c (disassembler) Add entry for d30v. + +end-sanitize-d30v +start-sanitize-tic80 +Tue Feb 18 16:32:08 1997 Fred Fish + + * tic80-opc.c (tic80_predefined_symbols): Add symbolic + representations for the floating point BITNUM values. + +Fri Feb 14 12:14:05 1997 Fred Fish + + * tic80-opc.c (tic80_predefined_symbols): Store BITNUM values + in the table in one's complement form, as they appear in the + actual instruction. + (tic80_symbol_to_value): Use macros to access predefined + symbol fields. + (tic80_value_to_symbol): Ditto. + (tic80_next_predefined_symbol): New function. + * tic80-dis.c (print_operand_bitnum): Remove code that did + one's complement for BITNUM values. + +end-sanitize-tic80 +start-sanitize-r5900 +Fri Feb 14 13:56:51 1997 Gavin Koch + + * mips-opc.c: bug fix, can't mark insns INSN_5900 and INSN_ISA4 + +end-sanitize-r5900 +Thu Feb 13 21:56:51 1997 Klaus Kaempf + + * makefile.vms: Remove 8 bit characters. Update to latest + gcc release. + +Thu Feb 13 20:41:22 1997 Philippe De Muyter + + * m68k-opc.c (m68k_opcodes): Add swbeg pseudo-instruction. + +Thu Feb 13 16:30:02 1997 Jeffrey A Law (law@cygnus.com) + + * mn10200-opc.c (IMM16_PCREL): This is a signed operand. + (IMM24_PCREL): Likewise. + +Thu Feb 13 13:28:43 1997 Ian Lance Taylor + + * mips-dis.c (print_mips16_insn_arg): Use memaddr - 2 as the base + address for an extended PC relative instruction that is not a + branch. + +Wed Feb 12 12:27:40 1997 Andreas Schwab + + * m68k-dis.c (print_insn_m68k): Set bytes_per_chunk and + bytes_per_line. + +start-sanitize-tic80 +Tue Feb 11 16:36:31 1997 Fred Fish + + * tic80-opc.c (tic80_operands): Fix typo '+' -> '|'. + (tic80_opcodes): Sort entries so that long immediate forms + come after short immediate forms, making it easier for + assembler to select the right one for a given operand. + +end-sanitize-tic80 +Tue Feb 11 15:26:47 1997 Ian Lance Taylor + + * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and + display_endian. + (print_insn_mips16): Likewise. + +start-sanitize-r5900 +Fri Feb 7 11:12:44 1997 Gavin Koch + + * mips-opc.c: add r5900. + +end-sanitize-r5900 +start-sanitize-tic80 +Mon Feb 10 10:12:41 1997 Fred Fish + + * tic80-opc.c (tic80_symbol_to_value): Changed to accept + a symbol class that restricts translation to just that + class (general register, condition code, etc). + +Thu Feb 6 17:34:09 1997 Fred Fish + + * tic80-opc.c (tic80_operands): Add REG_0_E, REG_22_E, + and REG_DEST_E for register operands that have to be + an even numbered register. Add REG_FPA for operands that + are one of the floating point accumulator registers. + Add TIC80_OPERAND_MASK to flags for ENDMASK operand. + (tic80_opcodes): Change entries that need even numbered + register operands to use the new operand table entries. + Add "or" entries that are identical to "or.tt" entries. + +end-sanitize-tic80 +Wed Feb 5 11:12:44 1997 Ian Lance Taylor + + * mips16-opc.c: Add new cases of exit instruction for + disassembler. + * mips-dis.c (print_mips16_insn_arg): Display floating point + registers in operands of exit instruction. Print `$' before + register names in operands of entry and exit instructions. + +start-sanitize-tic80 +Thu Jan 30 14:09:03 1997 Fred Fish + + * tic80-opc.c (tic80_predefined_symbols): Table of name/value + pairs for all predefined symbols recognized by the assembler. + Also used by the disassembling routines. + (tic80_symbol_to_value): New function. + (tic80_value_to_symbol): New function. + * tic80-dis.c (print_operand_control_register, + print_operand_condition_code, print_operand_bitnum): + Remove private tables and use tic80_value_to_symbol function. + +end-sanitize-tic80 +Thu Jan 30 11:30:45 1997 Martin M. Hunt + + * d10v-dis.c (print_operand): Change address printing + to correctly handle PC wrapping. Fixes PR11490. + +Wed Jan 29 09:39:17 1997 Jeffrey A Law (law@cygnus.com) + + * mn10200-opc.c (mn10200_operands): Make 8 and 16 bit pc-relative + branches relaxable. + +Tue Jan 28 15:57:34 1997 Ian Lance Taylor + + * mips-dis.c (print_insn_mips16): Set insn_info information. + (print_mips16_insn_arg): Likewise. + + * mips-dis.c (print_insn_mips16): Better handling of an extend + opcode followed by an instruction which can not be extended. + +Fri Jan 24 12:08:21 1997 J.T. Conklin + + * m68k-opc.c (m68k_opcodes): Changed operand specifier for the + coldfire moveb instruction to not allow an address register as + destination. Although the documentation does not indicate that + this is invalid, experiments uncovered unexpected behavior. + Added a comment explaining the situation. Thanks to Andreas + Schwab for pointing this out to me. + start-sanitize-tic80 Wed Jan 22 20:13:51 1997 Fred Fish @@ -210,12 +771,10 @@ Fri Dec 27 22:30:57 1996 Fred Fish * tic80-opc.c: Add file. end-sanitize-tic80 -start-sanitize-d10v Fri Dec 20 14:30:19 1996 Martin M. Hunt * d10v-opc.c (pre_defined_registers): Add cr[0-15], dpc, dpsw, link. -end-sanitize-d10v Mon Dec 16 13:00:15 1996 Jeffrey A Law (law@cygnus.com) * mn10200-opc.c (mn10200_operands): Add SIMM16N. @@ -380,12 +939,10 @@ Tue Nov 19 13:33:01 1996 Jeffrey A Law (law@cygnus.com) list. (mn10300_opcodes): Use REGS for register list in "movm" instructions. -start-sanitize-d10v Mon Nov 18 15:20:35 1996 Michael Meissner * d10v-opc.c (d10v_opcodes): Add3 sets the carry. -end-sanitize-d10v Fri Nov 15 13:43:19 1996 Jeffrey A Law (law@cygnus.com) * mn10300-opc.c (mn10300_opcodes): Demand parens around @@ -423,14 +980,12 @@ Tue Nov 5 13:26:58 1996 Jeffrey A Law (law@cygnus.com) the extended part of an instruction. (mn10300_operands): Use new opcodes as appropriate. -start-sanitize-d10v Tue Nov 5 10:30:51 1996 Martin M. Hunt * d10v-opc.c (d10v_opcodes): Declare the trap instruction sequential so the assembler never parallelizes it with other instructions. -end-sanitize-d10v Mon Nov 4 12:50:40 1996 Jeffrey A Law (law@cygnus.com) * mn10300-opc.c (mn10300_operands): Add DN01 and AN01 for @@ -709,13 +1264,11 @@ Wed Aug 28 15:55:43 1996 Jeffrey A Law (law@cygnus.com) end of the opcode table. end-sanitize-v850 -start-sanitize-d10v Mon Aug 26 13:35:53 1996 Martin M. Hunt * d10v-opc.c (pre_defined_registers): Added register pairs, "r0-r1", "r2-r3", etc. -end-sanitize-d10v start-sanitize-v850 Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com) @@ -804,14 +1357,12 @@ Mon Aug 19 15:21:38 1996 Doug Evans * sparc-dis.c (print_insn_sparc): Handle little endian sparcs. -start-sanitize-d10v Thu Aug 15 13:14:43 1996 Martin M. Hunt * d10v-opc.c: Add additional information to the opcode table to help determinine which instructions can be done in parallel. -end-sanitize-d10v Thu Aug 15 13:11:13 1996 Stan Shebs * mpw-make.sed: Update editing of include pathnames to be @@ -825,7 +1376,6 @@ Wed Aug 14 17:00:04 1996 Richard Henderson * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5. -start-sanitize-d10v Mon Aug 12 14:30:37 1996 Martin M. Hunt * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l. @@ -834,7 +1384,6 @@ Fri Aug 9 13:21:59 1996 Martin M. Hunt * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER. -end-sanitize-d10v Thu Aug 8 12:43:52 1996 Klaus Kaempf * makefile.vms: Update for alpha-opc changes. @@ -844,13 +1393,11 @@ Wed Aug 7 11:55:10 1996 Ian Lance Taylor * i386-dis.c (print_insn_i386): Actually return the correct value. (ONE, OP_ONE): #ifdef out; not used. -start-sanitize-d10v Fri Aug 2 17:47:03 1996 Martin M. Hunt * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions. Changed subi operand type to treat 0 as 16. -end-sanitize-d10v Wed Jul 31 16:21:41 1996 Ian Lance Taylor * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose @@ -863,13 +1410,11 @@ Wed Jul 31 14:39:27 1996 James G. Smith * arm-dis.c: (print_insn_arm): Provide decoding of the new formats %h and %s. -start-sanitize-d10v Fri Jul 26 11:45:04 1996 Martin M. Hunt * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift. (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S. -end-sanitize-d10v Fri Jul 26 14:01:43 1996 Ian Lance Taylor * alpha-dis.c (print_insn_alpha_osf): Remove. @@ -878,7 +1423,6 @@ Fri Jul 26 14:01:43 1996 Ian Lance Taylor names based on info->flavour. * disassemble.c: Always return print_insn_alpha for the alpha. -start-sanitize-d10v Thu Jul 25 15:24:17 1996 Martin M. Hunt * d10v-dis.c (dis_long): Handle unknown opcodes. @@ -894,20 +1438,17 @@ Tue Jul 23 11:02:53 1996 Martin M. Hunt * d10v-dis.c: Change all functions to use info->print_address_func. -end-sanitize-d10v Mon Jul 22 15:38:53 1996 Andreas Schwab * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire move ccr/sr insns more strict so that the disassembler only selects them when the addressing mode is data register. -start-sanitize-d10v Mon Jul 22 11:25:24 1996 Martin M. Hunt * d10v-opc.c (pre_defined_registers): Declare. * d10v-dis.c (print_operand): Now uses pre_defined_registers to pick a better name for the registers. -end-sanitize-d10v Mon Jul 22 13:47:23 1996 Ian Lance Taylor * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix @@ -930,8 +1471,7 @@ Thu Jul 18 17:19:34 1996 Ian Lance Taylor * configure: Rebuild. * Makefile.in (install): Use @INSTALL_SHLIB@. -start-sanitize-d10v - Wed Jul 17 14:39:05 1996 Martin M. Hunt +Wed Jul 17 14:39:05 1996 Martin M. Hunt * configure: (bfd_d10v_arch) Add new case. * configure.in: (bfd_d10v_arch) Add new case. @@ -939,7 +1479,6 @@ start-sanitize-d10v * d10v-opc.c: New file. * disassemble.c (disassembler) Add entry for d10v. -end-sanitize-d10v Wed Jul 17 10:12:05 1996 J.T. Conklin * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating