X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=5dc3d2d1a0bce5d10025124d5ffc4c2aa72248aa;hb=bac914a58b30b3f232b3de7cfa5816741d51b6a9;hp=c9d2fbb698da2e08ee3cd86e7bd784d9fa65217e;hpb=0c4f6dc21ac0f465d2dd00b33021a6157b1a941e;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index c9d2fbb698..5dc3d2d1a0 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,413 @@ +Fri Feb 27 13:16:42 1998 Andrew Cagney + + * mips-opc.c (r5900/madd.s): Takes three operands, not four. Fix + opcode. + (r5900/min.s): Incorrect opcode ....,101001 not ...110000. + (r5900/msub.s): Takes three operands, not four. Fix opcode. + +start-sanitize-d30v +Thu Feb 26 15:53:09 1998 Michael Meissner + + * d30v-opc.c (d30v_opcode_table): Indicate which instructions are + delayed branches or jumps. + +end-sanitize-d30v +start-sanitize-sky +Fri Feb 27 10:04:19 1998 Doug Evans + + * dvp-opc.c (vif_operands): Add unpack[u] support. + (vif_opcodes): Ditto. + (*_vif_imrubits): Renamed from *_vif_imrbits. + +Wed Feb 25 00:27:44 1998 Doug Evans + + * dvp-dis.c (print_insn): Handle word number. + Handle mips address vs vu address. + * dvp-opc.c (vif_operands): Use DVP_OPERAND_VU_ADDRESS. + (dma_operands): Use DVP_OPERAND_MIPS_ADDRESS. + ({insert,extract}_dma_addr): Fix word ofset. + ({insert,print}_gif_regs): Fix encode/decode. + +end-sanitize-sky +Tue Feb 24 10:46:44 1998 Doug Evans + + * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed + to *info->symbols. + * mips-dis.c (print_insn_{big,little}_mips): Likewise. + * tic30-dis.c (print_branch): Likewise. +start-sanitize-sky + * mips-dis.c (print_insn_little_mips): Call dvp_info_mach_type. + * dvp-dis.c (dvp_info_mach_type): New function. + (print_insn_dvp): Call it. + (print_vif): Return length of 4 if mpg or direct insn so following + insns get properly disabled. + (print_gif): Fix word order. + * dvp-opc.c (vif_insn_len): New argument `pcpu'. All callers updated. + (gif_operands): Fix word order. + (gif_opcodes): Likewise. + ({insert,extract,print}_gif_regs): Likewise. + (gif_regs): Add new register number/name changes. + (dma_opcodes): Add dmarefe insn. +end-sanitize-sky + +Tue Feb 24 11:06:18 1998 Nick Clifton + + * arm-dis.c (print_insn_big_arm, print_insn_little_arm): Remove + saved_symbol code as it is no longer needed. + +Mon Feb 23 13:16:17 1998 Doug Evans + + * cgen-asm.c: Include symcat.h. + * cgen-dis.c,cgen-opc.c,cgen-asm.in,cgen-dis.in: Ditto. + + * m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate. + +start-sanitize-sky +Mon Feb 23 09:51:39 1998 Doug Evans + + * dvp-opc.c (extra_dma_flags): Fix typos. + (dma_operands): Fix word numbers. + (dma_opcodes): Likewise. + ({insert,extract}_dma_flags): Likewise. + +end-sanitize-sky +Mon Feb 23 10:34:58 1998 Jeffrey A Law (law@cygnus.com) + + * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'. + +start-sanitize-sky +Fri Feb 20 18:02:20 1998 Doug Evans + + * dvp-dis.c (print_gif): Complete. + * dvp-opc.c (gif_operands,gif_opcodes): Complete. + (state_gif_{nregs,regs,nloop}): New static locals. + (*_gif_*): Complete. + (dvp_opcode_init_{parse,print}): Init gif state locals. + (extract_vif_datalen,{insert,extract}_vif_imrbits): New functions. + (vif_insn_len): Handle `unpack'. + ({insert,extract}_dma_flags): Complete. + +end-sanitize-sky +start-sanitize-r5900 +Fri Feb 20 01:23:16 1998 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (mula.s): Renamed from multa.s. + +end-sanitize-r5900 +Thu Feb 19 16:51:13 1998 Doug Evans + + * m32r-opc.[ch]: Regenerate. + +start-sanitize-sky +Thu Feb 19 02:11:39 1998 Doug Evans + + * dvp-opc.c (dma_operands): Rewrite. + (dma_operand_{count,addr}): New globals. + (dma_opcodes): Rewrite. Add "dmaend" with no operands. + (insert_dma_addr): Insert value into insn. + (extract_dma_addr): Extract value from insn. + +Wed Feb 18 15:46:46 1998 Doug Evans + + * dvp-dis.c (print_vu): Handle loi insns. + (print_insn): Likewise. + * dvp-opc.c (vu_lower_opcodes): Add "loi". + (vu_operands): Make LDEST1 a FAKE operand. + (parse_dest1): Allow elided argument. + (print_dest1): Don't print the argument. + +Tue Feb 17 18:48:25 1998 Doug Evans + + * dvp-opc.c (parse_vfreg): Dest spec is optional. + (print_vfreg): Don't print dest spec. + (parse_accdest): Dest spec is optional. + (print_accdest): Don't print dest spec. + +end-sanitize-sky +Tue Feb 17 17:14:50 1998 Doug Evans + + * Makefile.am (CGENFILES): Update. + * Makefile.in: Regenerate. + * cgen-asm.in (insert_normal): Result is error message now. + Validate value to be inserted. + (insert_insn_normal): Result is error message now. + (@arch@_cgen_assemble_insn): Update. + * cgen-asm.c (cgen_parse_{signed,unsigned}_integer): Delete min,max + arguments. Don't perform validation here. + * m32r-asm.c,m32r-dis.c,m32r-opc.c: Regenerate. + +Fri Feb 13 14:26:06 1998 Doug Evans + + * cgen-opc.in (@arch@_cgen_get_insn_operands): Handle empty + operand instance list. + * m32r-opc.c: Regenerate. + +Fri Feb 13 14:53:02 1998 Ian Lance Taylor + + * Makefile.am (AUTOMAKE_OPTIONS): Define. + * configure, Makefile.in, aclocal.m4: Rebuild with automake 1.2e. + +Fri Feb 13 10:21:09 1998 Mark Alexander + + * m10300-dis.c (print_insn_mn10300): Recognize break instruction. + +Fri Feb 13 13:12:14 1998 Ian Lance Taylor + + * configure.in: Get the version number from BFD. + * configure: Rebuild. + + From H.J. Lu : + * Makefile.am (libopcodes_la_LDFLAGS): Define. + * Makefile.in: Rebuild. + +Fri Feb 13 09:50:32 1998 Nick Clifton + + * m32r-opc.c: Regenerate. + * m32r-opc.h: Regenerate. + +Thu Feb 12 11:01:40 1998 Doug Evans + + * cgen-opc.in (@arch@_cgen_lookup_insn): New argument alias_p. + Ignore ALIAS insns if asked to. + (@arch@_cgen_get_insn_operands): Pass 0 for alias_p, NULL for insn. + * m32r-opc.c: Regenerate. + +start-sanitize-sky + * dvp.opc.c: Nicely format opcode tables. + (vu_operands): New element UFLAGS. + (parse_uflags,print_uflags): New functions. + (vu_upper_opcodes): Add UFLAGS to all insns. + +end-sanitize-sky +Thu Feb 12 03:41:00 1998 J"orn Rennecke + + Fix rac to accept only a0: + * d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes): + Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1. + Introduce OPERAND_GPR. + * d10v-dis.c (print_operand): Likewise. + +Wed Feb 11 18:58:34 1998 Doug Evans + + * cgen-opc.in: New file. + * cgen.sh: Translate @ARCH@. Cat cgen-opc.in into @arch@-opc.c. + * Makefile.am (CGENFILES): Add cgen-opc.in. + * Makefile.in: Regenerate. + + * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain. + (cgen_hw_lookup): Make result const. + + * cgen-dis.in (*): Use PTR instead of void *. + (print_insn): Delete unused vars `i', `syntax'. + + * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate. + +start-sanitize-sky +Tue Feb 10 14:56:24 1998 Doug Evans + + * dvp-opc.c (*): pke,gpuif renamed to vif,gif. + (vif_opcodes): Update renamed insns. + * dvp-dis.c (*): Likewise. + +end-sanitize-sky +Sat Feb 7 15:30:27 1998 Ian Lance Taylor + + * configure, aclocal.m4: Rebuild with new libtool. + +start-sanitize-d30v +Thu Feb 5 17:56:10 1998 Michael Meissner + + * d30v-opc.c (repeat{,i} instructions): Repeat/repeati + instructions use a PC relative branch, not absolute. + +end-sanitize-d30v +Wed Feb 4 19:17:37 1998 Ian Lance Taylor + + * configure.in: Set libtool_enable_shared rather than + libtool_shared. Remove diversion hack. + * configure, Makefile.in, aclocal.m4: Rebuild with new libtool. + +Tue Feb 3 17:19:40 1998 Doug Evans + + * cgen-opc.c (cgen_set_cpu): Initialize hardware table. + * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate. + +Mon Feb 2 19:22:15 1998 Steve Haworth + + * tic30-dis.c: New file. + * disassemble.c (disassembler): Add bfd_arch_tic30 case. + * configure.in: Handle bfd_tic30_arch. + * Makefile.am: Rebuild dependencies. + (CFILES): Add tic30-dis.c + (ALL_MACHINES): Add tic30-dis.lo. + * configure, Makefile.in: Rebuild. + +start-sanitize-m32rx +Mon Feb 2 11:04:08 1998 Nick Clifton + + * m32r-opc.c, m32r-opc.h, m32r-asm.c m32r-dis.c: Newly generated + versions after updates to m32r.cpu to remove mulwhi-a, mulwlo-a, + macwhi-a and macwlo-a instructions. + +end-sanitize-m32rx +start-sanitize-sky +Fri Jan 30 17:39:21 1998 Ian Carmichael + + * dvp-opc.c, fixed encoding of a bunch of instructions to + be consistent with the asmvu assembler (and inconsistent + with the specification). + +Thu Jan 29 18:14:56 1998 Ian Carmichael + + * dvp-opc.c, fixed order of pkemscal/pkemscalf instructions + in the opcode table. The pkemscalf instruction must come first. + +Thu Jan 29 16:47:24 1998 Ian Carmichael + + * dvp-opc.c, MAXIi should be VUOP6(0x1d) instead of 0x2d. + +end-sanitize-sky +Thu Jan 29 13:02:56 1998 Doug Evans + + * m32r-opc.h (HAVE_CPU_M32R): Define. + +start-sanitize-sky +Wed Jan 28 13:46:19 1998 Doug Evans + + * dvp-dis.c, dvp-opc.c: New files. + * configure.in: Compile them if bfd_dvp_arch, as well as mips. + * configure: Regenerate. + * Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo. + (dvp-dis.lo,dvp-opc.lo): Add rules for. + (mips-dis.lo): Compile with @archdefs@. + * Makefile.in: Regenerate. + * disassemble.c: Define ARCH_mips ifdef ARCH_dvp. + * mips-dis.c (print_insn_little_mips): Check for DVP insns. + +end-sanitize-sky +Wed Jan 28 09:55:03 1998 Nick Clifton + + * v850-opc.c (insertion routines): If both alignment and size is + wrong then report this. + +Tue Jan 27 21:52:59 1998 Jeffrey A Law (law@cygnus.com) + + * mips-dis.c (_print_insn_mips): Set target_processor as appropriate. + Only recognize instructions for the current target_processor. + +Thu Jan 22 16:20:17 1998 Fred Fish + + * d10v-dis.c (PC_MASK): Correct value. + (print_operand): If there's a reloc, don't calculate the + address because they could be in different sections. + +start-sanitize-cygnus +Thu Jan 22 16:10:32 1998 Doug Evans + + * cgen.sh: Rewrite to be like simulator's version. + * Makefile.am (cgen): Update call to cgen.sh. + * Makefile.in: Regenerate + +end-sanitize-cygnus +Fri Jan 16 15:29:11 1998 Jim Blandy + + * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu" + instruction after the 4650's "mul" instruction; nobody's using the + 4010 these days. If object files someday indicate which processor + variant they're intended for, we can do a better job at this. + +start-sanitize-r5900 +Tue Jan 13 09:21:56 1998 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (c.lt.s): Add r5900 variant. + (c.le.s): Likewise. + +end-sanitize-r5900 +Mon Jan 12 14:43:54 1998 Doug Evans + + * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using + table provided entry size. Use CGEN_INSN_MNEMONIC. + (cgen_parse_keyword): Rewrite. + * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using + table provided entry size. Use CGEN_INSN_MASK_BITSIZE. + * cgen-opc.c: Clean up pass over `struct foo' usage. + (cgen_keyword_lookup_value): Handle "" entry. + (cgen_keyword_add): Likewise. +start-sanitize-cygnus + * Makefile.am: Add cgen support. + * Makefile.in: Regenerate. + * configure.in: Add cgen support. + * configure: Regenerate. + * aclocal.m4: Regenerate. + * cgen.sh, cgen-asm.in, cgen-dis.in: New files. +end-sanitize-cygnus + +Mon Dec 22 12:37:06 1997 Ian Lance Taylor + + * mips-opc.c: Add FP_D to s.d instruction flags. + +Wed Dec 17 11:38:29 1997 Andreas Schwab + + * m68k-opc.c (halt, pulse): Enable them on the 68060. + +start-sanitize-tic80 +Tue Dec 16 15:22:53 1997 Fred Fish + + * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit + PC relative offset forms before the 15 bit forms. An assembler command + line option now chooses the default. + +end-sanitize-tic80 +start-sanitize-r5900 +Tue Dec 16 13:24:22 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c: Add many missing r5900 instructions. + +end-sanitize-r5900 +start-sanitize-d30v +Tue Dec 16 15:22:51 1997 Michael Meissner + + * d30v-opc.c (d30v_opcode_table): Set new flags bits + FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions. + +end-sanitize-d30v +1997-12-15 Brendan Kehoe + + * configure: Only build libopcodes shared if --enable-shared's value + was `yes', or was set to `*opcodes*'. + * aclocal.m4: Likewise. + * NOTE: this really needs to be fixed in libtool/libtool.m4, the + original source of this bit of code. It's not clear what the best fix + would be, though. + +start-sanitize-r5900 +Mon Dec 15 12:43:36 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants. +end-sanitize-r5900 +start-sanitize-tic80 +Fri Dec 12 11:57:04 1997 Fred Fish + + * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change. + (tic80_opcodes): Reorder table entries to put the 32 bit PC relative + offset forms before the 15 bit forms, to default to the long forms. + +end-sanitize-tic80 +Fri Dec 12 01:32:30 1997 Richard Henderson + + * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid. + +Wed Dec 10 17:42:35 1997 Nick Clifton + + * arm-dis.c (print_insn_little_arm): Prevent examination of stored + symbol if none is present. + (print_insn_big_arm): Prevent examination of stored symbol if + none is present. + +Thu Oct 23 21:13:37 1997 Fred Fish + + * d10v-opc.c (d10v_opcodes): Correct entry for RTE. + Mon Dec 8 11:21:07 1997 Nick Clifton * disassemble.c: Remove disasm_symaddr() function. @@ -171,7 +581,7 @@ Thu Oct 2 13:36:45 1997 Nick Clifton * v850-dis.c (v850_sreg_names): Use symbolic names for higher system registers. -start-sanitize-v850e +end-sanitize-v850e Wed Oct 1 16:58:54 1997 Nick Clifton * v850-opc.c: Fix typo in comment. @@ -380,8 +790,8 @@ Mon Aug 18 11:08:25 1997 Nick Clifton Mon Aug 18 11:08:25 1997 Nick Clifton - * configure (cgen_files): Add support for v850eq target. - * configure.in (cgen_files): Add support for v850eq target. + * configure (cgen_files): Add support for v850ea target. + * configure.in (cgen_files): Add support for v850ea target. end-sanitize-v850e Fri Aug 15 05:17:48 1997 Doug Evans @@ -397,10 +807,10 @@ Fri Aug 15 05:17:48 1997 Doug Evans Wed Aug 13 18:52:11 1997 Nick Clifton start-sanitize-v850e - * v850-dis.c (disassemble): Add support for v850EQ instructions. + * v850-dis.c (disassemble): Add support for v850EA instructions. * v850-opc.c (insert_i5div, extract_i5div): New Functions. - (v850_opcodes): Add v850EQ instructions. + (v850_opcodes): Add v850EA instructions. * v850-dis.c (disassemble): Add support for v850E instructions.