X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=645e5d2528e3480864fa258bd16b242d39e63b13;hb=9ab069eadcff793a103183ad255d1b92b16efc42;hp=7d7849f4b16944e83847b44700fedb77f3d4262b;hpb=726257a8b899e3d5e83f8d454a5d7788f8318d6e;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7d7849f4b1..143a1dd1e2 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,739 @@ +start-sanitize-v850 +Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_operands): D16 inserts at offset 16! + + * v850-opc.c (two): Get order of words correct. + + * v850-opc.c (v850_operands): I16 inserts at offset 16! + + * v850-opc.c (v850_operands): Add "SR1" and "SR2" for system + register source and destination operands. + (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr". + + * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix + same thinko in "trap" opcode. + + * v850-opc.c (v850_opcodes): Add initializer for size field + on all opcodes. + + * v850-opc.c (v850_operands): D6 -> DS7. References changed. + Add D8 for 8-bit unsigned field in short load/store insns. + (IF4A, IF4D): These both need two registers. + (IF4C, IF4D): Define. Use 8-bit unsigned field. + (v850_opcodes): For "sld.h", "sld.w", "sst.h", "sst.w", use + IF4C & IF4D. For "trap" use I5U, not I5. Add IF1 operand + for "ldsr" and "stsr". + * v850-opc.c (v850_operands): 3-bit immediate for bit insns + is unsigned. + + * v850-opc.c (v850_opcodes): Correct short store half (sst.h) and + short store word (sst.w). + +Thu Aug 22 16:57:27 1996 J.T. Conklin + + * v850-opc.c (v850_operands): Added insert and extract fields, + pointers to functions that handle unusual operand encodings. + +Thu Aug 22 01:05:24 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_opcodes): Enable "trap". + + * v850-opc.c (v850_opcodes): Fix order of displacement + and register for "set1", "clr1", "not1", and "tst1". + +Wed Aug 21 18:46:26 1996 Jeffrey A Law (law@cygnus.com) + + * v850-opc.c (v850_operands): Add "B3" support. + (v850_opcodes): Fix and enable "set1", "clr1", "not1" + and "tst1". + + * v850-opc.c (v850_opcodes): "jmp" has only an R1 operand. + + * v850-opc.c: Close unterminated comment. + +Wed Aug 21 17:31:26 1996 J.T. Conklin + + * v850-opc.c (v850_operands): Add flags field. + (v850_opcodes): add move opcodes. + +Tue Aug 20 14:41:03 1996 J.T. Conklin + + * Makefile.in (ALL_MACHINES): Add v850-opc.o. + * configure: (bfd_v850v_arch) Add new case. + * configure.in: (bfd_v850_arch) Add new case. + * v850-opc.c: New file. + +end-sanitize-v850 +Mon Aug 19 15:21:38 1996 Doug Evans + + * sparc-dis.c (print_insn_sparc): Handle little endian sparcs. + +start-sanitize-d10v +Thu Aug 15 13:14:43 1996 Martin M. Hunt + + * d10v-opc.c: Add additional information to the opcode + table to help determinine which instructions can be done + in parallel. + +end-sanitize-d10v +Thu Aug 15 13:11:13 1996 Stan Shebs + + * mpw-make.sed: Update editing of include pathnames to be + more general. + +Thu Aug 15 16:28:41 1996 James G. Smith + + * arm-opc.h: Added "bx" instruction definition. + +Wed Aug 14 17:00:04 1996 Richard Henderson + + * alpha-opc.c (EV4EXTHWINDEX): Field width should be 8 not 5. + +start-sanitize-d10v +Mon Aug 12 14:30:37 1996 Martin M. Hunt + + * d10v-opc.c (d10v_opcodes): Minor fixes to addi and bl.l. + +Fri Aug 9 13:21:59 1996 Martin M. Hunt + + * d10v-opc.c (d10v_opcodes): Correct 'mv' unit entry to EITHER. + +end-sanitize-d10v +Thu Aug 8 12:43:52 1996 Klaus Kaempf + + * makefile.vms: Update for alpha-opc changes. + +Wed Aug 7 11:55:10 1996 Ian Lance Taylor + + * i386-dis.c (print_insn_i386): Actually return the correct value. + (ONE, OP_ONE): #ifdef out; not used. + +start-sanitize-d10v +Fri Aug 2 17:47:03 1996 Martin M. Hunt + + * d10v-opc.c (d10v_opcodes): Added 2 accumulator sub instructions. + Changed subi operand type to treat 0 as 16. + +end-sanitize-d10v +Wed Jul 31 16:21:41 1996 Ian Lance Taylor + + * m68k-opc.c: Add cpushl for the mcf5200. From Ken Rose + . + +Wed Jul 31 14:39:27 1996 James G. Smith + + * arm-opc.h: (arm_opcodes): Added halfword and sign-extension + memory transfer instructions. Add new format string entries %h and %s. + * arm-dis.c: (print_insn_arm): Provide decoding of the new + formats %h and %s. + +start-sanitize-d10v +Fri Jul 26 11:45:04 1996 Martin M. Hunt + + * d10v-opc.c (d10v_operands): Added UNUM4S; a 4-bit accumulator shift. + (d10v_opcodes): Modified accumulator shift instructions to use UNUM4S. + +end-sanitize-d10v +Fri Jul 26 14:01:43 1996 Ian Lance Taylor + + * alpha-dis.c (print_insn_alpha_osf): Remove. + (print_insn_alpha_vms): Remove. + (print_insn_alpha): Make globally visible. Chose the register + names based on info->flavour. + * disassemble.c: Always return print_insn_alpha for the alpha. + +start-sanitize-d10v +Thu Jul 25 15:24:17 1996 Martin M. Hunt + + * d10v-dis.c (dis_long): Handle unknown opcodes. + +Thu Jul 25 12:08:09 1996 Martin M. Hunt + + * d10v-opc.c: Changes to support signed and unsigned numbers. + All instructions with the same name that have long and short forms + now end in ".l" or ".s". Divs added. + * d10v-dis.c: Changes to support signed and unsigned numbers. + +Tue Jul 23 11:02:53 1996 Martin M. Hunt + + * d10v-dis.c: Change all functions to use info->print_address_func. + +end-sanitize-d10v +Mon Jul 22 15:38:53 1996 Andreas Schwab + + * m68k-opc.c (m68k_opcodes): Make opcode masks for the ColdFire + move ccr/sr insns more strict so that the disassembler only + selects them when the addressing mode is data register. + +start-sanitize-d10v +Mon Jul 22 11:25:24 1996 Martin M. Hunt + * d10v-opc.c (pre_defined_registers): Declare. + * d10v-dis.c (print_operand): Now uses pre_defined_registers + to pick a better name for the registers. + +end-sanitize-d10v +Mon Jul 22 13:47:23 1996 Ian Lance Taylor + + * sparc-opc.c: Fix opcode values for fpack16, and fpackfix. Fix + operands for fexpand and fpmerge. From Christian Kuehnke + . + +Mon Jul 22 13:17:06 1996 Richard Henderson + + * alpha-dis.c (print_insn_alpha): No longer the user-visible + print routine. Take new regnames and cpumask arguments. + Kill the environment variable nonsense. + (print_insn_alpha_osf): New function. Do OSF/1 style regnames. + (print_insn_alpha_vms): New function. Do VMS style regnames. + * disassemble.c (disassembler): Test bfd flavour to pick + between OSF and VMS routines. Default to OSF. + +Thu Jul 18 17:19:34 1996 Ian Lance Taylor + + * configure.in: Call AC_SUBST (INSTALL_SHLIB). + * configure: Rebuild. + * Makefile.in (install): Use @INSTALL_SHLIB@. + +start-sanitize-d10v + Wed Jul 17 14:39:05 1996 Martin M. Hunt + + * configure: (bfd_d10v_arch) Add new case. + * configure.in: (bfd_d10v_arch) Add new case. + * d10v-dis.c: New file. + * d10v-opc.c: New file. + * disassemble.c (disassembler) Add entry for d10v. + +end-sanitize-d10v +Wed Jul 17 10:12:05 1996 J.T. Conklin + + * m68k-opc.c (m68k_opcodes): Fix bugs in coldfire insns relating + to bcc, trapfl, subxl, and wddata discovered by Andreas Schwab. + +Mon Jul 15 16:59:55 1996 Stu Grossman (grossman@critters.cygnus.com) + + * i386-dis.c: Get rid of print_insn_i8086. Use info.mach to + distinguish between variants of the instruction set. + * sparc-dis.c: Get rid of print_insn_sparclite. Use info.mach to + distinguish between variants of the instruction set. + +Fri Jul 12 10:12:01 1996 Stu Grossman (grossman@critters.cygnus.com) + + * i386-dis.c (print_insn_i8086): New routine to disassemble using + the 8086 instruction set. + * i386-dis.c: General cleanups. Make most things static. Add + prototypes. Get rid of static variables aflags and dflags. Pass + them as args (to almost everything). + +Thu Jul 11 11:58:44 1996 Jeffrey A Law (law@cygnus.com) + + * h8300-dis.c (bfd_h8_disassemble): Handle macregs in ldmac insns. + + * h8300-dis.c (bfd_h8_disassemble): Handle "ldm.l" and "stm.l". + + * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two + if the next arg is marked with SRC_IN_DST. Gross. + + * h8300-dis.c (bfd_h8_disassemble): Print "exr" when + we're looking for and find EXR. + + * h8300-dis.c (bfd_h8_disassemble): We don't have a match + if we're looking for KBIT and we don't find it. + + * h8300-dis.c (bfd_h8_disassemble): Mask off unwanted bits + for L_3 and L_2. + + * h8300-dis.c (bfd_h8_disassemble): Don't set plen for + 3bit immediate operands. + +Tue Jul 9 10:55:20 1996 Ian Lance Taylor + + * Released binutils 2.7. + + * alpha-opc.c: Add new case of "mov". From Klaus Kaempf + . + +Thu Jul 4 11:42:51 1996 Ian Lance Taylor + + * alpha-opc.c: Correct second case of "mov" to use OPRL. + +Wed Jul 3 16:03:47 1996 Stu Grossman (grossman@critters.cygnus.com) + + * sparc-dis.c (print_insn_sparclite): New routine to print + sparclite instructions. + +Wed Jul 3 14:21:18 1996 J.T. Conklin + + * m68k-opc.c (m68k_opcodes): Add coldfire support. + +Fri Jun 28 15:53:51 1996 Doug Evans + + * sparc-opc.c (asi_table): Add #ASI_N, #ASI_N_L, #ASI_NUCLEUS, + #ASI_NUCLEUS_LITTLE. Rename #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_L + to #ASI_AS_IF_USER_{PRIMARY,SECONDARY}_LITTLE. + +Tue Jun 25 22:58:31 1996 Jason Molenda (crash@godzilla.cygnus.co.jp) + + * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir): + Use autoconf-set values. + (docdir, oldincludedir): Removed. + * configure.in (AC_PREREQ): autoconf 2.5 or higher. + +Fri Jun 21 13:53:36 1996 Richard Henderson + + * alpha-opc.c: New file. + * alpha-opc.h: Remove. + * alpha-dis.c: Complete rewrite to use new opcode table. + * configure.in: For bfd_alpha_arch, use alpha-opc.o. + * configure: Rebuild with autoconf 2.10. + * Makefile.in (ALL_MACHINES): Add alpha-opc.o. + (alpha-dis.o): Depend upon $(INCDIR)/opcode/alpha.h, not + alpha-opc.h. + (alpha-opc.o): New target. + +Wed Jun 19 15:55:12 1996 Ian Lance Taylor + + * sparc-dis.c (print_insn_sparc): Remove unused local variable i. + Set imm_added_to_rs1 even if the source and destination register + are not the same. + + * sparc-opc.c: Add some two operand forms of the wr instruction. + +Tue Jun 18 15:58:27 1996 Jeffrey A. Law + + * h8300-dis.c (bfd_h8_disassemble): Rename "hmode" argument + to just "mode". + + * disassemble.c (disassembler): Handle H8/S. + * h8300-dis.c (print_insn_h8300s): New function for H8/S. + +Tue Jun 18 18:06:50 1996 Ian Lance Taylor + + * sparc-opc.c: Add beq/teq as aliases for be/te. + + * ppc-opc.c: Fix fcmpo opcode. From Sergei Steshenko + . + +Tue Jun 18 15:08:54 1996 Klaus Kaempf + + * makefile.vms: New file. + + * alpha-dis.c (print_insn_alpha): Print lda ra,lit(rz) as mov. + +Mon Jun 10 18:50:38 1996 Ian Lance Taylor + + * h8300-dis.c (bfd_h8_disassemble): Always print ABS8MEM with :8, + regardless of plen. + +Tue Jun 4 09:15:53 1996 Doug Evans + + * i386-dis.c (OP_OFF): Call append_prefix. + +Thu May 23 15:18:23 1996 Michael Meissner + + * ppc-opc.c (instruction encoding macros): Add explicit casts to + unsigned long to silence a warning from the Solaris PowerPC + compiler. + +Thu Apr 25 19:33:32 1996 Doug Evans + + * sparc-opc.c (sparc_opcodes): Add ultrasparc vis extensions. + +Mon Apr 22 17:12:35 1996 Doug Evans + + * sparc-dis.c (X_IMM,X_SIMM): New macros. + (X_IMM13): Delete. + (print_insn_sparc): Merge cases i,I,j together. New cases X,Y. + * sparc-opc.c (sparc_opcodes): Use X for 5 bit shift constants, + Y for 6 bit shift constants. Rewrite entries for crdcxt, cwrcxt, + cpush, cpusha, cpull sparclet insns. + +Wed Apr 17 14:20:22 1996 Doug Evans + + * sparc-dis.c (compute_arch_mask): Replace ANSI style def with K&R. + +Thu Apr 11 17:30:02 1996 Ian Lance Taylor + + * sparc-opc.c: Set F_FBR on floating point branch instructions. + Set F_FLOAT on other floating point instructions. + +Mon Apr 8 17:02:48 1996 Michael Meissner + + * ppc-opc.c (PPC860): Macro for 860/821 specific instructions and + registers. + (powerpc_opcodes): Add 860/821 specific SPRs. + +Mon Apr 8 14:00:44 1996 Ian Lance Taylor + + * configure.in: Permit --enable-shared to specify a list of + directories. Set and substitute BFD_PICLIST. + * configure: Rebuild. + * Makefile.in (BFD_PICLIST): Rename from BFD_LIST. Change all + uses. Set to @BFD_PICLIST@. + +Fri Apr 5 17:12:27 1996 Jeffrey A Law (law@cygnus.com) + + * h8300-dis.c (bfd_h8_disassemble): Use "bit" for L_3 immediates, + not "abs", which may be needed for the absolute in something + like btst #0,@10:8. Print L_3 immediates separately from other + immediates. Change ABSMOV reference to ABS8MEM. + +Wed Apr 3 10:40:45 1996 Doug Evans + + * sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc. + (current_arch_mask): New static global. + (compute_arch_mask): New static function. + (print_insn_sparc): Delete sparc_v9_p. New static local + current_mach. Resort opcode table if current_mach changes. + Generalize "insn not supported" test. + (compare_opcodes): Prefer supported opcodes to nonsupported ones. + Delete test for v9/!v9. + * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK. + (v6notlet): Define. + (brfc): Split into CBR and FBR for coprocessor/fp branches. + (brfcx): Renamed to FBRX. + (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard + coprocessor mnemonics are not supported on the sparclet). + (condf): Renamed to CONDF. + (SLCBCC2): Delete F_ALIAS flag. + +Sat Mar 30 21:45:59 1996 Doug Evans + + * sparc-opc.c (sparc_opcodes): rd must be 0 for + mov foo,{%y,%psr,%wim,%tbr}. Support mov foo,%asrX. + +Fri Mar 29 13:02:40 1996 Ian Lance Taylor + + * Makefile.in (config.status): Depend upon BFD VERSION file, so + that the shared library version number is set correctly. + +Tue Mar 26 15:47:14 1996 Ian Lance Taylor + + * configure.in: Use AC_CHECK_TOOL to find ar and ranlib. From + Miles Bader . + * configure: Rebuild. + +Sat Mar 16 13:04:07 1996 Fred Fish + + * z8kgen.c (internal, gas): Call xmalloc rather than unchecked + malloc. + +Tue Mar 12 12:14:10 1996 Ian Lance Taylor + + * configure: Rebuild with autoconf 2.8. + +Thu Mar 7 15:11:10 1996 Doug Evans + + * sparc-dis.c (print_insn_sparc): Handle 'O' operand char like 'r'. + * sparc-opc.c (sparc_opcodes): Use 'O' operand char for `neg reg'. + +Tue Mar 5 15:51:57 1996 Ian Lance Taylor + + * configure.in: Don't set SHLIB or SHLINK to an empty string, + since they appear as targets in Makefile.in. + * configure: Rebuild. + +Mon Feb 26 13:03:40 1996 Stan Shebs + + * mpw-make.sed: Edit out shared library support bits. + +Tue Feb 20 20:48:28 1996 Doug Evans + + * sparc-opc.c (v8,v6notv9): Add MASK_SPARCLET. + (sparc_opcode_archs): Add MASK_V8 to sparclet entry. + (sparc_opcodes): Add sparclet insns. + (sparclet_cpreg_table): New static local. + (sparc_{encode,decode}_sparclet_cpreg): New functions. + * sparc-dis.c (print_insn_sparc): Handle sparclet cpregs. + +Tue Feb 20 11:02:44 1996 Alan Modra + + * i386-dis.c (index16): New static variable. + (putop): Print jecxz for 32 bit case, jcxz for 16 bit, not the + other way around. + (OP_indirE): Return result of OP_E. + (OP_E): Check for 16 bit addressing mode, and disassemble + correctly. Optimised 32 bit case a little. Don't print + "(base,index,scale)" when sib specifies only an offset. + +Mon Feb 19 12:32:17 1996 Ian Lance Taylor + + * configure.in: Set and substitute SHLIB_DEP. + * configure: Rebuild. + * Makefile.in (SHLIB_DEP): New variable. + (LIBIBERTY_LISTS, BFD_LIST): New variables. + (stamp-piclist): Depend upon LIBIBERTY_LISTS and BFD_LIST. If + COMMON_SHLIB, add them to piclist with appropriate modifications. + ($(SHLIB)): Depend upon $(SHLIB_DEP). Don't check COMMON_SHLIB + here: just use piclist. + +Mon Feb 19 02:03:50 1996 Doug Evans + + * sparc-dis.c (MASK_V9,V9_ONLY_P,V9_P): Define. + (print_insn_sparc): Rewrite v9/not-v9 tests. + (compare_opcodes): Likewise. + * sparc-opc.c (MASK_): Define. + (v6,v7,v8,sparclite,v9,v9a): Redefine. + (sparclet,v6notv9): Define. + (sparc_opcode_archs): Delete member `conflicts'. Add `supported'. + (sparc_opcodes): Delete F_NOTV9, use v6notv9 instead. + +Thu Feb 15 14:45:05 1996 Ian Lance Taylor + + * configure.in: Call AC_PROG_CC before configure.host. + * configure: Rebuild. + + * Makefile.in (SONAME): Remove leading ../bfd/ from $(SHLIB). + +Wed Feb 14 19:01:27 1996 Alan Modra + + * i386-dis.c (onebyte_has_modrm): New static array. + (twobyte_has_modrm): New static array. + (print_insn_i386): Only fetch the mod/reg/rm byte if it is needed. + +Tue Feb 13 15:15:01 1996 Ian Lance Taylor + + * Makefile.in ($(SHLINK)): Check ts against $(SHLIB), not + $(SHLINK). + +Mon Feb 12 16:26:06 1996 Michael Meissner + + * ppc-opc.c (PPC): Undef, so default defination on Windows NT + doesn't conflict. + +Wed Feb 7 13:59:54 1996 Ian Lance Taylor + + * m68k-opc.c (m68k_opcodes): The bkpt instruction is supported on + m68010up, not just m68020up | cpu32. + + * Makefile.in (SONAME): New variable. + ($(SHLINK)): Make a link to the transformed name, as well. + (stamp-tshlink): New target. + (install): Skip stamp-tshlink during install. + +Tue Feb 6 12:28:54 1996 Ian Lance Taylor + + * configure.in: Call AC_ARG_PROGRAM. + * configure: Rebuild. + * Makefile.in (program_transform_name): New variable. + (install): Transform library name before installing it. + +Mon Feb 5 16:14:42 1996 Ian Lance Taylor + + * i960-dis.c (mem): Add HX dcinva instruction. + + Support for building as a shared library, based on patches from + Alan Modra : + * configure.in: Add AC_ARG_ENABLE for shared and commonbfdlib. + New substitutions: ALLLIBS, PICFLAG, SHLIB, SHLIB_CC, + SHLIB_CFLAGS, COMMON_SHLIB, SHLINK. + * configure: Rebuild. + * Makefile.in (ALLLIBS): New variable. + (PICFLAG, SHLIB, SHLIB_CC, SHLIB_CFLAGS): New variables. + (COMMON_SHLIB, SHLINK): New variables. + (.c.o): If PICFLAG is set, compile twice, once PIC, once normal. + (STAGESTUFF): Remove variable. + (all): Depend upon $(ALLLIBS) rather than $(TARGETLIB). + (stamp-piclist, piclist): New targets. + ($(SHLIB), $(SHLINK)): New targets. + ($(OFILES)): Depend upon stamp-picdir. + (disassemble.o): Build twice if PICFLAG is set. + (MOSTLYCLEAN): Add pic/*.o. + (clean): Remove $(SHLIB), $(SHLINK), piclist, and stamp-piclist. + (distclean): Remove pic and stamp-picdir. + (install): Install shared libraries. + (stamp-picdir): New target. + +Fri Feb 2 17:15:25 1996 Doug Evans + + * sparc-dis.c (print_insn_sparc): Delete DISASM_RAW_INSN support. + Print unknown instruction as "unknown", rather than in hex. + +Tue Jan 30 14:06:08 1996 Ian Lance Taylor + + * dis-buf.c: Include "sysdep.h" before "dis-asm.h". + +Thu Jan 25 20:24:07 1996 Doug Evans + + * sparc-opc.c (sparc_opcode_archs): Mark v8/sparclite as conflicting. + +Thu Jan 25 11:56:49 1996 Ian Lance Taylor + + * i386-dis.c (print_insn_i386): Only fetch the mod/reg/rm byte + when necessary. From Ulrich Drepper + . + +Thu Jan 25 03:39:10 1996 Doug Evans + + * sparc-dis.c (print_insn_sparc): NUMOPCODES replaced with + sparc_num_opcodes. Update architecture enum values. + * sparc-opc.c (sparc_opcode_archs): Replaces architecture_pname. + (sparc_opcode_lookup_arch): New function. + (sparc_num_opcodes): Renamed from bfd_sparc_num_opcodes. + (sparc_opcodes): Add v9a shutdown insn. + +Mon Jan 22 08:29:59 1996 Doug Evans + + * sparc-dis.c (print_insn_sparc): Renamed from print_insn. + If DISASM_RAW_INSN, print insn in hex. Handle v9a as opcode + architecture. + (print_insn_sparc64): Deleted. + * disassemble.c (disassembler, case bfd_arch_sparc): Always use + print_insn_sparc. + + * sparc-opc.c (architecture_pname): Add v9a. + +Fri Jan 12 14:35:58 1996 David Mosberger-Tang + + * alpha-opc.h (alpha_insn_set): VAX floating point opcode was + incorrectly defined as 0x16 when it should be 0x15. + (FLOAT_FORMAT_MASK): function code is 11 bits, not just 7 bits! + (alpha_insn_set): added cvtst and cvttq float ops. Also added + excb (exception barrier) which is defined in the Alpha + Architecture Handbook version 2. + * alpha-dis.c (print_insn_alpha): Fixed special-case decoding for + OPERATE_FORMAT_CODE type instructions. The bug caused mulq to be + disassembled as or, for example. + +Wed Jan 10 12:37:22 1996 Ian Lance Taylor + + * mips-dis.c (print_insn_arg): Print cases 'i' and 'u' in hex. + (_print_insn_mips): Change i from int to unsigned int. + +Thu Jan 4 17:21:10 1996 David Edelsohn + + * ppc-opc.c (powerpc_opcodes): tlbi POWER opcode form different + from tlbie PowerPC opcode. Add PPC603 tlbld and tlbli. + +Thu Dec 28 13:29:19 1995 John Hassey + + * i386-dis.c: Added Pentium Pro instructions. + +Tue Dec 19 22:56:35 1995 Michael Meissner + + * ppc-opc.c (fsqrt{,.}): Duplicate for PowerPC in addition to + being for Power2. + +Fri Dec 15 14:14:15 1995 J.T. Conklin + + * sh-opc.h (sh_nibble_type): Added REG_B. + (sh_arg_type): Added A_REG_B. + (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc + and stc.l opcodes. + * sh-dis.c (print_insn_shx): Added cases for REG_B and A_REG_B. + +Fri Dec 15 16:44:31 1995 Ian Lance Taylor + + * disassemble.c (disassembler): Use new bfd_big_endian macro. + +Tue Dec 12 12:22:24 1995 Ian Lance Taylor + + * Makefile.in (distclean): Remove stamp-h. From Ronald + F. Guilmette . + +Tue Dec 5 13:42:44 1995 Stan Shebs + + From David Mosberger-Tang : + * alpha-dis.c (print_insn_alpha): fixed decoding of cpys + instruction. + +Mon Dec 4 12:29:05 1995 J.T. Conklin + + * sh-opc.h (sh_arg_type): Added A_SSR and A_SPC. + (sh_table): Added many SH3 opcodes. + * sh-dis.c (print_insn_shx): Added cases for A_SSR and A_SPC. + +Fri Dec 1 07:42:18 1995 Michael Meissner + + * ppc-opc.c (subfc., subfco): Mark this PPCCOM, not PPC. + (subco,subco.): Mark this PPC, not PPCCOM. + +Mon Nov 27 13:09:52 1995 Ian Lance Taylor + + * configure: Rebuild with autoconf 2.7. + +Tue Nov 21 18:28:06 1995 Ian Lance Taylor + + * configure: Rebuild with autoconf 2.6. + +Wed Nov 15 19:02:53 1995 Ken Raeburn + + * configure.in: Sort list of architectures. Accept but do nothing + for alliant, convex, pyramid, romp, and tahoe. + +Wed Nov 8 20:18:59 1995 Ian Lance Taylor + + * a29k-dis.c (print_special): Change num to unsigned int. + +Wed Nov 8 20:10:35 1995 Eric Freudenthal + + * a29k-dis.c (print_insn): Cast insn24 to unsigned long when + shifting it. + +Tue Nov 7 15:21:06 1995 Ian Lance Taylor + + * configure.in: Call AC_CHECK_PROG to find and cache AR. + * configure: Rebuilt. + +Mon Nov 6 17:39:47 1995 Harry Dolan + + * configure.in: Add case for bfd_i860_arch. + * configure: Rebuild. + +Fri Nov 3 12:45:31 1995 Ian Lance Taylor + + * m68k-opc.c (m68k_opcodes): Correct fmoveml operands. + * m68k-dis.c (NEXTSINGLE): Change i to unsigned int. + (NEXTDOUBLE): Likewise. + (print_insn_m68k): Don't match fmoveml if there is more than one + register in the list. + (print_insn_arg): Handle a place of '8' for a type of 'L'. + +Thu Nov 2 23:06:33 1995 Ian Lance Taylor + + * m68k-opc.c: Use #W rather than #w. + * m68k-dis.c (print_insn_arg): Handle new 'W' place. + +Wed Nov 1 13:30:24 1995 Ian Lance Taylor + + * m68k-opc.c (m68k_opcode_aliases): Add dbfw as an alias for dbf, + and likewise for all the dbxx opcodes. + +Mon Oct 30 20:50:40 1995 Fred Fish + + * arc-dis.c: Include elf-bfd.h rather than libelf.h. + +Mon Oct 23 11:11:34 1995 James G. Smith + + * mips-opc.c: Added shorthand (V1) for INSN_4100 manifest. Added + the VR4100 specific instructions to the mips_opcodes structure. + +Thu Oct 19 11:05:23 1995 Stan Shebs + + * mpw-config.in, mpw-make.sed: Remove ugly workaround for + ugly Metrowerks bug in CW6, is fixed in CW7. + +Mon Oct 16 12:59:01 1995 Michael Meissner + + * ppc-opc.c (whole file): Add flags for common/any support. + +Tue Oct 10 11:06:07 1995 Fred Fish + + * Makefile.in (BISON): Remove macro. + (FLAGS_TO_PASS): Remove BISON. + +Fri Oct 6 16:26:45 1995 Ken Raeburn + + Mon Sep 25 22:49:32 1995 Andreas Schwab + + * m68k-dis.c (print_insn_m68k): Recognize all two-word + instructions that take no args by looking at the match mask. + (print_insn_arg): Always print "%" before register names. + [case 'c']: Use "nc" for the no-cache case, as recognized by gas. + [case '_']: Don't print "@#" before address. + [case 'J']: Use "%s" as format string, not register name. + [case 'B']: Treat place == 'C' like 'l' and 'L'. + Thu Oct 5 22:16:20 1995 Ken Raeburn * i386-dis.c: Describe cmpxchg8b operand, and spell the opcode @@ -54,12 +790,10 @@ Fri Sep 8 01:07:38 1995 Ian Lance Taylor * mips-opc.c: Change unaligned loads and stores with "t,A" operands to use "t,A(b)". -start-sanitize-sh3e Thu Sep 7 19:02:46 1995 Jim Wilson * sh-dis.c (print_insn_shx): Add F_FR0 support. -end-sanitize-sh3e Thu Sep 7 19:02:46 1995 Jim Wilson * sh-dis.c (print_insn_shx): Change loop over op->arg[n] to iterate @@ -74,13 +808,11 @@ Wed Sep 6 21:21:33 1995 Ian Lance Taylor * configure.in: Substitute HDEFINES. * configure: Rebuild. -start-sanitize-sh3e Wed Sep 6 15:08:09 1995 Jim Wilson * sh-opc.h (sh_arg_type): Add F_FR0. (sh_table, case fmac): Add F_FR0 as first argument. -end-sanitize-sh3e Wed Sep 6 15:08:09 1995 Jim Wilson * sh-opc.h (sh_opcode_info): Increase arg array size to 4. @@ -121,12 +853,10 @@ Mon Sep 4 14:28:46 1995 Ian Lance Taylor Use them rather than looking through target Makefile fragments. * configure: Rebuild. -start-sanitize-sh3e Thu Aug 31 12:35:32 1995 Jim Wilson * sh-opc.h (ftrc): Change FPUL_N to FPUL_M. -end-sanitize-sh3e Wed Aug 30 13:52:28 1995 Doug Evans * sparc-opc.c (sparc_opcodes): Delete duplicate wr %y insn. @@ -139,13 +869,11 @@ Wed Aug 30 13:52:28 1995 Doug Evans (sparc_{encode,decode}_prefetch): New functions. * sparc-dis.c (print_insn): Handle '*' arg (prefetch function). -start-sanitize-sh3e Wed Aug 30 11:11:58 1995 Jim Wilson * sh-opc.h: Add blank lines to improve readabililty of sh3e instructions. -end-sanitize-sh3e Wed Aug 30 11:09:38 1995 Jim Wilson * sh-dis.c: Correct comment on first line of file. @@ -172,12 +900,10 @@ Mon Aug 21 17:33:36 1995 Ian Lance Taylor and likewise for the size variants. Add dbhs as an alias for dbcc. -start-sanitize-sh3e Fri Aug 11 13:40:24 1995 Jeff Law (law@snake.cs.utah.edu) * sh-opc.h (FP sts instructions): Update to match reality. -end-sanitize-sh3e Mon Aug 7 16:12:58 1995 Ian Lance Taylor * m68k-dis.c: (fpcr_names): Add % before all register names. @@ -195,7 +921,6 @@ Mon Aug 7 16:12:58 1995 Ian Lance Taylor * m68k-opc.c (m68k_opcode_aliases): Add jsrl and jsrs as aliases for jsr. -start-sanitize-sh3e Mon Aug 7 02:21:40 1995 Jeff Law (law@snake.cs.utah.edu) * sh-dis.c (print_insn_shx): Handle new operand types F_REG_N, @@ -203,7 +928,6 @@ Mon Aug 7 02:21:40 1995 Jeff Law (law@snake.cs.utah.edu) * sh-opc.h (sh_arg_type): Add new operand types. (sh_table): Add new opcodes from SH3E Floating Point ISA. -end-sanitize-sh3e Sat Aug 5 16:50:14 1995 Fred Fish * Makefile.in (distclean): Remove generated file config.h. @@ -753,10 +1477,8 @@ Tue Jul 26 16:36:03 1994 Ken Raeburn (raeburn@cujo.cygnus.com) sparse_tabent. (ea): Local static array scale_tab now const. - start-sanitize-i960xl - * i960-dis.c (reg): Added i960XL instructions to reg_init table. + * i960-dis.c (reg): Added i960JX instructions to reg_init table. (REG_MAX): Updated. - end-sanitize-i960xl Tue Jul 19 21:00:00 1994 DJ Delorie (dj@ctron.com)