X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=762c7247ac94f86638ae16c0f7848fae8550732a;hb=c27e721e3e80bd3557657ce6175e0dc52233b977;hp=954517862c56f46c60f1ec044a1c7fc7b7d59208;hpb=796d53134aa59d7dcf70d0f82913974b04648c6a;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 954517862c..762c7247ac 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,475 @@ +2008-07-07 Adam Nemet + + * mips-opc.c (CP): New macro. + (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the + membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and + dmtc2 Octeon instructions. + +2008-07-07 Stan Shebs + + * dis-init.c (init_disassemble_info): Init endian_code field. + * arm-dis.c (print_insn): Disassemble code according to + setting of endian_code. + (print_insn_big_arm): Detect when BE8 extension flag has been set. + +2008-06-30 Richard Sandiford + + * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check + for ELF symbols. + +2008-06-25 Peter Bergner + + * ppc-dis.c (powerpc_init_dialect): Handle -M464. + (print_ppc_disassembler_options): Likewise. + * ppc-opc.c (PPC464): Define. + (powerpc_opcodes): Add mfdcrux and mtdcrux. + +2008-06-17 Ralf Wildenhues + + * configure: Regenerate. + +2008-06-13 Peter Bergner + + * ppc-dis.c (print_insn_powerpc): Update prototye to use new + ppc_cpu_t typedef. + (struct dis_private): New. + (POWERPC_DIALECT): New define. + (powerpc_dialect): Renamed to... + (powerpc_init_dialect): This. Update to use ppc_cpu_t and + struct dis_private. + (print_insn_big_powerpc): Update for using structure in + info->private_data. + (print_insn_little_powerpc): Likewise. + (operand_value_powerpc): Change type of dialect param to ppc_cpu_t. + (skip_optional_operands): Likewise. + (print_insn_powerpc): Likewise. Remove initialization of dialect. + * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp, + extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe, + extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr, + extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm, + insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe, + insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs, + insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect + param to be of type ppc_cpu_t. Update prototype. + +2008-06-12 Adam Nemet + + * mips-dis.c (print_insn_args): Handle field descriptors +x, +p, + +s, +S. + * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions + baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, + syncw, syncws, vm3mulu, vm0 and vmulu. + + * mips-dis.c (print_insn_args): Handle field descriptor +Q. + * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq, + seqi, sne and snei. + +2008-05-30 H.J. Lu + + * i386-opc.tbl: Add vmovd with 64bit operand. + * i386-tbl.h: Regenerated. + +2008-05-27 Martin Schwidefsky + + * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format. + +2008-05-22 H.J. Lu + + * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi. + * i386-tbl.h: Regenerated. + +2008-05-22 H.J. Lu + + PR gas/6517 + * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss + into 32bit and 64bit. Remove Reg64|Qword and add + IgnoreSize|No_qSuf on 32bit version. + * i386-tbl.h: Regenerated. + +2008-05-21 H.J. Lu + + * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq. + * i386-tbl.h: Regenerated. + +2008-05-21 M R Swami Reddy + + * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond. + +2008-05-14 Alan Modra + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + +2008-05-02 H.J. Lu + + * i386-dis.c (MOVBE_Fixup): New. + (Mo): Likewise. + (PREFIX_0F3880): Likewise. + (PREFIX_0F3881): Likewise. + (PREFIX_0F38F0): Updated. + (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update + PREFIX_0F38F0 and PREFIX_0F38F1 for movbe. + (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881. + + * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and + CPU_EPT_FLAGS. + (cpu_flags): Add CpuMovbe and CpuEPT. + + * i386-opc.h (CpuMovbe): New. + (CpuEPT): Likewise. + (CpuLM): Updated. + (i386_cpu_flags): Add cpumovbe and cpuept. + + * i386-opc.tbl: Add entries for movbe and EPT instructions. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2008-04-29 Adam Nemet + + * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for + the two drem and the two dremu macros. + +2008-04-28 Adam Nemet + + * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1 + instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and + cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros + INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D. + +2008-04-25 David S. Miller + + * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr + instead of %sys_tick_cmpr, as suggested in architecture manuals. + +2008-04-23 Paolo Bonzini + + * aclocal.m4: Regenerate. + * configure: Regenerate. + +2008-04-23 David S. Miller + + * sparc-opc.c (asi_table): Add UltraSPARC and Niagara + extended values. + (prefetch_table): Add missing values. + +2008-04-22 H.J. Lu + + * i386-gen.c (opcode_modifiers): Add NoAVX. + + * i386-opc.h (NoAVX): New. + (OldGcc): Updated. + (i386_opcode_modifier): Add noavx. + + * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3 + instructions which don't have AVX equivalent. + * i386-tbl.h: Regenerated. + +2008-04-18 H.J. Lu + + * i386-dis.c (OP_VEX_FMA): New. + (OP_EX_VexImmW): Likewise. + (VexFMA): Likewise. + (Vex128FMA): Likewise. + (EXVexImmW): Likewise. + (get_vex_imm8): Likewise. + (OP_EX_VexReg): Likewise. + (vex_i4_done): Renamed to ... + (vex_w_done): This. + (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps + and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on + FMA instructions. + (print_insn): Updated. + (OP_EX_VexW): Rewrite to swap register in VEX with EX. + (OP_REG_VexI4): Check invalid high registers. + +2008-04-16 Dwarakanath Rajagopal + Michael Meissner + + * i386-opc.tbl: Fix protX to allow memory in the middle operand. + * i386-tbl.h: Regenerate from i386-opc.tbl. + +2008-04-14 Edmar Wienskoski + + * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to + accept Power E500MC instructions. + (print_ppc_disassembler_options): Document -Me500mc. + * ppc-opc.c (DUIS, DUI, T): New. + (XRT, XRTRA): Likewise. + (E500MC): Likewise. + (powerpc_opcodes): Add new Power E500MC instructions. + +2008-04-10 Andreas Krebbel + + * s390-dis.c (init_disasm): Evaluate disassembler_options. + (print_s390_disassembler_options): New function. + * disassemble.c (disassembler_usage): Invoke + print_s390_disassembler_options. + +2008-04-10 Andreas Krebbel + + * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes + of local variables used for mnemonic parsing: prefix, suffix and + number. + +2008-04-10 Andreas Krebbel + + * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic + extensions for conditional jumps (o, p, m, nz, z, nm, np, no). + (s390_crb_extensions): New extensions table. + (insertExpandedMnemonic): Handle '$' tag. + * s390-opc.txt: Remove conditional jump variants which can now + be expanded automatically. + Replace '*' tag with '$' in the compare and branch instructions. + +2008-04-07 H.J. Lu + + * i386-dis.c (PREFIX_VEX_38XX): Add a tab. + (PREFIX_VEX_3AXX): Likewis. + +2008-04-07 H.J. Lu + + * i386-opc.tbl: Remove 4 extra blank lines. + +2008-04-04 H.J. Lu + + * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL + with CPU_PCLMUL_FLAGS/CpuPCLMUL. + (cpu_flags): Replace CpuCLMUL with CpuPCLMUL. + * i386-opc.tbl: Likewise. + + * i386-opc.h (CpuCLMUL): Renamed to ... + (CpuPCLMUL): This. + (CpuFMA): Updated. + (i386_cpu_flags): Replace cpuclmul with cpupclmul. + + * i386-init.h: Regenerated. + +2008-04-03 H.J. Lu + + * i386-dis.c (OP_E_register): New. + (OP_E_memory): Likewise. + (OP_VEX): Likewise. + (OP_EX_Vex): Likewise. + (OP_EX_VexW): Likewise. + (OP_XMM_Vex): Likewise. + (OP_XMM_VexW): Likewise. + (OP_REG_VexI4): Likewise. + (PCLMUL_Fixup): Likewise. + (VEXI4_Fixup): Likewise. + (VZERO_Fixup): Likewise. + (VCMP_Fixup): Likewise. + (VPERMIL2_Fixup): Likewise. + (rex_original): Likewise. + (rex_ignored): Likewise. + (Mxmm): Likewise. + (XMM): Likewise. + (EXxmm): Likewise. + (EXxmmq): Likewise. + (EXymmq): Likewise. + (Vex): Likewise. + (Vex128): Likewise. + (Vex256): Likewise. + (VexI4): Likewise. + (EXdVex): Likewise. + (EXqVex): Likewise. + (EXVexW): Likewise. + (EXdVexW): Likewise. + (EXqVexW): Likewise. + (XMVex): Likewise. + (XMVexW): Likewise. + (XMVexI4): Likewise. + (PCLMUL): Likewise. + (VZERO): Likewise. + (VCMP): Likewise. + (VPERMIL2): Likewise. + (xmm_mode): Likewise. + (xmmq_mode): Likewise. + (ymmq_mode): Likewise. + (vex_mode): Likewise. + (vex128_mode): Likewise. + (vex256_mode): Likewise. + (USE_VEX_C4_TABLE): Likewise. + (USE_VEX_C5_TABLE): Likewise. + (USE_VEX_LEN_TABLE): Likewise. + (VEX_C4_TABLE): Likewise. + (VEX_C5_TABLE): Likewise. + (VEX_LEN_TABLE): Likewise. + (REG_VEX_XX): Likewise. + (MOD_VEX_XXX): Likewise. + (PREFIX_0F38DB..PREFIX_0F38DF): Likewise. + (PREFIX_0F3A44): Likewise. + (PREFIX_0F3ADF): Likewise. + (PREFIX_VEX_XXX): Likewise. + (VEX_OF): Likewise. + (VEX_OF38): Likewise. + (VEX_OF3A): Likewise. + (VEX_LEN_XXX): Likewise. + (vex): Likewise. + (need_vex): Likewise. + (need_vex_reg): Likewise. + (vex_i4_done): Likewise. + (vex_table): Likewise. + (vex_len_table): Likewise. + (OP_REG_VexI4): Likewise. + (vex_cmp_op): Likewise. + (pclmul_op): Likewise. + (vpermil2_op): Likewise. + (m_mode): Updated. + (es_reg): Likewise. + (PREFIX_0F38F0): Likewise. + (PREFIX_0F3A60): Likewise. + (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE. + (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF + and PREFIX_VEX_XXX entries. + (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE. + (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and + PREFIX_0F3ADF. + (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE. + Add MOD_VEX_XXX entries. + (ckprefix): Initialize rex_original and rex_ignored. Store the + REX byte in rex_original. + (get_valid_dis386): Handle the implicit prefix in VEX prefix + bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE. + (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before + calling get_valid_dis386. Use rex_original and rex_ignored when + printing out REX. + (putop): Handle "XY". + (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and + ymmq_mode. + (OP_E_extended): Updated to use OP_E_register and + OP_E_memory. + (OP_XMM): Handle VEX. + (OP_EX): Likewise. + (XMM_Fixup): Likewise. + (CMP_Fixup): Use ARRAY_SIZE. + + * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS, + CPU_FMA_FLAGS and CPU_AVX_FLAGS. + (operand_type_init): Add OPERAND_TYPE_REGYMM and + OPERAND_TYPE_VEX_IMM4. + (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA. + (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD, + VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources, + VexImmExt and SSE2AVX. + (operand_types): Add RegYMM, Ymmword and Vex_Imm4. + + * i386-opc.h (CpuAVX): New. + (CpuAES): Likewise. + (CpuCLMUL): Likewise. + (CpuFMA): Likewise. + (Vex): Likewise. + (Vex256): Likewise. + (VexNDS): Likewise. + (VexNDD): Likewise. + (VexW0): Likewise. + (VexW1): Likewise. + (Vex0F): Likewise. + (Vex0F38): Likewise. + (Vex0F3A): Likewise. + (Vex3Sources): Likewise. + (VexImmExt): Likewise. + (SSE2AVX): Likewise. + (RegYMM): Likewise. + (Ymmword): Likewise. + (Vex_Imm4): Likewise. + (Implicit1stXmm0): Likewise. + (CpuXsave): Updated. + (CpuLM): Likewise. + (ByteOkIntel): Likewise. + (OldGcc): Likewise. + (Control): Likewise. + (Unspecified): Likewise. + (OTMax): Likewise. + (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma. + (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256, + vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a, + vex3sources, veximmext and sse2avx. + (i386_operand_type): Add regymm, ymmword and vex_imm4. + + * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions. + + * i386-reg.tbl: Add AVX registers, ymm0..ymm15. + + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2008-03-26 Bernd Schmidt + + From Robin Getz + * bfin-dis.c (bu32): Typedef. + (enum const_forms_t): Add c_uimm32 and c_huimm32. + (constant_formats[]): Add uimm32 and huimm16. + (fmtconst_val): New. + (uimm32): Define. + (huimm32): Define. + (imm16_val): Define. + (luimm16_val): Define. + (struct saved_state): Define. + (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG, + A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG, + LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define. + (get_allreg): New. + (decode_LDIMMhalf_0): Print out the whole register value. + + From Jie Zhang + * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for + multiply and multiply-accumulate to data register instruction. + + * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d, + c_imm32, c_huimm32e): Define. + (constant_formats): Add flags for printing decimal, leading spaces, and + exact symbols. + (comment, parallel): Add global flags in all disassembly. + (fmtconst): Take advantage of new flags, and print default in hex. + (fmtconst_val): Likewise. + (decode_macfunc): Be consistant with spaces, tabs, comments, + capitalization in disassembly, fix minor coding style issues. + (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise. + (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0, + decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0, + decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0, + decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0, + decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0, + decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0, + decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0, + decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0, + decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0, + _print_insn_bfin, print_insn_bfin): Likewise. + +2008-03-17 Ralf Wildenhues + + * aclocal.m4: Regenerate. + * configure: Likewise. + * Makefile.in: Likewise. + +2008-03-13 Alan Modra + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * configure: Regenerate. + +2008-03-07 Alan Modra + + * ppc-opc.c (powerpc_opcodes): Order and format. + +2008-03-01 H.J. Lu + + * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64. + * i386-tbl.h: Regenerated. + +2008-02-23 H.J. Lu + + * i386-opc.tbl: Disallow 16-bit near indirect branches for + x86-64. + * i386-tbl.h: Regenerated. + +2008-02-21 Jan Beulich + + * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword + and Fword for far indirect jmp. Allow Reg16 and Word for near + indirect jmp on x86-64. Disallow Fword for lcall. + * i386-tbl.h: Re-generate. + 2008-02-18 M R Swami Reddy * cr16-opc.c (cr16_num_optab): Defined @@ -231,7 +703,7 @@ (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax and intelsyntax. - * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax + * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp. * i386-tbl.h: Regenerated.