X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=7c7d9f4c1b67ad47e0e4afd398bfd93b250ba49c;hb=b4b393495f506632a9be966277c6d6e668ba9778;hp=3a38bb2853fb1333d90ca94c788cfcf543251b2f;hpb=bfbd943845684ac374c41797154d2c53cc338145;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3a38bb2853..7c7d9f4c1b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,263 @@ +2020-09-02 Alan Modra + + * i386-dis.c (OP_E_memory): Don't cast to signed type when + negating. + (get32, get32s): Use unsigned types in shift expressions. + +2020-09-02 Alan Modra + + * csky-dis.c (print_insn_csky): Use unsigned type for "given". + +2020-09-02 Alan Modra + + * crx-dis.c: Whitespace. + (print_arg): Use unsigned type for longdisp and mask variables, + and for left shift constant. + +2020-09-02 Alan Modra + + * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift. + * bpf-ibld.c: Regenerate. + * epiphany-ibld.c: Regenerate. + * fr30-ibld.c: Regenerate. + * frv-ibld.c: Regenerate. + * ip2k-ibld.c: Regenerate. + * iq2000-ibld.c: Regenerate. + * lm32-ibld.c: Regenerate. + * m32c-ibld.c: Regenerate. + * m32r-ibld.c: Regenerate. + * mep-ibld.c: Regenerate. + * mt-ibld.c: Regenerate. + * or1k-ibld.c: Regenerate. + * xc16x-ibld.c: Regenerate. + * xstormy16-ibld.c: Regenerate. + +2020-09-02 Alan Modra + + * bfin-dis.c (MASKBITS): Use SIGNBIT. + +2020-09-02 Cooper Qu + + * csky-opc.h (csky_v2_opcodes): Move divul and divsl + to CSKYV2_ISA_3E3R3 instruction set. + +2020-09-02 Cooper Qu + + * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws. + +2020-09-01 Alan Modra + + * mep-ibld.c: Regenerate. + +2020-08-31 Cooper Qu + + * csky-dis.c (csky_output_operand): Assign dis_info.value for + OPRND_TYPE_VREG. + +2020-08-30 Alan Modra + + * cr16-dis.c: Formatting. + (parameter): Delete struct typedef. Use dwordU instead + throughout file. + (make_argument ): Simplify detection of cbitb, sbitb + and tbitb. + (make_argument ): Extract 20-bit field not 16-bit. + +2020-08-29 Alan Modra + + PR 26446 + * csky-opc.h (MAX_OPRND_NUM): Define to 5. + (union csky_operand): Use MAX_OPRND_NUM to size oprnds array. + +2020-08-28 Alan Modra + + PR 26449 + PR 26450 + * cgen-ibld.in (insert_1): Use 1UL in forming mask. + (extract_normal): Likewise. + (insert_normal): Likewise, and move past zero length test. + (put_insn_int_value): Handle mask for zero length, use 1UL. + * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c, + * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, + * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c, + * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate. + +2020-08-28 Cooper Qu + + * csky-dis.c (CSKY_DEFAULT_ISA): Define. + (csky_dis_info): Add member isa. + (csky_find_inst_info): Skip instructions that do not belong to + current CPU. + (csky_get_disassembler): Get infomation from attribute section. + (print_insn_csky): Set defualt ISA flag. + * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2. + * csky-opc.h (struct csky_opcode): Change isa_flag16 and + isa_flag32'type to unsigned 64 bits. + +2020-08-26 Jose E. Marchesi + + * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX. + +2020-08-26 David Faust + + * bpf-desc.c: Regenerate. + * bpf-desc.h: Likewise. + * bpf-opc.c: Likewise. + * bpf-opc.h: Likewise. + * disassemble.c (disassemble_init_for_target): Set bits for xBPF + ISA when appropriate. + +2020-08-25 Alan Modra + + PR 26504 + * vax-dis.c (parse_disassembler_options): Always add at least one + to entry_addr_total_slots. + +2020-08-24 Cooper Qu + + * csky-dis.c (csky_find_inst_info): Skip CK860's instructions + in other CPUs to speed up disassembling. + * csky-opc.h (csky_v2_opcodes): Add CK860's instructions, + Change plsli.u16 to plsli.16, change sync's operand format. + +2020-08-21 Cooper Qu + + * csky-opc.h (csky_v2_opcodes): Add instruction bnezad. + +2020-08-21 Nick Clifton + + * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF + symbols. + +2020-08-21 Cooper Qu + + * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop. + +2020-08-19 Alan Modra + + * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq, + vcmpuq and xvtlsbb. + +2020-08-18 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) : Rename from this... + : ...to this. + +2020-08-12 Alex Coplan + + * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers. + +2020-08-12 Nick Clifton + + * po/sr.po: Updated Serbian translation. + +2020-08-11 Alan Modra + + * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph. + +2020-08-10 Przemyslaw Wirkus + + * aarch64-opc.c (aarch64_print_operand): + (aarch64_sys_reg_deprecated_p): Functions paramaters changed. + (aarch64_sys_reg_supported_p): Function removed. + (aarch64_sys_ins_reg_supported_p): Functions paramaters changed. + (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p + into this function. + +2020-08-10 Alan Modra + + * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended + instructions. + +2020-08-10 Alan Modra + + * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru. + Enable icbt for power5, miso for power8. + +2020-08-10 Alan Modra + + * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over + mtvsrd, and similarly for mfvsrd. + +2020-08-04 Christian Groessler + Tadashi G. Takaoka + + * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs" + opcodes (special "out" to absolute address). + * z8k-opc.h: Regenerate. + +2020-07-30 H.J. Lu + + PR gas/26305 + * i386-opc.h (Prefix_Disp8): New. + (Prefix_Disp16): Likewise. + (Prefix_Disp32): Likewise. + (Prefix_Load): Likewise. + (Prefix_Store): Likewise. + (Prefix_VEX): Likewise. + (Prefix_VEX3): Likewise. + (Prefix_EVEX): Likewise. + (Prefix_REX): Likewise. + (Prefix_NoOptimize): Likewise. + * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}. + * i386-tbl.h: Regenerated. + +2020-07-29 Andreas Arnez + + * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable + default case with abort() instead of printing an error message and + continuing, to avoid a maybe-uninitialized warning. + +2020-07-24 Nick Clifton + + * po/de.po: Updated German translation. + +2020-07-21 Jan Beulich + + * i386-dis.c (OP_E_memory): Revert previous change. + +2020-07-15 H.J. Lu + + PR gas/26237 + * i386-dis.c (OP_E_memory): Don't display eiz with no scale + without base nor index registers. + +2020-07-15 Jan Beulich + + * i386-dis.c (putop): Move 'V' and 'W' handling. + +2020-07-15 Jan Beulich + + * i386-dis.c (dis386): Adjust 'V' description. Use P-based + construct for push/pop of register. + (putop): Honor cond when handling 'P'. Drop handling of plain + 'V'. + +2020-07-15 Jan Beulich + + * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@' + description. Drop '&' description. Use P for push of immediate, + pushf/popf, enter, and leave. Use %LP for lret/retf. + (dis386_twobyte): Use P for push/pop of fs/gs. + (reg_table): Use P for push/pop. Use @ for near call/jmp. + (x86_64_table): Use P for far call/jmp. + (putop): Drop handling of 'U' and '&'. Move and adjust handling + of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q + labels. + (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent) + and dqw_mode (unconditional). + +2020-07-14 H.J. Lu + + PR gas/26237 + * i386-dis.c (OP_E_memory): Without base nor index registers, + 32-bit displacement to 64 bits. + +2020-07-14 Claudiu Zissulescu + + * arc-dis.c (print_insn_arc): Detect and emit a warning when a + faulty double register pair is detected. + 2020-07-14 Jan Beulich * i386-dis.c (OP_D): Print dr instead of db in Intel mode.