X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=834750fb7411f4e2633d808738efcf8f68f8e05e;hb=f5ea389ac78ccd7c426a93f43e6117dad9ce0878;hp=31809b4b57859a081d1d21f68040b5362d2ca5d0;hpb=ecf64ec654afe916099f0fe482c2dae417913905;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 31809b4b57..834750fb74 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,218 @@ +2016-11-22 Jose E. Marchesi + + * sparc-opc.c (HWS_V8): Definition moved from + gas/config/tc-sparc.c. + (HWS_V9): Likewise. + (HWS_VA): Likewise. + (HWS_VB): Likewise. + (HWS_VC): Likewise. + (HWS_VD): Likewise. + (HWS_VE): Likewise. + (HWS_VV): Likewise. + (HWS_VM): Likewise. + (HWS2_VM): Likewise. + (sparc_opcode_archs): Initialize hwcaps and hwcaps2 fields of + existing entries. + +2016-11-22 Claudiu Zissulescu + + * arc-tbl.h: Reorder conditional flags with delay flags for 'b' + instructions. + +2016-11-18 Szabolcs Nagy + + * aarch64-tbl.h (QL_V3SAMEHSD_ROT, QL_ELEMENT_ROT): Define. + (aarch64_feature_simd_v8_3, SIMD_V8_3): Define. + (aarch64_opcode_table): Add fcmla and fcadd. + (AARCH64_OPERANDS): Add IMM_ROT{1,2,3}. + * aarch64-asm.h (aarch64_ins_imm_rotate): Declare. + * aarch64-asm.c (aarch64_ins_imm_rotate): Define. + * aarch64-dis.h (aarch64_ext_imm_rotate): Declare. + * aarch64-dis.c (aarch64_ext_imm_rotate): Define. + * aarch64-opc.h (enum aarch64_field_kind): Add FLD_rotate{1,2,3}. + * aarch64-opc.c (fields): Add FLD_rotate{1,2,3}. + (operand_general_constraint_met_p): Rotate and index range check. + (aarch64_print_operand): Handle rotate operand. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Likewise. + * aarch64-opc-2.c: Likewise. + +2016-11-18 Szabolcs Nagy + + * aarch64-tbl.h (arch64_opcode_table): Add ldaprb, ldaprh, ldapr. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Regenerate. + * aarch64-opc-2.c: Regenerate. + +2016-11-18 Szabolcs Nagy + + * aarch64-tbl.h (arch64_opcode_table): Add fjcvtzs. + (QL_FP2INT_W_D, aarch64_feature_fp_v8_3, FP_V8_3): Define. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Regenerate. + * aarch64-opc-2.c: Regenerate. + +2016-11-18 Szabolcs Nagy + + * aarch64-tbl.h (QL_X1NIL): New. + (arch64_opcode_table): Add ldraa, ldrab. + (AARCH64_OPERANDS): Add "ADDR_SIMM10". + * aarch64-asm.h (aarch64_ins_addr_simm10): Declare. + * aarch64-asm.c (aarch64_ins_addr_simm10): Define. + * aarch64-dis.h (aarch64_ext_addr_simm10): Declare. + * aarch64-dis.c (aarch64_ext_addr_simm10): Define. + * aarch64-opc.h (enum aarch64_field_kind): Add FLD_S_simm10. + * aarch64-opc.c (fields): Add data for FLD_S_simm10. + (operand_general_constraint_met_p): Handle AARCH64_OPND_ADDR_SIMM10. + (aarch64_print_operand): Likewise. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Regenerate. + * aarch64-opc-2.c: Regenerate. + +2016-11-11 Szabolcs Nagy + + * aarch64-tbl.h (arch64_opcode_table): Add braa, brab, blraa, blrab, braaz, + brabz, blraaz, blrabz, retaa, retab, eretaa, eretab. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Regenerate. + * aarch64-opc-2.c: Regenerate. + +2016-11-11 Szabolcs Nagy + + * aarch64-tbl.h (arch64_opcode_table): Add pacga. + (AARCH64_OPERANDS): Add Rm_SP. + * aarch64-opc.c (aarch64_print_operand): Handle AARCH64_OPND_Rm_SP. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Regenerate. + * aarch64-opc-2.c: Regenerate. + +2016-11-11 Szabolcs Nagy + + * aarch64-tbl.h (arch64_opcode_table): Add pacia, pacib, pacda, pacdb, autia, + autib, autda, autdb, paciza, pacizb, pacdza, pacdzb, autiza, autizb, autdza, + autdzb, xpaci, xpacd. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Regenerate. + * aarch64-opc-2.c: Regenerate. + +2016-11-11 Szabolcs Nagy + + * aarch64-opc.c (aarch64_sys_regs): Add apiakeylo_el1, apiakeyhi_el1, + apibkeylo_el1, apibkeyhi_el1, apdakeylo_el1, apdakeyhi_el1, + apdbkeylo_el1, apdbkeyhi_el1, apgakeylo_el1 and apgakeyhi_el1. + (aarch64_sys_reg_supported_p): Add feature test for new registers. + +2016-11-11 Szabolcs Nagy + + * aarch64-tbl.h (aarch64_feature_v8_3, ARMV8_3, V8_3_INSN): New. + (arch64_opcode_table): Add xpaclri, pacia1716, pacib1716, autia1716, + autib1716, paciaz, paciasp, pacibz, pacibsp, autiaz, autiasp, autibz, + autibsp. + * aarch64-asm-2.c: Regenerate. + * aarch64-dis-2.c: Regenerate. + +2016-11-11 Szabolcs Nagy + + * aarch64-gen.c (find_alias_opcode): Increase max_num_aliases to 32. + +2016-11-09 H.J. Lu + + PR binutils/20799 + * i386-dis-evex.h (evex_table): Replace EdqwS with Edqw. + * i386-dis.c (EdqwS): Removed. + (dqw_swap_mode): Likewise. + (intel_operand_size): Don't check dqw_swap_mode. + (OP_E_register): Likewise. + (OP_E_memory): Likewise. + (OP_G): Likewise. + (OP_EX): Likewise. + * i386-opc.tbl: Remove "S" from EVEX vpextrw. + * i386-tbl.h: Regerated. + +2016-11-09 H.J. Lu + + * i386-opc.tbl: Merge AVX512F vmovq. + * i386-tbl.h: Regerated. + +2016-11-08 H.J. Lu + + PR binutils/20701 + * i386-dis.c (THREE_BYTE_0F7A): Removed. + (dis386_twobyte): Don't use THREE_BYTE_0F7A. + (three_byte_table): Remove THREE_BYTE_0F7A. + +2016-11-07 H.J. Lu + + PR binutils/20775 + * i386-dis.c (FGRPd9_2): Replace 0 with 1. + (FGRPd9_4): Replace 1 with 2. + (FGRPd9_5): Replace 2 with 3. + (FGRPd9_6): Replace 3 with 4. + (FGRPd9_7): Replace 4 with 5. + (FGRPda_5): Replace 5 with 6. + (FGRPdb_4): Replace 6 with 7. + (FGRPde_3): Replace 7 with 8. + (FGRPdf_4): Replace 8 with 9. + (fgrps): Add an entry for Bad_Opcode. + +2016-11-04 Andrew Burgess + + * arc-opc.c (arc_flag_operands): Add F_DI14. + (arc_flag_classes): Add C_DI14. + * arc-nps400-tbl.h: Add new exc instructions. + +2016-11-03 Graham Markall + + * arc-dis.c (arc_insn_length): Return length 8 for instructions with + major opcode 0xa. + * arc-nps-400-tbl.h: Add dcmac instruction. + * arc-opc.c (arc_operands): Added operands for dcmac instruction. + (insert_nps_rbdouble_64): Added. + (extract_nps_rbdouble_64): Added. + (insert_nps_proto_size): Added. + (extract_nps_proto_size): Added. + +2016-11-03 Andrew Burgess + + * arc-dis.c (struct arc_operand_iterator): Remove all fields + relating to long instruction processing, add new limm field. + (OPCODE): Rename to... + (OPCODE_32BIT_INSN): ...this. + (OPCODE_AC): Delete. + (skip_this_opcode): Handle different instruction lengths, update + macro name. + (special_flag_p): Update parameter type. + (find_format_from_table): Update for more instruction lengths. + (find_format_long_instructions): Delete. + (find_format): Update for more instruction lengths. + (arc_insn_length): Likewise. + (extract_operand_value): Update for more instruction lengths. + (operand_iterator_next): Remove code relating to long + instructions. + (arc_opcode_to_insn_type): New function. + (print_insn_arc):Update for more instructions lengths. + * arc-ext.c (extInstruction_t): Change argument type. + * arc-ext.h (extInstruction_t): Change argument type. + * arc-fxi.h: Change type unsigned to unsigned long long + extensively throughout. + * arc-nps400-tbl.h: Add long instructions taken from + arc_long_opcodes table in arc-opc.c. + * arc-opc.c: Update parameter types on insert/extract handlers. + (arc_long_opcodes): Delete. + (arc_num_long_opcodes): Delete. + (arc_opcode_len): Update for more instruction lengths. + +2016-11-03 Graham Markall + + * arc-dis.c (print_insn_arc): Swap highbyte and lowbyte. + +2016-11-03 Graham Markall + + * arc-dis.c (find_format_from_table): Replace use of ARC_SHORT + with arc_opcode_len. + (find_format_long_instructions): Likewise. + * arc-opc.c (arc_opcode_len): New function. + 2016-11-03 Andrew Burgess * arc-nps400-tbl.h: Fix some instruction masks.