X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=ac0e8914ffb0b6ca04692ed674fcb94bc4f2f8dd;hb=b79f7053dd3e33f7b5e61bac1f94be303b14fe77;hp=91a0dee477830b8963faa4e965f2359ab9ecf4df;hpb=a06ea96464a2928865beb2ac6f12deb0464bfcd7;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 91a0dee477..ac0e8914ff 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,13 +1,99 @@
+2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
+
+	* arm-dis.c (thumb32_opcodes): Add DCPS instruction.
+
+2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
+
+	* arm-dis.c (arm_opcodes): Add SEVL.
+	(thumb_opcodes): Likewise.
+	(thumb32_opcodes): Likewise.
+
+2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
+
+	* arm-dis.c (data_barrier_option): New function.
+	(print_insn_arm): Use data_barrier_option.
+	(print_insn_thumb32): Use data_barrier_option.
+
+2012-08-24  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com
+
+	* arm-dis.c (COND_UNCOND): New constant.
+	(print_insn_coprocessor): Add support for %u format specifier.
+	(print_insn_neon): Likewise.
+
+2012-08-21  David S. Miller  <davem@davemloft.net>
+
+	* sparc-opc.c (4-argument crypto instructions): Fix encoding using
+	F3F4 macro.
+
+2012-08-20  Edmar Wienskoski  <edmar@freescale.com>
+
+	* ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub,
+	vabsduh, vabsduw, mviwsplt.
+
+2012-08-17  Nagajyothi Eggone  <nagajyothi.eggone@amd.com>
+
+	* i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and
+	CPU_BTVER2_FLAGS.
+
+	* i386-opc.h: Update CpuPRFCHW comment.
+
+	* i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW.
+	* i386-init.h: Regenerated.
+	* i386-tbl.h: Likewise.
+
+2012-08-17  Nick Clifton  <nickc@redhat.com>
+
+	* po/uk.po: New Ukranian translation.
+	* configure.in (ALL_LINGUAS): Add uk.
+	* configure: Regenerate.
+
+2012-08-16  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and
+	RBX for the third operand.
+	<"lswi">: Use RAX for second and NBI for the third operand.
+
+2012-08-15  DJ Delorie  <dj@redhat.com>
+
+	* rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01]
+	operands, so that data addresses can be corrected when not
+	ES-overridden.
+	* rl78-decode.c: Regenerate.
+	* rl78-dis.c (print_insn_rl78): Make order of modifiers
+	irrelevent.  When the 'e' specifier is used on an operand and no
+	ES prefix is provided, adjust address to make it absolute.
+
+2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR.
+
+2012-08-15  Peter Bergner  <bergner@vnet.ibm.com>
+
+	* ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics.
+
+2012-08-14  Maciej W. Rozycki  <macro@codesourcery.com>
+
+	* mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local
+	macros, use local variables for info struct member accesses,
+	update the type of the variable used to hold the instruction
+	word.
+	(print_insn_mips, print_mips16_insn_arg): Likewise.
+	(print_insn_mips16): Add GET_OP and GET_OP_S local macros, use
+	local variables for info struct member accesses.
+	(print_insn_micromips): Add GET_OP_S local macro.
+	(_print_insn_mips): Update the type of the variable used to hold
+	the instruction word.
+
 2012-08-13  Ian Bolton  <ian.bolton@arm.com>
-            Laurent Desnogues  <laurent.desnogues@arm.com>
-            Jim MacArthur  <jim.macarthur@arm.com>
-            Marcus Shawcroft  <marcus.shawcroft@arm.com>
-            Nigel Stephens  <nigel.stephens@arm.com>
-            Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
-            Richard Earnshaw  <rearnsha@arm.com>
-            Sofiane Naci  <sofiane.naci@arm.com>
-            Tejas Belagod  <tejas.belagod@arm.com>
-            Yufeng Zhang  <yufeng.zhang@arm.com>
+	    Laurent Desnogues  <laurent.desnogues@arm.com>
+	    Jim MacArthur  <jim.macarthur@arm.com>
+	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
+	    Nigel Stephens  <nigel.stephens@arm.com>
+	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+	    Richard Earnshaw  <rearnsha@arm.com>
+	    Sofiane Naci  <sofiane.naci@arm.com>
+	    Tejas Belagod  <tejas.belagod@arm.com>
+	    Yufeng Zhang  <yufeng.zhang@arm.com>
 
 	* Makefile.am: Add AArch64.
 	* Makefile.in: Regenerate.
@@ -106,8 +192,8 @@
 	* po/POTFILES.in: Regenerate.
 
 2012-07-31  Chao-Ying Fu  <fu@mips.com>
-            Catherine Moore  <clm@codesourcery.com>
-            Maciej W. Rozycki  <macro@codesourcery.com>
+	    Catherine Moore  <clm@codesourcery.com>
+	    Maciej W. Rozycki  <macro@codesourcery.com>
 
 	* micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
 	(DSP_VOLA): Likewise.
@@ -190,9 +276,9 @@
 2012-07-05  Sean Keys  <skeys@ipdatasys.com>
 
 	* xgate-dis.c: Removed an IF statement that will
-        always be false due to overlapping operand masks.
-        * xgate-opc.c: Corrected 'com' opcode entry and
-        fixed spacing.
+	always be false due to overlapping operand masks.
+	* xgate-opc.c: Corrected 'com' opcode entry and
+	fixed spacing.
 
 2012-07-02  Roland McGrath  <mcgrathr@google.com>