X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=ac0e8914ffb0b6ca04692ed674fcb94bc4f2f8dd;hb=b79f7053dd3e33f7b5e61bac1f94be303b14fe77;hp=ff95178fa6fb6f789d863b1f6d3b0f0cd769694a;hpb=e2e1fcde622f2f6cedfd7fb6615aa6e136f21dec;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ff95178fa6..ac0e8914ff 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,259 @@ +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (thumb32_opcodes): Add DCPS instruction. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (arm_opcodes): Add SEVL. + (thumb_opcodes): Likewise. + (thumb32_opcodes): Likewise. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (data_barrier_option): New function. + (print_insn_arm): Use data_barrier_option. + (print_insn_thumb32): Use data_barrier_option. + +2012-08-24 Matthew Gretton-Dann + + * sparc-opc.c (4-argument crypto instructions): Fix encoding using + F3F4 macro. + +2012-08-20 Edmar Wienskoski + + * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub, + vabsduh, vabsduw, mviwsplt. + +2012-08-17 Nagajyothi Eggone + + * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and + CPU_BTVER2_FLAGS. + + * i386-opc.h: Update CpuPRFCHW comment. + + * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2012-08-17 Nick Clifton + + * po/uk.po: New Ukranian translation. + * configure.in (ALL_LINGUAS): Add uk. + * configure: Regenerate. + +2012-08-16 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and + RBX for the third operand. + <"lswi">: Use RAX for second and NBI for the third operand. + +2012-08-15 DJ Delorie + + * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01] + operands, so that data addresses can be corrected when not + ES-overridden. + * rl78-decode.c: Regenerate. + * rl78-dis.c (print_insn_rl78): Make order of modifiers + irrelevent. When the 'e' specifier is used on an operand and no + ES prefix is provided, adjust address to make it absolute. + +2012-08-15 Peter Bergner + + * ppc-opc.c : Use PPC_OPERAND_GPR. + +2012-08-15 Peter Bergner + + * ppc-opc.c : New extended mnemonics. + +2012-08-14 Maciej W. Rozycki + + * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local + macros, use local variables for info struct member accesses, + update the type of the variable used to hold the instruction + word. + (print_insn_mips, print_mips16_insn_arg): Likewise. + (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use + local variables for info struct member accesses. + (print_insn_micromips): Add GET_OP_S local macro. + (_print_insn_mips): Update the type of the variable used to hold + the instruction word. + +2012-08-13 Ian Bolton + Laurent Desnogues + Jim MacArthur + Marcus Shawcroft + Nigel Stephens + Ramana Radhakrishnan + Richard Earnshaw + Sofiane Naci + Tejas Belagod + Yufeng Zhang + + * Makefile.am: Add AArch64. + * Makefile.in: Regenerate. + * aarch64-asm.c: New file. + * aarch64-asm.h: New file. + * aarch64-dis.c: New file. + * aarch64-dis.h: New file. + * aarch64-gen.c: New file. + * aarch64-opc.c: New file. + * aarch64-opc.h: New file. + * aarch64-tbl.h: New file. + * configure.in: Add AArch64. + * configure: Regenerate. + * disassemble.c: Add AArch64. + * aarch64-asm-2.c: New file (automatically generated). + * aarch64-dis-2.c: New file (automatically generated). + * aarch64-opc-2.c: New file (automatically generated). + * po/POTFILES.in: Regenerate. + +2012-08-13 Maciej W. Rozycki + + * micromips-opc.c (micromips_opcodes): Update comment. + * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor + instructions for IOCT as appropriate. + * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with + opcode_is_member. + * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with + the result of a check for the -Wno-missing-field-initializers + GCC option. + * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable. + (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to + compilation. + (mips16-opc.lo): Likewise. + (micromips-opc.lo): Likewise. + * aclocal.m4: Regenerate. + * configure: Regenerate. + * Makefile.in: Regenerate. + +2012-08-11 Saravanan Ekanathan + + PR gas/14423 + * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS. + * i386-init.h: Regenerated. + +2012-08-09 Nick Clifton + + * po/vi.po: Updated Vietnamese translation. + +2012-08-07 Roland McGrath + + * i386-dis.c (reg_table): Fill out REG_0F0D table with + AMD-reserved cases as "prefetch". + (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants. + (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise. + (reg_table): Use those under REG_0F18. + (mod_table): Add those cases as "nop/reserved". + +2012-08-07 Jan Beulich + + * i386-opc.tbl: Remove "FIXME" comments from SVME instructions. + +2012-08-06 Roland McGrath + + * i386-dis.c (print_insn): Print spaces between multiple excess + prefixes. Return actual number of excess prefixes consumed, + not always one. + + * i386-dis.c (OP_REG): Ignore REX_B for segment register cases. + +2012-08-06 Roland McGrath + Victor Khimenko + H.J. Lu + + * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG. + (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG. + (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG. + (OP_E_register): Likewise. + (OP_REG): For low 8 whole registers, treat REX_W like DFLAG. + +2012-08-02 Jan-Benedict Glaw + + * configure.in: Formatting. + * configure: Regenerate. + +2012-08-01 Alan Modra + + * h8300-dis.c: Fix printf arg warnings. + * i960-dis.c: Likewise. + * mips-dis.c: Likewise. + * pdp11-dis.c: Likewise. + * sh-dis.c: Likewise. + * v850-dis.c: Likewise. + * configure.in: Formatting. + * configure: Regenerate. + * rl78-decode.c: Regenerate. + * po/POTFILES.in: Regenerate. + +2012-07-31 Chao-Ying Fu + Catherine Moore + Maciej W. Rozycki + + * micromips-opc.c (WR_a, RD_a, MOD_a): New macros. + (DSP_VOLA): Likewise. + (D32, D33): Likewise. + (micromips_opcodes): Add DSP ASE instructions. + * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases. + <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise. + +2012-07-31 Jan Beulich + + * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2 + instruction group. Mark as requiring AVX2. + * i386-tbl.h: Re-generate. + +2012-07-30 Nick Clifton + + * po/opcodes.pot: Updated template. + * po/es.po: Updated Spanish translation. + * po/fi.po: Updated Finnish translation. + +2012-07-27 Mike Frysinger + + * configure.in (BFD_VERSION): Run bfd/configure --version and + parse the output of that. + * configure: Regenerate. + +2012-07-25 James Lemke + + * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns. + +2012-07-24 Stephan McCamant + Dr David Alan Gilbert + + PR binutils/13135 + * arm-dis.c: Add necessary casts for printing integer values. + Use %s when printing string values. + * hppa-dis.c: Likewise. + * m68k-dis.c: Likewise. + * microblaze-dis.c: Likewise. + * mips-dis.c: Likewise. + * sparc-dis.c: Likewise. + +2012-07-19 Michael Zolotukhin + + PR binutils/14355 + * i386-dis.c (VEX_LEN_0FXOP_08_CC): New. + (VEX_LEN_0FXOP_08_CD): Likewise. + (VEX_LEN_0FXOP_08_CE): Likewise. + (VEX_LEN_0FXOP_08_CF): Likewise. + (VEX_LEN_0FXOP_08_EC): Likewise. + (VEX_LEN_0FXOP_08_ED): Likewise. + (VEX_LEN_0FXOP_08_EE): Likewise. + (VEX_LEN_0FXOP_08_EF): Likewise. + (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq, + vpcomub, vpcomuw, vpcomud, vpcomuq. + (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC, + VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF, + VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE, + VEX_LEN_0FXOP_08_EF. + 2012-07-16 Michael Zolotukhin * i386-dis.c (PREFIX_0F38F6): New. @@ -17,6 +273,13 @@ * mips-dis.c: Remove gratuitous newline. +2012-07-05 Sean Keys + + * xgate-dis.c: Removed an IF statement that will + always be false due to overlapping operand masks. + * xgate-opc.c: Corrected 'com' opcode entry and + fixed spacing. + 2012-07-02 Roland McGrath * i386-opc.tbl: Add RepPrefixOk to nop.