X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=be2e312ed7ff41a4add0ce0d51ec48ac2861a7ee;hb=ab0bd0493ad0dbb544fec8f46b03a0887c594bec;hp=8da62f96103f38a5e9579925970cf049d39df557;hpb=bf5ac1b8edb34601e1cb43238d690a6d6c00457e;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 8da62f9610..be2e312ed7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,8 +1,559 @@ -start-sanitize-v850 +Wed Feb 11 18:58:34 1998 Doug Evans + + * cgen-opc.in: New file. + * cgen.sh: Translate @ARCH@. Cat cgen-opc.in into @arch@-opc.c. + * Makefile.am (CGENFILES): Add cgen-opc.in. + * Makefile.in: Regenerate. + + * cgen-opc.c (cgen_set_cpu): Delete init of hw list `next' chain. + (cgen_hw_lookup): Make result const. + + * cgen-dis.in (*): Use PTR instead of void *. + (print_insn): Delete unused vars `i', `syntax'. + + * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate. + +start-sanitize-sky +Tue Feb 10 14:56:24 1998 Doug Evans + + * dvp-opc.c (*): pke,gpuif renamed to vif,gif. + (vif_opcodes): Update renamed insns. + * dvp-dis.c (*): Likewise. + +end-sanitize-sky +Sat Feb 7 15:30:27 1998 Ian Lance Taylor + + * configure, aclocal.m4: Rebuild with new libtool. + +start-sanitize-d30v +Thu Feb 5 17:56:10 1998 Michael Meissner + + * d30v-opc.c (repeat{,i} instructions): Repeat/repeati + instructions use a PC relative branch, not absolute. + +end-sanitize-d30v +Wed Feb 4 19:17:37 1998 Ian Lance Taylor + + * configure.in: Set libtool_enable_shared rather than + libtool_shared. Remove diversion hack. + * configure, Makefile.in, aclocal.m4: Rebuild with new libtool. + +Tue Feb 3 17:19:40 1998 Doug Evans + + * cgen-opc.c (cgen_set_cpu): Initialize hardware table. + * m32r-opc.h, m32r-opc.c, m32r-asm.c, m32r-dis.c: Regenerate. + +Mon Feb 2 19:22:15 1998 Steve Haworth + + * tic30-dis.c: New file. + * disassemble.c (disassembler): Add bfd_arch_tic30 case. + * configure.in: Handle bfd_tic30_arch. + * Makefile.am: Rebuild dependencies. + (CFILES): Add tic30-dis.c + (ALL_MACHINES): Add tic30-dis.lo. + * configure, Makefile.in: Rebuild. + +start-sanitize-m32rx +Mon Feb 2 11:04:08 1998 Nick Clifton + + * m32r-opc.c, m32r-opc.h, m32r-asm.c m32r-dis.c: Newly generated + versions after updates to m32r.cpu to remove mulwhi-a, mulwlo-a, + macwhi-a and macwlo-a instructions. + +end-sanitize-m32rx +start-sanitize-sky +Fri Jan 30 17:39:21 1998 Ian Carmichael + + * dvp-opc.c, fixed encoding of a bunch of instructions to + be consistent with the asmvu assembler (and inconsistent + with the specification). + +Thu Jan 29 18:14:56 1998 Ian Carmichael + + * dvp-opc.c, fixed order of pkemscal/pkemscalf instructions + in the opcode table. The pkemscalf instruction must come first. + +Thu Jan 29 16:47:24 1998 Ian Carmichael + + * dvp-opc.c, MAXIi should be VUOP6(0x1d) instead of 0x2d. + +end-sanitize-sky +Thu Jan 29 13:02:56 1998 Doug Evans + + * m32r-opc.h (HAVE_CPU_M32R): Define. + +start-sanitize-sky +Wed Jan 28 13:46:19 1998 Doug Evans + + * dvp-dis.c, dvp-opc.c: New files. + * configure.in: Compile them if bfd_dvp_arch, as well as mips. + * configure: Regenerate. + * Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo. + (dvp-dis.lo,dvp-opc.lo): Add rules for. + (mips-dis.lo): Compile with @archdefs@. + * Makefile.in: Regenerate. + * disassemble.c: Define ARCH_mips ifdef ARCH_dvp. + * mips-dis.c (print_insn_little_mips): Check for DVP insns. + +end-sanitize-sky +Wed Jan 28 09:55:03 1998 Nick Clifton + + * v850-opc.c (insertion routines): If both alignment and size is + wrong then report this. + +Tue Jan 27 21:52:59 1998 Jeffrey A Law (law@cygnus.com) + + * mips-dis.c (_print_insn_mips): Set target_processor as appropriate. + Only recognize instructions for the current target_processor. + +Thu Jan 22 16:20:17 1998 Fred Fish + + * d10v-dis.c (PC_MASK): Correct value. + (print_operand): If there's a reloc, don't calculate the + address because they could be in different sections. + +start-sanitize-cygnus +Thu Jan 22 16:10:32 1998 Doug Evans + + * cgen.sh: Rewrite to be like simulator's version. + * Makefile.am (cgen): Update call to cgen.sh. + * Makefile.in: Regenerate + +end-sanitize-cygnus +Fri Jan 16 15:29:11 1998 Jim Blandy + + * mips-opc.c (mips_builtin_opcodes): Move 4010's "addciu" + instruction after the 4650's "mul" instruction; nobody's using the + 4010 these days. If object files someday indicate which processor + variant they're intended for, we can do a better job at this. + +start-sanitize-r5900 +Tue Jan 13 09:21:56 1998 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (c.lt.s): Add r5900 variant. + (c.le.s): Likewise. + +end-sanitize-r5900 +Mon Jan 12 14:43:54 1998 Doug Evans + + * cgen-asm.c (build_asm_hash_table): Traverse compiled in table using + table provided entry size. Use CGEN_INSN_MNEMONIC. + (cgen_parse_keyword): Rewrite. + * cgen-dis.c (build_dis_hash_table): Traverse compiled in table using + table provided entry size. Use CGEN_INSN_MASK_BITSIZE. + * cgen-opc.c: Clean up pass over `struct foo' usage. + (cgen_keyword_lookup_value): Handle "" entry. + (cgen_keyword_add): Likewise. +start-sanitize-cygnus + * Makefile.am: Add cgen support. + * Makefile.in: Regenerate. + * configure.in: Add cgen support. + * configure: Regenerate. + * aclocal.m4: Regenerate. + * cgen.sh, cgen-asm.in, cgen-dis.in: New files. +end-sanitize-cygnus + +Mon Dec 22 12:37:06 1997 Ian Lance Taylor + + * mips-opc.c: Add FP_D to s.d instruction flags. + +Wed Dec 17 11:38:29 1997 Andreas Schwab + + * m68k-opc.c (halt, pulse): Enable them on the 68060. + +start-sanitize-tic80 +Tue Dec 16 15:22:53 1997 Fred Fish + + * tic80-opc.c (tic80_opcodes): Revert change that put the 32 bit + PC relative offset forms before the 15 bit forms. An assembler command + line option now chooses the default. + +end-sanitize-tic80 +start-sanitize-r5900 +Tue Dec 16 13:24:22 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c: Add many missing r5900 instructions. + +end-sanitize-r5900 +start-sanitize-d30v +Tue Dec 16 15:22:51 1997 Michael Meissner + + * d30v-opc.c (d30v_opcode_table): Set new flags bits + FLAG_{2WORD,MUL{16,32},ADDSUBppp}, in appropriate instructions. + +end-sanitize-d30v +1997-12-15 Brendan Kehoe + + * configure: Only build libopcodes shared if --enable-shared's value + was `yes', or was set to `*opcodes*'. + * aclocal.m4: Likewise. + * NOTE: this really needs to be fixed in libtool/libtool.m4, the + original source of this bit of code. It's not clear what the best fix + would be, though. + +start-sanitize-r5900 +Mon Dec 15 12:43:36 1997 Jeffrey A Law (law@cygnus.com) + + * mips-opc.c (mtpc, mfpc, mtps, mfps): Add r5900 variants. +end-sanitize-r5900 +start-sanitize-tic80 +Fri Dec 12 11:57:04 1997 Fred Fish + + * tic80-opc.c (OFF_SL_PC, OFF_SL_BR): Minor formatting change. + (tic80_opcodes): Reorder table entries to put the 32 bit PC relative + offset forms before the 15 bit forms, to default to the long forms. + +end-sanitize-tic80 +Fri Dec 12 01:32:30 1997 Richard Henderson + + * alpha-opc.c (cvttq/*u*): Remove, as that suffix is invalid. + +Wed Dec 10 17:42:35 1997 Nick Clifton + + * arm-dis.c (print_insn_little_arm): Prevent examination of stored + symbol if none is present. + (print_insn_big_arm): Prevent examination of stored symbol if + none is present. + +Thu Oct 23 21:13:37 1997 Fred Fish + + * d10v-opc.c (d10v_opcodes): Correct entry for RTE. + +Mon Dec 8 11:21:07 1997 Nick Clifton + + * disassemble.c: Remove disasm_symaddr() function. + + * arm-dis.c: Use info->symbol instead of info->flags to determine + if disassmbly should be in Thumb or Arm mode. + +Tue Dec 2 09:54:27 1997 Nick Clifton + + * arm-dis.c: Add support for disassembling Thumb opcodes. + (print_insn_thumb): New function. + + * disassemble.c (disasm_symaddr): New function. + + * arm-opc.h: Display nop pseudo ops alongside equivalent disassembly. + (thumb_opcodes): Table of Thumb opcodes. + +Mon Dec 1 12:25:57 1997 Andreas Schwab + + * m68k-opc.c (btst): Change Dd@s to Dd;b. + + * m68k-dis.c (print_insn_arg): Recognize 'm', 'n', 'o', 'p', 'q', + and 'v' as operand types. + +Mon Dec 1 11:56:50 1997 Ian Lance Taylor + + * m68k-opc.c: Add argument for lpstop. From Olivier Carmona + . + * m68k-dis.c (print_insn_m68k): Handle special case of lpstop, + which has a two word opcode with a one word argument. + +start-sanitize-d30v +Sun Nov 23 22:25:21 1997 Michael Meissner + + * d30v-opc.c (d30v_opcode_table, case cmpu): Immediate field is + unsigned, not signed. + (d30v_format_table): Add SHORT_CMPU cases for cmpu. + +end-sanitize-d30v +start-sanitize-sh4 +Wed Nov 19 17:42:35 1997 Richard Henderson + + * sh-dis.c (print_insn_shx): Recognize all sh4 additions. + * sh-opc.h (fmov): Add @+, variant for sh4. + (ftrv): Slay the cut-and-paste monster. + +end-sanitize-sh4 +Tue Nov 18 23:10:03 1997 J"orn Rennecke + + * d10v-dis.c (print_operand): + Split OPERAND_FLAG into OPERAND_FFLAG and OPERAND_CFLAG. + +Tue Nov 18 18:45:14 1997 J"orn Rennecke + + * d10v-opc.c (OPERAND_FLAG): Split into: + (OPERAND_FFLAG, OPERAND_CFLAG) . + (FSRC): Split into: + (FFSRC, CFSRC). + +Thu Nov 13 11:05:33 1997 Gavin Koch + + * mips-opc.c: Move the INSN_MACRO ISA value to the membership + field for all INSN_MACRO's. + * mips16-opc.c: same + +Wed Nov 12 10:16:57 1997 Gavin Koch + + * mips-opc.c (sync,cache): These are 3900 insns. + +Tue Nov 11 23:53:41 1997 J"orn Rennecke + + sh-opc.h (sh_table): Remove ftst/nan. + +start-sanitize-vr5400 +Mon Nov 3 13:23:15 1997 Ken Raeburn + + * mips-opc.c (dror32, dror, rzu.ob): Fix bugs in encoding. + (c.*.ob, mula.ob, mull.ob, muls.ob, mulsl.ob): Put 'k' version + last. + * mips-dis.c (print_insn_arg): Handle VR5400 operand types. + +end-sanitize-vr5400 +start-sanitize-tx49 +Wed Oct 29 15:10:56 1997 Gavin Koch + + * mips-opc.c (deret,dmult,dmultu,madd,maddu,pref,sdbbp): + Add tx49 insns and configury. + +end-sanitize-tx49 +Tue Oct 28 17:59:32 1997 Ken Raeburn + + * mips-opc.c (ffc, ffs): Fix mask. + +start-sanitize-d30v +Tue Oct 28 16:34:54 1997 Michael Meissner + + * d30v-opc.c (pre_defined_registers): Add eit_vb, int_s, and int_m + control registers. + +end-sanitize-d30v +Mon Oct 27 22:34:03 1997 Ken Raeburn + + * mips-opc.c: Fix bug in mask for "not" pseudo-instruction. +start-sanitize-vr5400 + Added VR5400 instructions. + (N5): New cpu-id macro. +end-sanitize-vr5400 + (WR_HILO, RD_HILO, MOD_HILO): New macros. + +Mon Oct 27 22:34:03 1997 Ken Raeburn + + * mips-opc.c: Fix bug in mask for "not" pseudo-instruction. + (WR_HILO, RD_HILO, MOD_HILO): New macros. + +Thu Oct 23 14:57:58 1997 Nick Clifton + + * v850-dis.c (disassemble): Replace // with /* ... */ + +Wed Oct 22 17:33:21 1997 Richard Henderson + + * sparc-opc.c: Add wr & rd for v9a asr's. + * sparc-dis.c (print_insn_sparc): Recognize '_' and '/' for v9a asr's. + (v9a_asr_reg_names): New variable. + Patch from David Miller . + +Wed Oct 22 17:18:02 1997 Richard Henderson + + * sparc-opc.c (v9notv9a): New insn type. + (IMPDEP): Move to the end to not conflict with edge8 et al. + Patch from David Miller . + +Fri Oct 17 13:18:53 1997 Gavin Koch + + * mips-opc.c (bnezl,beqzl): Mark these as also tx39. + +Thu Oct 16 11:55:20 1997 Gavin Koch + + * mips-opc.c: Note that 'jalx' is (probably incorrectly) marked I1. + +Tue Oct 14 16:10:31 1997 Nick Clifton + + * v850-dis.c (disassemble): Use new symbol_at_address_func() field + of disassemble_info structure to determine if an overlay address + has a matching symbol in low memory. + + * dis-buf.c (generic_symbol_at_address): New (dummy) function for + new symbol_at_address_func field in disassemble_info structure. + +Fri Oct 10 16:44:52 1997 Nick Clifton + + * v850-opc.c (extract_d22): Use signed arithmatic. + +Tue Oct 7 23:40:43 1997 Gavin Koch + + * mips-opc.c: Three op mult is not an ISA insn. + +Tue Oct 7 23:37:21 1997 Gavin Koch + + * mips-opc.c: Fix formatting. + +Fri Oct 3 17:26:54 1997 Ian Lance Taylor + + * i386-dis.c (OP_E): Explicitly sign extend 8 bit values, rather + than assuming that char is signed. Explicitly sign extend 16 bit + values, rather than assuming that short is 16 bits. + (OP_sI, OP_J, OP_DIR): Likewise. + +start-sanitize-v850e +Thu Oct 2 13:36:45 1997 Nick Clifton + + * v850-dis.c (v850_sreg_names): Use symbolic names for higher + system registers. + +end-sanitize-v850e +Wed Oct 1 16:58:54 1997 Nick Clifton + + * v850-opc.c: Fix typo in comment. + + * v850-dis.c (disassemble): Add test of processor type when + determining opcodes. + +Wed Oct 1 14:10:20 1997 Ian Lance Taylor + + * configure.in: Use a diversion to set enable_shared before the + arguments are parsed. + * configure: Rebuild. + +Thu Sep 25 13:04:59 1997 Ian Lance Taylor + + * m68k-opc.c (TBL1): Use ! rather than `. + * m68k-dis.c (print_insn_arg): Remove ` operand specifier. + +Wed Sep 24 11:29:35 1997 Ian Lance Taylor + + * m68k-opc.c: Correct bchg, bclr, bset, and btst on ColdFire. + + * m68k-opc.c: Accept tst{b,w,l} with immediate operands on cpu32. + + * m68k-opc.c: Correct movew of an immediate operand to %sr or %ccr + for mcf5200. + + * configure.in: Call AC_CHECK_TOOL before AM_PROG_LIBTOOL. + * aclocal.m4: Rebuild with new libtool. + * configure: Rebuild. + +start-sanitize-v850e +Fri Sep 19 11:45:49 1997 Andrew Cagney + + * v850-opc.c ("cmov"): Order reg param r1, r2 not r2, r2. + +end-sanitize-v850e +Thu Sep 18 11:21:43 1997 Doug Evans + + * sparc-opc.c (sparclet_cpreg_table): Add %ccsr2, %cccrr, %ccrstr. + +Tue Sep 16 15:18:20 1997 Nick Clifton + + * v850-opc.c (v850_opcodes): Further rearrangements. + +start-sanitize-d30v +Tue Sep 16 16:12:11 1997 Ken Raeburn + + * d30v-opc.c (rot2h, sra2h, srl2h insns): Revert last change. + +end-sanitize-d30v +Tue Sep 16 09:48:50 1997 Nick Clifton + + * v850-opc.c (v850_opcodes): Fields reordered to allow assembler + parser to work. + +Tue Sep 16 10:01:00 1997 Gavin Koch + + * mips-opc.c: Added tx39 insns sdbbp, rfe, and deret. +start-sanitize-tx19 + * mips16-opc.c: Added mips16 sdbbp. +end-sanitize-tx19 + +Mon Sep 15 18:31:52 1997 Nick Clifton + + * v850-opc.c: Initialise processors field of v850_opcode structure. + +start-sanitize-d30v +Wed Aug 27 21:42:39 1997 Ken Raeburn + + Merge changes from Martin Hunt: + + * d30v-opc.c: Change mvfacc to accept 6-bit unsigned values. + + * d30v-opc.c (pre_defined_registers): Add control registers from 0-63. + (d30v_opcode_tabel): Add dbt, rtd, srah, and srlh instructions. Fix + rot2h, sra2h, and srl2h to use new SHORT_A5S format. + + * d30v-dis.c (print_insn): Fix disassembly of SHORT_D2 opcodes. + + * d30v-dis.c (print_insn): First operand of d*i (delayed + branch) instructions is relative. + + * d30v-opc.c (d30v_opcode_table): Change form for repeati. + (d30v_operand_table): Add IMM6S3 type. + (d30v_format_table): Change SHORT_D2. Add LONG_Db. + + * d30v-dis.c: Fix bug with ".s" and ".l" extensions + and cmp instructions. + + * d30v-opc.c: Correct entries for repeat*, and sat*. + Make IMM5 unsigned. Create IMM6U and IMM12S3U operand + types. Correct several formats. + + * d30v-opc.c: (pre_defined_registers): Add dpsw and dpc. + + * d30v-opc.c (pre_defined_registers): Change control registers. + + * d30v-opc.c (d30v_format_table): Correct SHORT_C1 and + SHORT_C2. Manual was incorrect. + + * d30v-dis.c (lookup_opcode): Return value now indicates + if an opcode has a short and a long form. Used for deciding + to append a ".s" or ".l". + (print_insn): Append a ".s" to an instruction if it is + the short form and ".l" if it is a long form. Do not append + anything if the instruction has only one possible size. + + * d30v-opc.c: Change mulx2h to require an even register. + New form: SHORT_A2; a SHORT_A form that needs an even + register as the first operand. + + * d30v-dis.c (print_insn_d30v): Fix problem where the last + instruction was not being disassembled if there were an odd + number of instructions. + + * d30v-opc.c (SHORT_M2, LONG_M2): Two new forms. + +end-sanitize-d30v +start-sanitize-v850e +Fri Sep 12 11:43:54 1997 Nick Clifton + + * v850-dis.c (disassemble): Improved display of register lists. + +end-sanitize-v850e +Thu Sep 11 17:35:10 1997 Doug Evans + + * sparc-opc.c (sparc_opcodes): Fix assembler args to + fzeros, fones, fsrc1, fsrc1s, fsrc2s, fnot1, fnot1s, fnot2s, + fors, fnors, fands, fnands, fxors, fxnors, fornot1s, fornot2s, + fandnot1s, fandnot2s. + +Tue Sep 9 10:03:49 1997 Doug Evans + + * sparc-opc.c (sparc_opcodes): Fix op3 field for fcmpq/fcmpeq. + +Mon Sep 8 14:06:59 1997 Doug Evans + + * cgen-asm.c (cgen_parse_address): New argument resultp. + All callers updated. + * m32r-asm.c (parse_h_hi16): Right shift numbers by 16. + +Tue Sep 2 18:39:08 1997 Jeffrey A Law (law@cygnus.com) + + * mn10200-dis.c (disassemble): PC relative instructions are + relative to the next instruction, not the current instruction. + +Tue Sep 2 15:41:55 1997 Nick Clifton + + * v850-dis.c (disassemble): Only signed extend values that are not + returned by extract functions. + Remove use of V850_OPERAND_ADJUST_SHORT_MEMORY flag. + +Tue Sep 2 15:39:40 1997 Nick Clifton + + * v850-opc.c: Update comments. Remove use of + V850_OPERAND_ADJUST_SHORT_MEMORY. Fix several operand patterns. + Tue Aug 26 09:42:28 1997 Nick Clifton * v850-opc.c (MOVHI): Immediate parameter is unsigned. -end-sanitize-v850 Mon Aug 25 15:58:07 1997 Christopher Provenzano @@ -36,27 +587,23 @@ Tue Aug 19 10:59:59 1997 Richard Henderson * alpha-opc.c (alpha_opcodes): Fix hw_rei_stall mungage. +start-sanitize-v850e Mon Aug 18 11:10:03 1997 Nick Clifton * v850-opc.c (v850_opcodes[]): Remove use of flag field. -start-sanitize-v850eq * v850-opc.c (v850_opcodes[]): Add support for reversed short load opcodes.. -start-sanitize-v850eq -start-sanitize-v850e Mon Aug 18 11:08:25 1997 Nick Clifton * configure (cgen_files): Add support for v850e target. * configure.in (cgen_files): Add support for v850e target. -end-sanitize-v850e -start-sanitize-v850eq Mon Aug 18 11:08:25 1997 Nick Clifton - * configure (cgen_files): Add support for v850eq target. - * configure.in (cgen_files): Add support for v850eq target. -end-sanitize-v850eq + * configure (cgen_files): Add support for v850ea target. + * configure.in (cgen_files): Add support for v850ea target. +end-sanitize-v850e Fri Aug 15 05:17:48 1997 Doug Evans @@ -68,35 +615,25 @@ Fri Aug 15 05:17:48 1997 Doug Evans * disassemble.c (ARCH_all): Define ARCH_arc. (disassembler): Add ARC support. -start-sanitize-v850 Wed Aug 13 18:52:11 1997 Nick Clifton -start-sanitize-v850eq - * .Sanitize (Do-first): Add support for keep-v850eq command line - option. - - * v850-dis.c (disassemble): Add support for v850EQ instructions. - - * v850-opc.c (insert_i5div, extract_i5div): New Functions. - (v850_opcodes): Add v850EQ instructions. -end-sanitize-v850eq start-sanitize-v850e - * .Sanitize (Do-first): Add support for keep-v850e command line - option. + * v850-dis.c (disassemble): Add support for v850EA instructions. + * v850-opc.c (insert_i5div, extract_i5div): New Functions. + (v850_opcodes): Add v850EA instructions. + * v850-dis.c (disassemble): Add support for v850E instructions. * v850-opc.c (insert_d5_4, extract_d5_4, insert_d16_16, extract_d16_16, insert_i9, extract_i9, insert_u9, extract_u9, insert_spe, extract_spe): New Functions. (v850_opcodes): Add v850E instructions. -start-sanitize-v850e +end-sanitize-v850e * v850-opc.c: Reorganised and re-layed out to improve readability and portability. -end-sanitize-v850 - Tue Aug 5 23:09:31 1997 Ian Lance Taylor * configure: Rebuild with autoconf 2.12.1. @@ -137,7 +674,7 @@ Mon Jul 28 22:07:14 1997 Andrew Cagney * mips-opc.c: Fix coding of mtsa. -start-sanitize-r5900 +end-sanitize-r5900 Thu Jul 24 13:03:26 1997 Doug Evans * sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns. @@ -171,7 +708,7 @@ Thu Jun 26 16:20:27 1997 Jeffrey A Law (law@cygnus.com) * mips-opc.c (mips_builtin_opcodes): Add "pinteh", "pexeh" and "pexew" as synonyms for "pintoh", "pexoh", "pexow". -end-sanitize-5900 +end-sanitize-r5900 Wed Jun 25 15:25:57 1997 Felix Lee * ppc-opc.c (extract_nsi): make unsigned expression signed before @@ -373,14 +910,12 @@ Thu Mar 27 14:24:43 1997 Ian Lance Taylor * mips-opc.c: Add cast when setting mips_opcodes. -start-sanitize-v850 Tue Mar 25 23:04:00 1997 Stu Grossman (grossman@critters.cygnus.com) * v850-dis.c (disassemble): Fix sign extension problem. * v850-opc.c (extract_d*): Fix sign extension problems to make disassembly calculate branch offsets correctly. -end-sanitize-v850 Mon Mar 24 13:22:13 1997 Ian Lance Taylor * sh-opc.h: Add bf/s and bt/s as synonyms for bf.s and bt.s. @@ -854,25 +1389,21 @@ Thu Jan 2 12:14:29 1997 Jeffrey A Law (law@cygnus.com) * mn10300-dis.c (disassemble): Make sure all variables are initialized before they are used. -start-sanitize-v850 Tue Dec 31 12:20:38 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_opcodes): Put curly-braces around operands for "breakpoint" instruction. -end-sanitize-v850 Tue Dec 31 15:38:13 1996 Ian Lance Taylor * Makefile.in (ALL_CFLAGS): Add -D_GNU_SOURCE. (dep): Use ALL_CFLAGS rather than CFLAGS. -start-sanitize-v850 Tue Dec 31 15:09:16 1996 Michael Meissner * v850-opc.c (D8_{6,7}): Set V850_OPERAND_ADJUST_SHORT_MEMORY flag. -end-sanitize-v850 Mon Dec 30 17:02:11 1996 Fred Fish * Makefile.in (m68k-opc.o, alpha-opc.o): Remove dis-asm.h dependency. @@ -1132,30 +1663,25 @@ Fri Nov 1 10:29:11 1996 Richard Henderson (alpha_opcodes): Add new BWX, CIX, and MAX instructions. Recategorize PALcode instructions. -start-sanitize-v850 Wed Oct 30 16:46:58 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_opcodes): Add relaxing "jbr". -end-sanitize-v850 Tue Oct 29 16:30:28 1996 Ian Lance Taylor * mips-dis.c (_print_insn_mips): Don't print a trailing tab if there are no operand types. -start-sanitize-v850 Tue Oct 29 12:22:21 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (D9_RELAX): Renamed from D9, all references changed. (v850_operands): Make sure D22 immediately follows D9_RELAX. -end-sanitize-v850 Fri Oct 25 12:12:53 1996 Ian Lance Taylor * i386-dis.c (print_insn_x86): Set info->bytes_per_line to 5. -start-sanitize-v850 Thu Oct 24 17:53:52 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (insert_d8_6): Fix operand insertion for sld.w @@ -1164,7 +1690,6 @@ Thu Oct 24 17:53:52 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_opcodes): Add "jCC" instructions (aliases for "bCC"instructions). -end-sanitize-v850 Thu Oct 24 17:21:20 1996 Ian Lance Taylor * mips-dis.c (_print_insn_mips): Use a tab between the instruction @@ -1180,12 +1705,10 @@ Fri Oct 11 16:03:49 1996 Jeffrey A Law (law@cygnus.com) * mn10300-opc.c (mn10300_opcodes): Fix typo in opcode field for movhu instruction. -start-sanitize-v850 * v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands, cast value to "long" not "signed long" to keep hpux10 compiler quiet. -end-sanitize-v850 Thu Oct 10 10:25:58 1996 Jeffrey A Law (law@cygnus.com) @@ -1268,7 +1791,6 @@ Tue Oct 1 10:49:11 1996 Ian Lance Taylor * i386-dis.c (op_rtn): Change to be a pointer. Adjust uses accordingly. Don't declare functions using op_rtn. -start-sanitize-v850 Fri Sep 27 18:28:59 1996 Stu Grossman (grossman@critters.cygnus.com) * v850-dis.c (disassemble): Add memaddr argument. Re-arrange @@ -1279,7 +1801,6 @@ Fri Sep 27 18:28:59 1996 Stu Grossman (grossman@critters.cygnus.com) bit operands. * (v850_opcodes): Add breakpoint insn. -end-sanitize-v850 Mon Sep 23 12:32:26 1996 Ian Lance Taylor * m68k-opc.c: Move the fmovemx data register cases before the @@ -1305,7 +1826,6 @@ Tue Sep 3 12:09:46 1996 Doug Evans * sparc-opc.c (sparc_opcodes): Add setuw, setsw, setx. -start-sanitize-v850 Tue Sep 3 12:05:25 1996 Jeffrey A Law (law@cygnus.com) * v850-dis.c (disassemble): Make static. Provide prototype. @@ -1340,8 +1860,7 @@ Sat Aug 31 01:27:26 1996 Jeffrey A Law (law@cygnus.com) (v850_opcodes): Fix mask for jarl and jr. * v850-dis.c: New file. Skeleton for disassembler support. - * Makefile.in Remove v850 references, they're not needed here - and they weren't being sanitized away. + * Makefile.in Remove v850 references, they're not needed here. * configure.in: Add v850-dis.o when building v850 toolchains. * configure: Rebuilt. * disassemble.c (disassembler): Call v850 disassembler. @@ -1393,13 +1912,11 @@ Wed Aug 28 15:55:43 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_opcodes): Add null opcode to mark the end of the opcode table. -end-sanitize-v850 Mon Aug 26 13:35:53 1996 Martin M. Hunt * d10v-opc.c (pre_defined_registers): Added register pairs, "r0-r1", "r2-r3", etc. -start-sanitize-v850 Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com) * v850-opc.c (v850_operands): Make I16 be a signed operand. @@ -1482,7 +1999,6 @@ Tue Aug 20 14:41:03 1996 J.T. Conklin * configure.in: (bfd_v850_arch) Add new case. * v850-opc.c: New file. -end-sanitize-v850 Mon Aug 19 15:21:38 1996 Doug Evans * sparc-dis.c (print_insn_sparc): Handle little endian sparcs.