X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=e038a9b0c78a30924bdf89412ac12b7b05b82737;hb=6a51a8a8d34f57a9b88de4961c67d0a4cb7026e3;hp=23b76a2e92a824517403170fbf94e05a780a24e1;hpb=71b2105039a9a848e4a596ba38eda64a691bf903;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 23b76a2e92..e038a9b0c7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,688 @@ +2002-12-02 Alan Modra + + * arm-dis.c (print_insn_arm): Constify "insn". Formatting. + (print_insn_thumb): Likewise. + * h8500-dis.c (print_insn_h8500): Constify "opcode". + * mcore-dis.c (print_insn_mcore): Constify "op". Formatting. + * ns32k-dis.c (print_insn_arg ): Use a union to avoid + type-punned pointer warnings. + : Likewise. Fix error message too. + * pdp11-dis.c (print_reg): Warning fix. + * sh-dis.c (print_movxy): Constify "op" param. + (print_insn_ddt): Constify sh_opcode_info vars. + (print_insn_ppi): Likewise. + (print_insn_sh): Likewise. + * tic30-dis.c (cnvt_tmsfloat_ieee): Use a union to avoid + type-punned pointer warnings. + * w65-dis.c (print_insn_w65): Constify "op". + +2002-12-01 Stephane Carrez + + * m68hc11-dis.c (PC_REGNUM): Define. + (print_indexed_operand): Need an adjustment for some PC-relative + operand modes; print the final address of PC-relative modes. + (print_insn): Take into account movw/movb to adjust the PC-relative + operand addresses. + +2002-11-30 Alan Modra + + *arm-dis.c, cris-dis.c, h8300-dis.c, mips-dis.c, mmix-dis.c, sh-dis.c, + sh64-dis.c, v850-dis.c: Replace boolean with bfd_boolean, true with + TRUE, false with FALSE. Simplify comparisons of bfd_boolean vars + with TRUE/FALSE. Formatting. + +2002-11-25 DJ Delorie + + * xstormy16-opc.c: Regenerate. + +2002-11-25 Jim Wilson + + * ia64-dis.c (print_insn_ia64): Correct handling of IA64_OPND_TGT64. + +2002-11-15 DJ Delorie + + * xstormy16-desc.c: Regenerate. + * xstormy16-opc.c: Regenerate. + * xstormy16-opc.h: Regenerate. + +2002-11-18 Klee Dienes + + * avr-dis.c: Include libiberty.h (for xmalloc). + (struct avr_opcodes_s): Remove 'bin_mask' field (it's + automatically computed in the init routine). + (AVR_INSN): No longer provide bin_mask field in initializer. + (avr_opcodes_s): Declare as const. + (print_insn_avr): Store the bin_mask field in a separate table + (allocated with xmalloc); iterate through it at the same time as + we iterate through the opcodes. + +2002-11-18 Klee Dienes + + * h8300-dis.c: Include libiberty.h (for xmalloc). + (struct h8_instruction): New type, used to wrap h8_opcodes with a + length field (computed at run-time). + (h8_instructions): New variable. + (bfd_h8_disassemble_init): Allocate the storage for + h8_instructions. Fill h8_instructions with pointers to the + appropriate opcode and the correct value for the length field. + (bfd_h8_disassemble): Iterate through h8_instructions instead of + h8_opcodes. + +2002-11-18 Klee Dienes + + * arc-opc.c (arc_ext_opcodes): Define. + (arc_ext_operands): Define. + * i386-dis.c (Suffix3DNow): Declare as const. + * arm-opc.h (arm_opcodes): Declare as const. + (thumb_opcodes): Declare as const. + * h8500-opc.h (h8500_table): Declare as const. + (h8500_table): Use a NULL for the opcode in the terminator, so + that code testing (opcode->name) behaves correctly. + * mcore-opc.h (mcore_table): Declare as const. + * sh-opc.h (sh_table): Declare as const. + * w65-opc.h (optable): Declare as const. + * z8k-opc.h (z8k_table): Declare as const. + +2002-11-18 Svein E. Seldal + + * tic4x-dis.c: Added support for enhanced and special insn. + (c4x_print_op): Added insn class 'i' and 'j' + (c4x_hash_opcode_special): Add to support special insn + (c4x_hash_opcode): Update to support the new opcode-list + format. Add support for the new special insns. + (c4x_disassemble): New opcode-list support. + +2002-11-16 Klee Dienes + + * m88k-dis.c: Include libiberty.h (for xmalloc). + (HASHTAB): New type, used to build instruction hash tables. + Contains a pointer to an INSTAB and a pointer to the next hash + chain entry. + (instructions): Move definition from m88k.h; remove initialization + of 'next' field. + (hashtable): Now an aray of pointer-to-HASHTAB, not INSTAB. + (printop): Mark pointer to OPSPEC as const. + (install): Remove; fold into init_disasm. + (m88kdis): Update to ihashtab_initialized to 1 after calling + init_disasm. entry_ptr now iterates through HASHTABs, not + INSTABs. + (init_disasm): Iterate through the instructions and add to + hashtable[]. + +2002-11-16 Svein E. Seldal + + * tic4x-dis.c: (c4x_print_op): Add support for the new argument + format. Fix bug in 'N' register printer. + +2002-11-12 Segher Boessenkool + + * ppc-dis.c (print_insn_powerpc): Correct condition register display. + +2002-11-07 Aldy Hernandez + + * ppc-opc.c (EVUIMM_4): Change bit size to 32. + (EVUIMM_2): Same. + (EVUIMM_8): Same. + +2002-11-07 Klee Dienes + + * Makefile.am (ia64-asmtab.c): Update to use the new '--srcdir' + argument to ia64-gen. + Regenerate dependencies for ia64-len.lo. + * Makefile.in: Regenerate. + * ia64-gen.c: Convert to use getopt(). Add the standard GNU + options, as well as '--srcdir', which controls the directory in + which ia64-gen looks for the sources it uses to generate the + output table. Add a 'const' to the declaration of the final + output table. Call xmalloc_set_program_name to set the program + name. + * ia64-asmtab.c: Regenerate. + +2002-11-07 Nick Clifton + + * ia64-gen.c: Fix comment formatting and compile time warnings. + * ia64-opc-a.c: Fix compile time warnings. + * ia64-opc-b.c: Likewise. + * ia64-opc-d.c: Likewise. + * ia64-opc-f.c: Likewise. + * ia64-opc-i.c: Likewise. + * ia64-opc-m.c: Likewise. + * ia64-opc-x.c: Likewise. + +2002-11-06 Aldy Hernandez + + * opcodes/ppc-opc.c: Change RD to RS for evmerge*. + +2002-10-07 Nathan Tallent + + * sparc-opc.c (sparc_opcodes) : Add conditional/unconditional branch + classification. + +2002-10-13 Stephane Carrez + + * m68hc11-dis.c (print_insn): Treat bitmask and branch operands + at the end. + +2002-09-30 Gavin Romig-Koch + Ken Raeburn + Aldy Hernandez + Eric Christopher + Richard Sandiford + + * mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'. + (mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400 + and bfd_mach_mips5500. + * mips-opc.c (V1): Include INSN_4111 and INSN_4120. + (N411, N412, N5, N54, N55): New convenience defines. + (mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes. + Change dmadd16 and madd16 from V1 to N411. + +2002-09-26 Thiemo Seufer + + * mips-dis.c (print_insn_mips): Always allow disassembly of + 32-bit jalx opcode. + +2002-09-24 Nick Clifton + + * po/de.po: Updated German translation. + +2002-09-21 Alan Modra + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2002-09-20 Nick Clifton + + * ppc-opc.c (CRFD, CRFS): Add PPC_OPERAND_CR flag so that cr + register names are accepted. + +2002-09-17 Svein E. Seldal + + * tic4x-dis.c: Add function declarations and ATTRIBUTE_UNUSED. + Convert functions to K&R format. + +2002-09-13 Nick Clifton + + * ppc-opc.c (MFDEC2): Include Book-E. + (PPCCHLK64): New opcode mask. + (evsubw, evsubiw, evmr, evnot, isellt, iselgt, iseleq, mfpid, + mfcsrr0, mfcsrr1, mfdear, mfesr, mfivpr, mfusprg0, mftbl, + mftbu, mfpir, mfdbsr, mfdbcr0, mfdbcr1, mfdbcr2, mfiac1, + mfiac2, mfiac3, mfiac4, mfdac1, mfdac2, mfdvc1, mfdvc2, mftsr, + mftcr, mfivor0, mfivor1, mfivor2, mfivor3, mfivor4, mfivor5, + mfivor6, mfivor7, mfivor8, mfivor9, mfivor10, mfivor11, + mfivor12, mfivor13, mfivor14, mfivor15, mfbbear, mfmcsrr0, + mfmcsrr1, mfmcsr, mtpid, mtdecar, mtcsrr0, mtcsrr1, mtdear, + mtesr, mtivpr, mtusprg0, mtsprg4, mtsprg5, mtsprg6, mtsprg7, + mtdbsr, mtdbcr0, mtdbcr1, mtdbcr2, mtiac1, mtiac2, mtiac3, + mtiac4, mtdac1, mtdac2, mtdvc1, mtdvc2, mttsr, mttcr, mtivor0, + mtivor1, mtivor2, mtivor3, mtivor4, mtivor5, mtivor6, mtivor7, + mtivor8, mtivor9, mtivor10, mtivor11, mtivor12, mtivor13, + mtivor14, mtivor15, mtbbear, mtmcsrr0, mtmcsrr1, mtmcsr): New + Book-E instructions. + (evfsneg): Fix opcode value. + (dcbtstlse, dcbtlse, icblce, dcblce, icbtsle): Use PPCCHLK64 + mask. + (mcrxr64, tlbivaxe, tlbsxe, tlbsxe.): Restrict to 64-bit + Book-E. + (extsw): Restrict to 64-bit PPC instruction sets. + (extsw.): Does not exist in 64-bit Book-E. + (powerpc_macro): Remove mftbl, mftbu and mftb Book-E macros as + they are no longer needed. + +2002-09-12 Gary Hade + + * ppc-dis.c (powerpc_dialect): Add missing PPC_OPCODE_CLASSIC. + +2002-09-11 Nick Clifton + + * po/da.po: Updated Danish translation file. + +2002-09-04 Nick Clifton + + * ppc-opc.c (extsw, extsw.): Do not allow for the BookE32. + +2002-09-04 Nick Clifton + + * disassemble.c (disassembler_usage): Add invocation of + print_ppc_disassembler_options. + * ppc-dis.c (print_ppc_disassembler_options): New function. + +2002-09-04 Nick Clifton + + * ppc-opc.c: The BookE implementations of the TLBWE and TLBRE + instructions do not take any arguments. + +2002-09-02 Nick Clifton + + * v850-opc.c: Remove redundant references to V850EA architecture. + +2002-09-02 Alan Modra + + * arc-opc.c: Include bfd.h. + (arc_get_opcode_mach): Subtract off base bfd_mach value. + +2002-08-30 Alan Modra + + * v850-dis.c (disassemble): Remove bfd_mach_v850ea case. + + * mips-dis.c (_print_insn_mips): Don't use hard-coded mach constants. + +2002-08-28 Svein E. Seldal + + * configure.in: Added bfd_tic4x_arch. + * configure: Regenerate. + * Makefile.am: Added tic4x-dis.o target. + * Makefile.in: Regenerate. + +2002-08-28 Michael Hayes + + * disassemble.c: Added tic4x target and c4x + disassembler routine. + * tic4x-dis.c: New file. + +2002-08-16 Christian Groessler + + * z8k-dis.c (unparse_instr): case CLASS_BA: Designate hex + values as those. + * z8kgen.c (opt): Fix definition of "in rd,imm16" opcode. + * z8k-opc.h: Regenerated with new z8kgen.c. + +2002-08-19 Elena Zannoni + + From matthew green + + * ppc-dis.c (powerpc_dialect): Support `-m500', `-m500x2' and + `-mefs'. Turn off AltiVec for E500 and efs. + (print_insn_powerpc): Don't print an AltiVec instruction if the + dialect is not efs. + + * ppc-opc.c (insert_pmrn, extract_pmrn, insert_ev2, extract_ev2, + insert_ev4, extract_ev4, insert_ev8, extract_ev8): New functions + for extracting pmrn/evld/evstd/etc operands. + (CRB, CRFD, CRFS, DC, RD): New instruction fields. + (CT): Make this equal to RD + 1. + (PMRN): New operand. + (RA): Update. + (EVUIMM, EVUIMM_2, EVUIMM_4, EVUIMM_8): New operands. + (WS): Update. + (EVSEL, EVSEL_MASK): New instruction form and mask for EVSEL. + (ISEL, ISEL_MASK): New instruction form and mask for ISEL. + (XISEL, XISEL_MASK): New instruction form and mask for ISEL. + (CTX, CTX_MASK): New instruction form and mask for context cache + instructions. + (UCTX, UCTX_MASK): New instruction form and mask for user context + cache instructions. + (XC, XC_MASK, XUC, XUC_MASK): New instruction forms. + (CLASSIC): New define. + (PPCESPE): New define. + (PPCISEL, , PPCBRLK, PPCPMR, PPCCHLK, PPCRFMI): New + defines for integer select, cache control, branch + locking, power management, cache locking and machine check + APU instructions, respectively. + (efsabs, efsnabs, efsneg, efsadd, efssub, efsmul, + efsdiv, efscmpgt, efscmplt, efscmpeq, efststgt, efststlt, + efststeq, efscfui, efsctuiz, efscfsi, efscfuf, efscfsf, + efsctui, efsctsi, efsctsiz, efsctuf, efsctsf, + evaddw, evaddiw, evsubfw, evsubifw, evabs, evneg, evextsb, + evextsh, evrndw, evcntlzw, evcntlsw, brinc, evand, evandc, evor, + evorc, evxor, eveqv, evnand, evnor, evrlw, evrlwi, evslw, evslwi, + evsrws, evsrwu, evsrwis, evsrwiu, evsplati, evsplatfi, evmergehi, + evmergelo, evmergehilo, evmergelohi, evcmpgts, evcmpgtu, evcmplts, + evcmpltu, evcmpeq, evsel, evldd, evlddx, evldw, evldwx, evldh, + evldhx, evlwhe, evlwhex, evlwhou, evlwhoux, evlwhos, evlwhosx, + evlwwsplat, evlwwsplatx, evlwhsplat, evlwhsplatx, evlhhesplat, + evlhhesplatx, evlhousplat, evlhousplatx, evlhossplat, evlhossplatx, + evstdd, evstddx, evstdw, evstdwx, evstdh, evstdhx, evstwwe, + evstwwex, evstwwo, evstwwox, evstwhe, evstwhex, evstwho, evstwhox, + evfsabs, evfsnabs, evfsneg, evfsadd, evfssub, evfsmul, evfsdiv, + evfscmpgt, evfscmplt, evfscmpeq, evfststgt, evfststlt, evfststeq, + evfscfui, evfsctuiz, evfscfsi, evfscfuf, evfscfsf, evfsctui, + evfsctsi, evfsctsiz, evfsctuf, evfsctsf, evsabs, evsnabs, evsneg, + evsadd, evssub, evsmul, evsdiv, evscmpgt, evsgmplt, evsgmpeq, + evststgt, evststlt, evststeq, evscfui, evscfsi, evscfuf, evscfsf, + evsctui, evsctuiz, evsctsi, evsctsiz, evsctuf, evsctsf, evmhossf, + evmhossfa, evmhosmf, evmhosmfa, evmhosmi, evmhosmia, evmhoumi, + evmhoumia, evmhessf, evmhessfa, evmhesmf, evmhesmfa, evmhesmi, + evmhesmia, evmheumi, evmheumia, evmhossfaaw, evmhossiaaw, + evmhosmfaaw, evmhosmiaaw, evmhousiaaw, evmhoumiaaw, evmhessfaaw, + evmhessiaaw, evmhesmfaaw, evmhesmiaaw, evmheusiaaw, evmheumiaaw, + evmhossfanw, evmhossianw, evmhosmfanw, evmhosmianw, evmhousianw, + evmhoumianw, evmhessfanw, evmhessianw, evmhesmfanw, evmhesmianw, + evmheusianw, evmheumianw, evmhogsmfaa, evmhogsmiaa, evmhogumiaa, + evmhegsmfaa, evmhegsmiaa, evmhegumiaa, evmhogsmfan, evmhogsmian, + evmhogumian, evmhegsmfan, evmhegsmian, evmhegumian, evmwhssf, + evmwhssfa, evmwhssfaa, evmwhssmaa, evmwhsmfaa, evmwhsmiaa, + evmwhusiaa, evmwhumiaa, evmwhssfan, evmwhssian, evmwhsmfan, + evmwhsmian, evmwhusian, evmwhumian, evmwhgssfaa, evmwhgsmfaa, + evmwhgsmiaa, evmwhgumiaa, evmwhgssfan, evmwhgsmfan, evmwhgsmian, + evmwhgumian, evmwhsmf, evmwhsmfa, evmshsmi, evmshsmia, evmshumi, + evmshumia, evmmlssf, evmmlssfa, evmwlsmf, evmwlsmfa, evmwlumi, + evmwlumia, evmwlssfaaw, evmwlssiaaw, evmwlsmfaaw, evmwlsmiaaw, + evmwlusiaaw, evmwlumiaaw, evmwissfanw, evmwissianw, evmwlsmfanw, + evmwlsmianw, evmwlusianw, evmwlumianw, evmwssf, evmwssfa, + evmwsmf, evmwsmfa, evmwsmi, evmwsmia, evmwumi, evmwumia, + evmwssfaa, evmwsmfaa, evmwsmiaa, evmwumiaa, evmwssfan, evmwsmfan, + evmwsmian, evmwumian, evaddssiaaw, evaddsmiaaw, evaddusiaaw, + evaddumiaaw, evsubfssiaaw, evsubfsmiaaw, evsubfusiaaw, + evsubfumiaaw, evmra, evdivws, evdivws): New e500x2 Core Complex + instructions. + (rfmci): New machine check APU instruction. + (isel): New integer select APU instructino. + (icbtls, icbtlse, icblc, icblce, dcbtls, dcbtlse, dcbtstls, + dcbtstlse, dcblc, dcblce): New cache control APU instructions. + (mtspefscr, mfspefscr): New instructions. + (mfpmr, mtpmr): New performance monitor APU instructions. + (savecontext): New context cache APU instructions. + (bblels, bbelr): New branch locking APU instructions. + (bblels, bbelr): New instructions. + (mftbl, mftbu, mftb): Set as CLASSIC instructions. Add BOOKE alias. + +2002-08-13 Stephane Carrez + + * m68hc11-opc.c: Update call operand to accept the page definition. + Identify instructions that are branches and calls to generate a + RL_JUMP relocation. + +2002-08-13 Stephane Carrez + + * m68hc11-dis.c (print_insn): Take into account 68HC12 memory + banks and fix disassembling of call instruction. + (print_indexed_operand): New param to tell whether + it was an indirect addressing operand (for disassembling call). + +2002-08-09 Nick Clifton + + * po/sv.po: Updated Swedish translation. + +2002-08-08 Maciej W. Rozycki + + * mips-opc.c (mips_builtin_opcodes): Remove "dla" and "la" as + aliases to "daddiu" and "addiu". + +2002-07-30 Nick Clifton + + * po/sv.po: Updated Swedish translation. + +2002-07-25 Nick Clifton + + * po/sv.po: Updated Swedish translation. + * po/es.po: Updated Spanish translation. + * po/pr_BR.po: Updated Brazilian Portuguese translation. + * po/tr.po: Updated Turkish translation. + * po/fr.po: Updated French translation. + +2002-07-24 Nick Clifton + + * po/sv.po: Updated Swedish translation. + * po/es.po: Updated Spanish translation. + * po/pr_BR.po: Updated Brazilian Portuguese translation. + +2002-07-23 Alan Modra + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2002-07-23 Nick Clifton + + * po/fr.po: Updated French translation. + * po/pr_BR.po: New Brazilian Portuguese translation. + * po/id.po: Updated Indonesian translation. + * configure.in (LINGUAS): Add pr_BR. + * configure: Regenerate. + +2002-07-18 Denis Chertykov + Frank Ch. Eigler + Alan Lehotsky + matthew green + + * configure.in: Add support for ip2k. + * configure: Regenerate. + * Makefile.am: Add support for ip2k. + * Makefile.in: Regenerate. + * disassemble.c: Add support for ip2k. + * ip2k-asm.c: New generated file. + * ip2k-desc.c: New generated file. + * ip2k-desc.h: New generated file. + * ip2k-dis.c: New generated file. + * ip2k-ibld.c: New generated file. + * ip2k-opc.c: New generated file. + * ip2k-opc.h: New generated file. + +2002-07-17 David Mosberger + + * ia64-opc-b.c (bWhc): New macro. + (mWhc): Ditto. + (OpPaWhcD): Ditto. + (ia64_opcodes_b): Correct patterns for indirect call + instructions to use 3-bit "wh" field. + * ia64-asmtab.c: Regnerate. + +2002-07-09 Thiemo Seufer + + * mips-dis.c (mips_isa_type): Add MIPS16 insn handling. + * mips-opc.c (I16): New define. + (mips_builtin_opcodes): Make jalx an I16 insn. + +2002-06-18 Dave Brolley + + * po/POTFILES.in: Add frv-*.[ch]. + * disassemble.c (ARCH_frv): New macro. + (disassembler): Handle bfd_arch_frv. + * configure.in: Support frv_bfd_arch. + * Makefile.am (HFILES): Add frv-*.h. + (CFILES): Add frv-*.c + (ALL_MACHINES): Add frv-*.lo. + (CLEANFILES): Add stamp-frv. + (FRV_DEPS): New variable. + (stamp-frv): New target. + (frv-asm.lo): New target. + (frv-desc.lo): New target. + (frv-dis.lo): New target. + (frv-ibld.lo): New target. + (frv-opc.lo): New target. + (frv-*.[ch]): New files. + +2002-06-18 Ben Elliston + + * Makefile.am (CGENDEPS): Remove unnecessary stamp-cgen. + * Makefile.in: Regenerate. + +2002-06-08 Alan Modra + + * a29k-dis.c: Replace CONST with const. + * h8300-dis.c: Likewise. + * m68k-dis.c: Likewise. + * or32-dis.c: Likewise. + * sparc-dis.c: Likewise. + +2002-06-04 Jason Thorpe + + * configure.in: Add "sh5*-*" to list of targets which include + sh64 support. + * configure: Regenerate. + +2002-05-31 Chris G. Demetriou + + * mips-opc.c: Clean up a few whitespace issues, and sort a + few entries understanding that 'x' follows 'w' in the alphabet. + +2002-05-31 Chris G. Demetriou + Ed Satterthwaite + + * mips-opc.c: Add support for SB-1 MDMX subset and extensions. + +2002-05-31 Alan Modra + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * po/POTFILES.in: Regenerate. + +2002-05-30 Chris G. Demetriou + Ed Satterthwaite + + * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', + and 'Z' formats, for MDMX. + (mips_isa_type): Add MDMX instructions to the ISA + bit mask for bfd_mach_mipsisa64. + * mips-opc.c: Add support for MDMX instructions. + (MX): New definition. + + * mips-dis.c: Update copyright years to include 2002. + +2002-05-30 Diego Novillo + + * d10v-opc.c (d10v_opcodes): `btsti' does not modify its + arguments. + +2002-05-28 Kuang Hwa Lin + + * configure.in: Add DLX configuraton support. + * configure: Regenerate. + * Makefile.am: Add DLX configuraton support. + * Makefile.in: Regenerate. + * disassemble.c: Add DLX support. + * dlx-dis.c: New file. + +2002-05-25 Alan Modra + + * Makefile.am (sh-dis.lo): Don't put make commands in deps. + * Makefile.in: Regenerate. + * arc-dis.c: Use #include "" instead of <> for local header files. + * m68k-dis.c: Likewise. + +2002-05-22 J"orn Rennecke + + * Makefile.am (sh-dis.lo): Compile with @archdefs@. + * Makefile.in: regenerate. + + * sh-dis.c (print_insn_sh): If coff and bfd_mach_sh, use arch_sh4 + for disassembly. + +2002-05-22 Thiemo Seufer + + * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros. + +2002-05-17 J"orn Rennecke + + * disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh. + * sh-dis.c (LITTLE_BIT): Delete. + (print_insn_sh, print_insn_shl): Deleted. + (print_insn_shx): Renamed to + (print_insn_sh). No longer static. Handle SHmedia instructions. + Use info->endian to determine endianness. + * sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete. + (print_insn_sh64x): No longer static. Renamed to + (print_insn_sh64). Removed pfun_compact and endian arguments. + If we got an uneven address to indicate SHmedia, adjust it. + Return -2 for SHcompact instructions. + +2002-05-17 Alan Modra + + * acinclude.m4 (AM_INSTALL_LIBBFD): Fake to fool autotools. + * configure.in: Invoke AM_INSTALL_LIBBFD. + * Makefile.am (install-data-local): Move to.. + (install_libopcodes): .. New target. + (uninstall_libopcodes): Likewise. + (install-bfdlibLTLIBRARIES): Likewise. + (uninstall-bfdlibLTLIBRARIES): Likewise. + (bfdlibdir): New. + (bfdincludedir): New. + (lib_LTLIBRARIES): Rename to bfdlib_LTLIBRARIES. + * aclocal.m4: Regenerate. + * configure: Regenerate. + * Makefile.in: Regenerate. + +2002-05-15 Nick Clifton + + * fr30-asm.c: Regenerate. + * fr30-desc.c: Regenerate. + * fr30-dis.c: Regenerate. + * m32r-asm.c: Regenerate. + * m32r-desc.c: Regenerate. + * m32r-dis.c: Regenerate. + * openrisc-asm.c: Regenerate. + * openrisc-desc.c: Regenerate. + * openrisc-dis.c: Regenerate. + * xstormy16-asm.c: Regenerate. + * xstormy16-desc.c: Regenerate. + * xstormy16-dis.c: Regenerate. + +2002-05-15 Thiemo Seufer + + * mips-dis.c (is_newabi): EABI is not a NewABI. + +2002-05-13 Jason Thorpe + + * configure.in (shle-*-*elf*): Include sh64 support. + * configure: Regenerate. + +2002-04-28 Jason Thorpe + + * vax-dis.c (print_insn_arg): Pass the insn info to print_insn_mode. + (print_insn_mode): Print some basic info about floating point values. + +2002-05-09 Anton Blanchard + + * ppc-opc.c: Add "tlbiel" for POWER4. + +2002-05-07 Graydon Hoare + + * cgen-dis.in: (print_insn_@arch@): Cache list of opened CPUs rather + than just most-recently-opened. + +2002-05-01 Alan Modra + + * ppc-opc.c: Add "tlbsx." and "tlbsxe." for booke. + +2002-04-24 Christian Groessler + + * z8k-dis.c (print_insn_z8k): Set disassemble_info to 2 + bytes_per_chunk, 6 bytes_per_line for nicer display of the hex + codes. + (z8k_lookup_instr): CLASS_IGNORE case added. + (output_instr): Don't print hex codes, they are already + printed. + (unpack_instr): ARG_NIM4 case added. ARG_NIM8 case + fixed. Support CLASS_BIT_1OR2 and CLASS_IGNORE cases. + (unparse_instr): Fix base and indexed addressing disassembly: + The index is inside the brackets. + * z8kgen.c (gas): Add ARG_NIM4 and CLASS_IGNORE defines. + (opt): Fix shift left/right arithmetic/logical byte defines: + The high byte of the immediate word is ignored by the + processor. + Fix n parameter of ldm opcodes: The opcode contains (n-1). + (args): Fix "n" entry. + (toks): Add "nim4" and "iiii" entries. + * z8k-opc.h: Regenerated with new z8kgen.c. + +2002-04-24 Nick Clifton + + * po/id.po: New Indonesian translation. + * configure.in (ALL_LIGUAS): Add id.po + * configure: Regenerate. + +2002-04-17 matthew green + + * ppc-opc.c (powerpc_opcode): Fix dssall operand list. + +2002-04-04 Alan Modra + + * dep-in.sed: Cope with absolute paths. + * Makefile.am (dep.sed): Subst TOPDIR. + Run "make dep-am". + * Makefile.in: Regenerate. + * ppc-opc.c: Whitespace. + * s390-dis.c: Fix copyright date. + +2002-03-23 matthew green + + * ppc-opc.c (vmaddfp): Fix operand order. + 2002-03-21 Alan Modra * Makefile.am: Run "make dep-am". @@ -8,7 +693,7 @@ * ppc-opc.c: Add optional field to mtmsrd. (MTMSRD_L, XRLARB_MASK): Define. -Mon Mar 18 21:10:43 CET 2002 Jan Hubicka +2002-03-18 Jan Hubicka * i386-dis.c (prefix_name): Fix handling of 32bit address prefix in 64bit mode. @@ -32,7 +717,7 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2002-03-16 Nick Clifton * Makefile.am: Tidy up sh64 rules. - * Makefile.in: Regenerate. + * Makefile.in: Regenerate. 2002-03-15 Chris G. Demetriou @@ -118,7 +803,7 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2002-02-20 Tom Rix - * ppc-opc.c (powerpc_operands): Add WS feild. Use for tlbre, tlbwe. + * ppc-opc.c (powerpc_operands): Add WS field. Use for tlbre, tlbwe. 2002-02-19 Martin Schwidefsky @@ -150,9 +835,9 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2002-02-12 Graydon Hoare * cgen-asm.in (parse_insn_normal): Change call from - @arch@_cgen_parse_operand to cd->parse_operand, to + @arch@_cgen_parse_operand to cd->parse_operand, to facilitate CGEN_ASM_INIT_HOOK doing useful work. - + 2002-02-11 Alexandre Oliva * sparc-dis.c (print_insn_sparc): Make sure 0xFFFFFFFF is not @@ -641,7 +1326,7 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka * cgen-asm.in: Include safe-ctype.h in preference to ctype.h. Fix formatting. Use ISSPACE instead of isspace and TOLOWER instead of tolower. - (@arch@_cgen_build_insn_regex): Remove duplication of syntax + (@arch@_cgen_build_insn_regex): Remove duplication of syntax string elements in constructed regular expression. * fr30-asm.c: Regenerate. * fr30-desc.c: Regenerate. @@ -708,7 +1393,7 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka * sh-opc.h: Fix encoding of least significant nibble of the DSP single data transfer instructions. - * sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP + * sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP instructions. 2001-10-08 Nick Clifton @@ -717,30 +1402,30 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka C files. * cgen-dis.in: The same. * cgen-ibld.in: The same. - * fr30-asm.c: Regenerate. - * fr30-desc.c: Regenerate. - * fr30-dis.c: Regenerate. - * fr30-ibld.c: Regenerate. - * fr30-opc.c: Regenerate. - * m32r-asm.c: Regenerate. - * m32r-desc.c: Regenerate. - * m32r-dis.c: Regenerate. - * m32r-ibld.c: Regenerate. - * m32r-opc.c: Regenerate. - * m32r-opinst.c Regenerate. - * openrisc-asm.c: Regenerate. - * openrisc-desc.c: Regenerate. - * openrisc-dis.c: Regenerate. - * openrisc-ibld.c: Regenerate. - * openrisc-opc.c: Regenerate. - * openrisc-opc.h: Regenerate. + * fr30-asm.c: Regenerate. + * fr30-desc.c: Regenerate. + * fr30-dis.c: Regenerate. + * fr30-ibld.c: Regenerate. + * fr30-opc.c: Regenerate. + * m32r-asm.c: Regenerate. + * m32r-desc.c: Regenerate. + * m32r-dis.c: Regenerate. + * m32r-ibld.c: Regenerate. + * m32r-opc.c: Regenerate. + * m32r-opinst.c Regenerate. + * openrisc-asm.c: Regenerate. + * openrisc-desc.c: Regenerate. + * openrisc-dis.c: Regenerate. + * openrisc-ibld.c: Regenerate. + * openrisc-opc.c: Regenerate. + * openrisc-opc.h: Regenerate. * Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. * po/opcodes.pot: Regenerate. 2001-10-08 Aldy Hernandez - * arm-opc.h (arm_opcodes): Add cirrus insns. + * arm-opc.h (arm_opcodes): Add cirrus insns. * arm-dis.c (print_insn_arm): Add 'I' case. @@ -757,9 +1442,9 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2001-09-30 John Healy - * cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits - calls to cgen_get_insn_value and cgen_put_insn_value calls. - (extract_1): Switched bfd_get_bits call to cgen_get_insn_value call. + * cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits + calls to cgen_get_insn_value and cgen_put_insn_value calls. + (extract_1): Switched bfd_get_bits call to cgen_get_insn_value call. 2001-09-30 Hans-Peter Nilsson @@ -876,7 +1561,7 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka * arc-opc.c: Include "sysdep.h" to get stdio.h as include file. * arc-ext.c: Likewise. -2001-08-28 matthew gren +2001-08-28 matthew green * ppc-opc.c (icbt): Order correctly. @@ -1063,10 +1748,10 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2001-07-12 Jeff Johnston - * cgen-asm.in: Include "xregex.h" always to enable the libiberty - regex support. - (@arch@_cgen_build_insn_regex): New routine from Graydon. - (@arch@_cgen_assemble_insn): Add Graydon's code to use regex + * cgen-asm.in: Include "xregex.h" always to enable the libiberty + regex support. + (@arch@_cgen_build_insn_regex): New routine from Graydon. + (@arch@_cgen_assemble_insn): Add Graydon's code to use regex to verify if it is worth parsing the insn as insn "x". Also update error message when insn is not a recognized format of the insn vs when the insn is completely unrecognized. @@ -1195,10 +1880,10 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2001-06-06 Christian Groessler - * z8k-dis.c: Fix formatting. - (unpack_instr): Remove unused cases in switch statement. Add - safety abort() in default case. - (unparse_instr): Add safety abort() in default case. + * z8k-dis.c: Fix formatting. + (unpack_instr): Remove unused cases in switch statement. Add + safety abort() in default case. + (unparse_instr): Add safety abort() in default case. 2001-06-06 Peter Jakubek @@ -1320,21 +2005,21 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2001-04-27 Johan Rydberg - * Makefile.am: Add OpenRISC target. - * Makefile.in: Regenerated. + * Makefile.am: Add OpenRISC target. + * Makefile.in: Regenerated. - * disassemble.c (disassembler): Recognize the OpenRISC disassembly. + * disassemble.c (disassembler): Recognize the OpenRISC disassembly. - * configure.in (bfd_openrisc_arch): Add target. - * configure: Regenerated. + * configure.in (bfd_openrisc_arch): Add target. + * configure: Regenerated. - * openrisc-asm.c: New file. - * openrisc-desc.c: Likewise. - * openrisc-desc.h: Likewise. - * openrisc-dis.c: Likewise. - * openrisc-ibld.c: Likewise. - * openrisc-opc.c: Likewise. - * openrisc-opc.h: Likewise. + * openrisc-asm.c: New file. + * openrisc-desc.c: Likewise. + * openrisc-desc.h: Likewise. + * openrisc-dis.c: Likewise. + * openrisc-ibld.c: Likewise. + * openrisc-opc.c: Likewise. + * openrisc-opc.h: Likewise. 2001-04-24 Christian Groessler @@ -1388,8 +2073,8 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2001-03-20 Patrick Macdonald - * cgen-dis.in (print_insn_@arch@): Add support for target machine - determination via CGEN_COMPUTE_MACH. + * cgen-dis.in (print_insn_@arch@): Add support for target machine + determination via CGEN_COMPUTE_MACH. * fr30-desc.c: Regenerate. * fr30-dis.c: Regenerate. * fr30-opc.h: Regenerate. @@ -1423,8 +2108,8 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2001-03-06 Nick Clifton * arm-dis.c (print_insn_thumb): Compute destination address - of BLX(1) instruction by taking bit 1 from PC and not from bit - 0 of the offset. + of BLX(1) instruction by taking bit 1 from PC and not from bit + 0 of the offset. 2001-03-06 Igor Shevlyakov @@ -1487,18 +2172,18 @@ Mon Mar 18 21:10:43 CET 2002 Jan Hubicka 2001-02-18 lars brinkhoff - * Makefile.am: Add PDP-11 target. - * configure.in: Likewise. - * disassemble.c: Likewise. - * pdp11-dis.c: New file. - * pdp11-opc.c: New file. + * Makefile.am: Add PDP-11 target. + * configure.in: Likewise. + * disassemble.c: Likewise. + * pdp11-dis.c: New file. + * pdp11-opc.c: New file. 2001-02-14 Jim Wilson * ia64-ic.tbl: Update from Intel. Add setf to fr-writers. * ia64-asmtab.c: Regenerate. -Mon Feb 12 17:41:26 CET 2001 Jan Hubicka +2001-02-12 Jan Hubicka * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison instructions. @@ -1506,7 +2191,7 @@ Mon Feb 12 17:41:26 CET 2001 Jan Hubicka 2001-02-11 Maciej W. Rozycki - * mips-dis.c (print_insn_arg): Use top four bits of the address of + * mips-dis.c (print_insn_arg): Use top four bits of the address of the following instruction not of the jump itself for the jump target. (print_mips16_insn_arg): Likewise. @@ -1537,7 +2222,7 @@ Mon Feb 12 17:41:26 CET 2001 Jan Hubicka * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS. * m32r-desc.h: Regenerate. -Thu Feb 1 16:29:06 MET 2001 Jan Hubicka +2001-02-01 Jan Hubicka * i386-dis.c (dis386_att, grps): Use 'T' for push/pop (putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax @@ -1550,7 +2235,7 @@ Thu Feb 1 16:29:06 MET 2001 Jan Hubicka * disassemble.c: Remove spurious white space. -Sat Jan 13 01:48:24 MET 2001 Jan Hubicka +2001-01-13 Jan Hubicka * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret templates. @@ -1711,28 +2396,28 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka 2000-12-03 Chris Demetriou cgd@sibyte.com - * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO, - MOD_HILO, and MOD_LO macros. + * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO, + MOD_HILO, and MOD_LO macros. - * mips-opc.c (M1, M2): Delete. - (mips_builtin_opcodes): Remove all uses of M1. + * mips-opc.c (M1, M2): Delete. + (mips_builtin_opcodes): Remove all uses of M1. - * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2 - instructions take "G" format second operands and use the - correct flags. - There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to + * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2 + instructions take "G" format second operands and use the + correct flags. + There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to match. - Delete "sel" code operands from mfc1 and mtc1. - Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants + Delete "sel" code operands from mfc1 and mtc1. + Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants for dm[ft]c[023]. 2000-12-03 Ed Satterthwaite ehs@sibyte.com and - Chris Demetriou cgd@sibyte.com + Chris Demetriou cgd@sibyte.com - * mips-opc.c (mips_builtin_opcodes): Finish additions - for MIPS32 support, and clean up existing entries for - aesthetics, consistency with the MIPS32 ISA, and - with consistency the rest of the table. + * mips-opc.c (mips_builtin_opcodes): Finish additions + for MIPS32 support, and clean up existing entries for + aesthetics, consistency with the MIPS32 ISA, and + with consistency the rest of the table. 2000-12-01 Nick Clifton @@ -1741,32 +2426,32 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka 2000-12-01 Chris Demetriou - mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument - specifiers. Update 'B' for new constant names, and remove - 'm'. - mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop" - near the top of the array, so they are disassembled properly. - Enable "ssnop" for MIPS32. Add "break" variant with 20 bit - code for MIPS32. Update "clo" and "clz" to use 'U' operand - specifier. Add 'H' format specifier variants for "mfc1," - "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update - MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32 - "wait" variant which uses 'J' operand specifier. - - * mips-dis.c (set_mips_isa_type): Update to use - CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case. - Replace bfd_mach_mips4K with bfd_mach_mips32_4k case. - * mips-opc.c (I32): New constant for instructions added in - MIPS32. - (P4): Delete. - (mips_builtin_opcodes) Replace all uses of P4 with I32. - - * mips-dis.c (set_mips_isa_type): Add cases for - bfd_mach_mips5 and bfd_mach_mips64. - * mips-opc.c (I64): New definitions. - - * mips-dis.c (set_mips_isa_type): Add case for - bfd_mach_mips_sb1. + mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument + specifiers. Update 'B' for new constant names, and remove + 'm'. + mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop" + near the top of the array, so they are disassembled properly. + Enable "ssnop" for MIPS32. Add "break" variant with 20 bit + code for MIPS32. Update "clo" and "clz" to use 'U' operand + specifier. Add 'H' format specifier variants for "mfc1," + "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update + MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32 + "wait" variant which uses 'J' operand specifier. + + * mips-dis.c (set_mips_isa_type): Update to use + CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case. + Replace bfd_mach_mips4K with bfd_mach_mips32_4k case. + * mips-opc.c (I32): New constant for instructions added in + MIPS32. + (P4): Delete. + (mips_builtin_opcodes) Replace all uses of P4 with I32. + + * mips-dis.c (set_mips_isa_type): Add cases for + bfd_mach_mips5 and bfd_mach_mips64. + * mips-opc.c (I64): New definitions. + + * mips-dis.c (set_mips_isa_type): Add case for + bfd_mach_mips_sb1. 2000-11-28 Hans-Peter Nilsson @@ -1880,8 +2565,8 @@ Sat Jan 13 01:48:24 MET 2001 Jan Hubicka 2000-09-07 Catherine Moore - * d30v-opc.c (d30v_format_tab): Use format Ra for - modinc and moddec. + * d30v-opc.c (d30v_format_tab): Use format Ra for + modinc and moddec. 2000-09-06 Alexandre Oliva