X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=e85662882eb6bb924c8ebd26373bcd3de6d083af;hb=6febeb7413ca9cbd65432cb3ffd33904046a82a8;hp=05b792a22aa73603eae2346fee283a95e272e3ad;hpb=98c76446ea6bc1223c314500d3e11178e4911018;p=deliverable%2Fbinutils-gdb.git diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 05b792a22a..e85662882e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,594 @@ +2012-11-08 Alan Modra + + * po/POTFILES.in: Regenerate. + +2012-11-05 Alan Modra + + * configure.in: Apply 2012-09-10 change to config.in here. + +2012-10-26 Andreas Krebbel + + * s390-mkopc.c: Accept empty lines in s390-opc.txt. + * s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2 + and RRF_RMRR. + * s390-opc.txt: Add new instructions. New instruction type for lptea. + +2012-10-26 Christian Groessler + + * z8kgen.c (struct op): Fix encoding for translate opcodes (trdb, + trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove + non-existing opcode trtrb. + * z8k-opc.h: Regenerate. + +2012-10-26 Alan Modra + + * ppc-opc (powerpc_opcodes): "lfdp" and "stfdp" use DS offset. + +2012-10-24 Roland McGrath + + * i386-dis.c (ckprefix): When bailing out for fwait with prefixes, + set rex_used to rex. + +2012-10-22 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) : Fix opcode spelling. + +2012-10-18 Tom Tromey + + * tic54x-dis.c (print_instruction): Don't use K&R style. + (print_parallel_instruction, sprint_dual_address) + (sprint_indirect_address, sprint_direct_address, sprint_mmr) + (sprint_cc2, sprint_condition): Likewise. + +2012-10-18 Kai Tietz + + * aarch64-asm.c (aarch64_ins_ldst_reglist): Initialize + value with a default. + (do_special_encoding): Likewise. + (aarch64_ins_ldst_elemlist): Pre-initialize QSsize, and opcodeh2 + variables with default. + * arc-dis.c (write_comments_): Don't use strncat due + size of state->commentBuffer pointer isn't predictable. + +2012-10-15 Yufeng Zhang + + * aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and + rmr_el3; remove daifset and daifclr. + +2012-10-15 Yufeng Zhang + + * aarch64-opc.c (operand_general_constraint_met_p): Change to check + the alignment of addr.offset.imm instead of that of shifter.amount for + operand type AARCH64_OPND_ADDR_UIMM12. + +2012-10-11 Kyrylo Tkachov + + * arm-dis.c: Use preferred form of vrint instruction variants + for disassembly. + +2012-10-09 Nagajyothi Eggone + + * i386-gen.c (cpu_flag_init): Add CPU_BDVER3_FLAGS. + * i386-init.h: Regenerated. + +2012-10-05 Peter Bergner + + * ppc-dis.c (ppc_opts) : Use PPC_OPCODE_ALTIVEC2; + * ppc-opc.c (VBA): New define. + (powerpc_opcodes) : New extended mnemonics. + +2012-10-04 Nick Clifton + + * v850-dis.c (disassemble): Place square parentheses around second + register operand of clr1, not1, set1 and tst1 instructions. + +2012-10-04 Andreas Krebbel + + * s390-mkopc.c: Support new option zEC12. + * s390-opc.c: Add new instruction formats. + * s390-opc.txt: Add new instructions for zEC12. + +2012-09-27 Anthony Green + + * moxie-dis.c (print_insn_moxie): Print 'bad' instructions. + * moxie-opc.c: All 'bad' instructions have the itype MOXIE_BAD. + +2012-09-25 Saravanan Ekanathan + + * i386-gen.c (cpu_flag_init): Add missing Cpu flags in + CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS + and CPU_BTVER2_FLAGS. + * i386-init.h: Regenerated. + +2012-09-20 Michael Zolotukhin + + * i386-gen.c (cpu_flag_init): Add CpuCX16 to CPU_NOCONA_FLAGS, + CPU_CORE_FLAGS, CPU_CORE2_FLAGS, CPU_COREI7_FLAGS, + CPU_BDVER1_FLAGS, CPU_BDVER2_FLAGS, CPU_BTVER1_FLAGS, + CPU_BTVER2_FLAGS. Add CPU_CX16_FLAGS. + (cpu_flags): Add CpuCX16. + * i386-opc.h (CpuCX16): New. + (i386_cpu_flags): Add cpucx16. + * i386-opc.tbl: Replace CpuSSE3 with CpuCX16 for cmpxchg16b. + * i386-tbl.h: Regenerate. + * i386-init.h: Likewise. + +2012-09-18 Kyrylo Tkachov + + * arm-dis.c: Changed ldra and strl-form mnemonics + to lda and stl-form. + +2012-09-18 Chao-ying Fu + + * micromips-opc.c (micromips_opcodes): Correct the encoding of + the "swxc1" instruction. + +2012-09-17 Yufeng Zhang + + * aarch64-asm.c (aarch64_ins_imm_half): Remove ATTRIBUTE_UNUSED from + the parameter 'inst'. + (aarch64_ins_addr_simm): Add ATTRIBUTE_UNUSED to the parameter 'inst'. + (convert_mov_to_movewide): Change to assert (0) when + aarch64_wide_constant_p returns FALSE. + +2012-09-14 David Edelsohn + + * configure: Regenerate. + +2012-09-14 Anthony Green + + * moxie-dis.c (print_insn_moxie): Branch targets are relative to + the address after the branch instruction. + +2012-09-13 Anthony Green + + * moxie-dis.c (print_insn_moxie): Handle bi-endian encodings. + +2012-09-10 Matthias Klose + + * config.in: Disable sanity check for kfreebsd. + +2012-09-10 H.J. Lu + + * configure: Regenerated. + +2012-09-04 Sergey A. Guriev + + * ia64-asmtab.h (completer_index): Extend bitfield to full uint. + * ia64-gen.c: Promote completer index type to longlong. + (irf_operand): Add new register recognition. + (in_iclass_mov_x): Add an entry for the new mov_* instruction type. + (lookup_specifier): Add new resource recognition. + (insert_bit_table_ent): Relax abort condition according to the + changed completer index type. + (print_dis_table): Fix printf format for completer index. + * ia64-ic.tbl: Add a new instruction class. + * ia64-opc-i.c (ia64_opcodes_i): Define new I-instructions. + * ia64-opc-m.c (ia64_opcodes_m): Define new M-instructions. + * ia64-opc.h: Define short names for new operand types. + * ia64-raw.tbl: Add new RAW resource for DAHR register. + * ia64-waw.tbl: Add new WAW resource for DAHR register. + * ia64-asmtab.c: Regenerate. + +2012-08-29 Peter Bergner + + * ppc-opc.c (VXASHB_MASK): New define. + (powerpc_opcodes) : Use VXASHB_MASK. + +2012-08-28 Peter Bergner + + * ppc-opc.c (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK, + VXVDVA_MASK, VXUIMM4_MASK, VXUIMM3_MASK, VXUIMM2_MASK): New defines. + (powerpc_opcodes) : Use VXVA_MASK. + : Use VXVB_MASK. + : Use VXVAVB_MASK. + : Use VXVDVA_MASK. + : Use VXUIMM4_MASK. + : Use VXUIMM3_MASK. + : Use VXUIMM2_MASK. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (neon_opcodes): Add 2 operand sha instructions. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (neon_opcodes): Handle VMULL.P64. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (neon_opcodes): Add support for AES instructions. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (coprocessor_opcodes): Add support for HP/DP + conversions. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (coprocessor_opcodes): Add VRINT. + (neon_opcodes): Likewise. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (coprocessor_opcodes): Add support for new VCVT + variants. + (neon_opcodes): Likewise. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM. + (neon_opcodes): Likewise. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (coprocessor_opcodes): Add VSEL. + (print_insn_coprocessor): Add new %<>c bitfield format + specifier. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions. + (thumb32_opcodes): Likewise. + (print_arm_insn): Add support for %<>T formatter. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (arm_opcodes): Add HLT. + (thumb_opcodes): Likewise. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (thumb32_opcodes): Add DCPS instruction. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (arm_opcodes): Add SEVL. + (thumb_opcodes): Likewise. + (thumb32_opcodes): Likewise. + +2012-08-24 Matthew Gretton-Dann + + * arm-dis.c (data_barrier_option): New function. + (print_insn_arm): Use data_barrier_option. + (print_insn_thumb32): Use data_barrier_option. + +2012-08-24 Matthew Gretton-Dann + + * sparc-opc.c (4-argument crypto instructions): Fix encoding using + F3F4 macro. + +2012-08-20 Edmar Wienskoski + + * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub, + vabsduh, vabsduw, mviwsplt. + +2012-08-17 Nagajyothi Eggone + + * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and + CPU_BTVER2_FLAGS. + + * i386-opc.h: Update CpuPRFCHW comment. + + * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW. + * i386-init.h: Regenerated. + * i386-tbl.h: Likewise. + +2012-08-17 Nick Clifton + + * po/uk.po: New Ukranian translation. + * configure.in (ALL_LINGUAS): Add uk. + * configure: Regenerate. + +2012-08-16 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) <"lswx">: Use RAX for the second and + RBX for the third operand. + <"lswi">: Use RAX for second and NBI for the third operand. + +2012-08-15 DJ Delorie + + * rl78-decode.opc (rl78_decode_opcode): Merge %e and %[01] + operands, so that data addresses can be corrected when not + ES-overridden. + * rl78-decode.c: Regenerate. + * rl78-dis.c (print_insn_rl78): Make order of modifiers + irrelevent. When the 'e' specifier is used on an operand and no + ES prefix is provided, adjust address to make it absolute. + +2012-08-15 Peter Bergner + + * ppc-opc.c : Use PPC_OPERAND_GPR. + +2012-08-15 Peter Bergner + + * ppc-opc.c : New extended mnemonics. + +2012-08-14 Maciej W. Rozycki + + * mips-dis.c (print_insn_args): Add GET_OP and GET_OP_S local + macros, use local variables for info struct member accesses, + update the type of the variable used to hold the instruction + word. + (print_insn_mips, print_mips16_insn_arg): Likewise. + (print_insn_mips16): Add GET_OP and GET_OP_S local macros, use + local variables for info struct member accesses. + (print_insn_micromips): Add GET_OP_S local macro. + (_print_insn_mips): Update the type of the variable used to hold + the instruction word. + +2012-08-13 Ian Bolton + Laurent Desnogues + Jim MacArthur + Marcus Shawcroft + Nigel Stephens + Ramana Radhakrishnan + Richard Earnshaw + Sofiane Naci + Tejas Belagod + Yufeng Zhang + + * Makefile.am: Add AArch64. + * Makefile.in: Regenerate. + * aarch64-asm.c: New file. + * aarch64-asm.h: New file. + * aarch64-dis.c: New file. + * aarch64-dis.h: New file. + * aarch64-gen.c: New file. + * aarch64-opc.c: New file. + * aarch64-opc.h: New file. + * aarch64-tbl.h: New file. + * configure.in: Add AArch64. + * configure: Regenerate. + * disassemble.c: Add AArch64. + * aarch64-asm-2.c: New file (automatically generated). + * aarch64-dis-2.c: New file (automatically generated). + * aarch64-opc-2.c: New file (automatically generated). + * po/POTFILES.in: Regenerate. + +2012-08-13 Maciej W. Rozycki + + * micromips-opc.c (micromips_opcodes): Update comment. + * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor + instructions for IOCT as appropriate. + * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with + opcode_is_member. + * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with + the result of a check for the -Wno-missing-field-initializers + GCC option. + * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable. + (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to + compilation. + (mips16-opc.lo): Likewise. + (micromips-opc.lo): Likewise. + * aclocal.m4: Regenerate. + * configure: Regenerate. + * Makefile.in: Regenerate. + +2012-08-11 Saravanan Ekanathan + + PR gas/14423 + * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS. + * i386-init.h: Regenerated. + +2012-08-09 Nick Clifton + + * po/vi.po: Updated Vietnamese translation. + +2012-08-07 Roland McGrath + + * i386-dis.c (reg_table): Fill out REG_0F0D table with + AMD-reserved cases as "prefetch". + (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants. + (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise. + (reg_table): Use those under REG_0F18. + (mod_table): Add those cases as "nop/reserved". + +2012-08-07 Jan Beulich + + * i386-opc.tbl: Remove "FIXME" comments from SVME instructions. + +2012-08-06 Roland McGrath + + * i386-dis.c (print_insn): Print spaces between multiple excess + prefixes. Return actual number of excess prefixes consumed, + not always one. + + * i386-dis.c (OP_REG): Ignore REX_B for segment register cases. + +2012-08-06 Roland McGrath + Victor Khimenko + H.J. Lu + + * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG. + (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG. + (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG. + (OP_E_register): Likewise. + (OP_REG): For low 8 whole registers, treat REX_W like DFLAG. + +2012-08-02 Jan-Benedict Glaw + + * configure.in: Formatting. + * configure: Regenerate. + +2012-08-01 Alan Modra + + * h8300-dis.c: Fix printf arg warnings. + * i960-dis.c: Likewise. + * mips-dis.c: Likewise. + * pdp11-dis.c: Likewise. + * sh-dis.c: Likewise. + * v850-dis.c: Likewise. + * configure.in: Formatting. + * configure: Regenerate. + * rl78-decode.c: Regenerate. + * po/POTFILES.in: Regenerate. + +2012-07-31 Chao-Ying Fu + Catherine Moore + Maciej W. Rozycki + + * micromips-opc.c (WR_a, RD_a, MOD_a): New macros. + (DSP_VOLA): Likewise. + (D32, D33): Likewise. + (micromips_opcodes): Add DSP ASE instructions. + * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases. + <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise. + +2012-07-31 Jan Beulich + + * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2 + instruction group. Mark as requiring AVX2. + * i386-tbl.h: Re-generate. + +2012-07-30 Nick Clifton + + * po/opcodes.pot: Updated template. + * po/es.po: Updated Spanish translation. + * po/fi.po: Updated Finnish translation. + +2012-07-27 Mike Frysinger + + * configure.in (BFD_VERSION): Run bfd/configure --version and + parse the output of that. + * configure: Regenerate. + +2012-07-25 James Lemke + + * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns. + +2012-07-24 Stephan McCamant + Dr David Alan Gilbert + + PR binutils/13135 + * arm-dis.c: Add necessary casts for printing integer values. + Use %s when printing string values. + * hppa-dis.c: Likewise. + * m68k-dis.c: Likewise. + * microblaze-dis.c: Likewise. + * mips-dis.c: Likewise. + * sparc-dis.c: Likewise. + +2012-07-19 Michael Zolotukhin + + PR binutils/14355 + * i386-dis.c (VEX_LEN_0FXOP_08_CC): New. + (VEX_LEN_0FXOP_08_CD): Likewise. + (VEX_LEN_0FXOP_08_CE): Likewise. + (VEX_LEN_0FXOP_08_CF): Likewise. + (VEX_LEN_0FXOP_08_EC): Likewise. + (VEX_LEN_0FXOP_08_ED): Likewise. + (VEX_LEN_0FXOP_08_EE): Likewise. + (VEX_LEN_0FXOP_08_EF): Likewise. + (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq, + vpcomub, vpcomuw, vpcomud, vpcomuq. + (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC, + VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF, + VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE, + VEX_LEN_0FXOP_08_EF. + +2012-07-16 Michael Zolotukhin + + * i386-dis.c (PREFIX_0F38F6): New. + (prefix_table): Add adcx, adox instructions. + (three_byte_table): Use PREFIX_0F38F6. + (mod_table): Add rdseed instruction. + * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW. + (cpu_flags): Likewise. + * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW. + (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw. + * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend + prefetchw. + * i386-tbl.h: Regenerate. + * i386-init.h: Likewise. + +2012-07-05 Thomas Schwinge + + * mips-dis.c: Remove gratuitous newline. + +2012-07-05 Sean Keys + + * xgate-dis.c: Removed an IF statement that will + always be false due to overlapping operand masks. + * xgate-opc.c: Corrected 'com' opcode entry and + fixed spacing. + +2012-07-02 Roland McGrath + + * i386-opc.tbl: Add RepPrefixOk to nop. + * i386-tbl.h: Regenerate. + +2012-06-28 Nick Clifton + + * po/vi.po: Updated Vietnamese translation. + +2012-06-22 Roland McGrath + + * i386-opc.tbl: Add RepPrefixOk to ret. + * i386-tbl.h: Regenerate. + + * i386-opc.h (RepPrefixOk): New enum constant. + (i386_opcode_modifier): New bitfield 'repprefixok'. + * i386-gen.c (opcode_modifiers): Add RepPrefixOk. + * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all + instructions that have IsString. + * i386-tbl.h: Regenerate. + +2012-06-11 Andreas Schwab + + * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx) + (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx) + (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls) + (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst) + (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep) + (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls) + (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x) + (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx) + (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0. + +2012-05-19 Alan Modra + + * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h. + (get_powerpc_dialect): Detect VLE sections from ELF sh_flags. + +2012-05-18 Alan Modra + + * ia64-opc.c: Remove #include "ansidecl.h". + * z8kgen.c: Include sysdep.h first. + + * arc-dis.c: Include sysdep.h first, remove some redundant includes. + * bfin-dis.c: Likewise. + * i860-dis.c: Likewise. + * ia64-dis.c: Likewise. + * ia64-gen.c: Likewise. + * m68hc11-dis.c: Likewise. + * mmix-dis.c: Likewise. + * msp430-dis.c: Likewise. + * or32-dis.c: Likewise. + * rl78-dis.c: Likewise. + * rx-dis.c: Likewise. + * tic4x-dis.c: Likewise. + * tilegx-opc.c: Likewise. + * tilepro-opc.c: Likewise. + * rx-decode.c: Regenerate. + +2012-05-17 James Lemke + + * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi. + 2012-05-17 James Lemke * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.