X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=opcodes%2FChangeLog;h=ed0f903d0df7bc0343bf603befd3b6243c78f568;hb=e407c74b5b60;hp=26d1e7a6b74fbb97d0b3f18c2344c6b97ed35ebf;hpb=fb098a1efcc97442a25ec05fb705089095ca5f3f;p=deliverable%2Fbinutils-gdb.git

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
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--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,23 @@
+2013-01-04  Juergen Urban <JuergenUrban@gmx.de>
+
+	* mips-dis.c: Add names for CP0 registers of r5900.
+	* mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for
+	instructions sq and lq.
+	Add support for MIPS r5900 CPU.
+	Add support for 128 bit MMI (Multimedia Instructions).
+	Add support for EE instructions (Emotion Engine).
+	Disable unsupported floating point instructions (64 bit and
+	undefined compare operations).
+	Enable instructions of MIPS ISA IV which are supported by r5900.
+	Disable 64 bit co processor instructions.
+	Disable 64 bit multiplication and division instructions.
+	Disable instructions for co-processor 2 and 3, because these are
+	not supported (preparation for later VU0 support (Vector Unit)).
+	Disable cvt.w.s because this behaves like trunc.w.s and the
+	correct execution can't be ensured on r5900.
+	Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This
+	will confuse less developers and compilers.
+
 2013-01-04  Yufeng Zhang  <yufeng.zhang@arm.com>
 
 	* aarch64-opc.c (aarch64_print_operand): Change to print